sh: tmu: Clean up CONFIG_SH_TMU_CLK_FREQ

The R-Car Gen2 feeds the TMU with CONFIG_SYS_CLK_FREQ / 2,
while the old SH parts use CONFIG_SYS_CLK_FREQ directly.
Just put this into the TMU implementation and drop the
CONFIG_SH_TMU_CLK_FREQ config option.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
This commit is contained in:
Marek Vasut 2018-08-24 21:34:07 +02:00 committed by Marek Vasut
parent ae59a9f8f7
commit ccce3acfe7
31 changed files with 5 additions and 38 deletions

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@ -22,7 +22,11 @@ static struct tmu_regs *tmu = (struct tmu_regs *)TMU_BASE;
unsigned long get_tbclk(void) unsigned long get_tbclk(void)
{ {
return CONFIG_SH_TMU_CLK_FREQ / 4; #ifdef CONFIG_RCAR_GEN2
return CONFIG_SYS_CLK_FREQ / 8;
#else
return CONFIG_SYS_CLK_FREQ / 4;
#endif
} }
unsigned long timer_read_counter(void) unsigned long timer_read_counter(void)

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@ -91,7 +91,6 @@
/* Board Clock */ /* Board Clock */
#define CONFIG_SYS_CLK_FREQ 33333333 #define CONFIG_SYS_CLK_FREQ 33333333
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#endif /* __MIGO_R_H */ #endif /* __MIGO_R_H */

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@ -37,8 +37,6 @@
/* Board Clock */ /* Board Clock */
#define RMOBILE_XTAL_CLK 20000000u #define RMOBILE_XTAL_CLK 20000000u
#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2)
#define CONFIG_EXTRA_ENV_SETTINGS \ #define CONFIG_EXTRA_ENV_SETTINGS \
"fdt_high=0xffffffff\0" \ "fdt_high=0xffffffff\0" \

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@ -112,7 +112,6 @@
/* Board Clock */ /* Board Clock */
#define CONFIG_SYS_CLK_FREQ 33333333 #define CONFIG_SYS_CLK_FREQ 33333333
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#endif /* __AP325RXA_H */ #endif /* __AP325RXA_H */

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@ -100,7 +100,6 @@
#else #else
#define CONFIG_SYS_CLK_FREQ 44444444 #define CONFIG_SYS_CLK_FREQ 44444444
#endif #endif
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#endif /* __AP_SH4A_4A_H */ #endif /* __AP_SH4A_4A_H */

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@ -91,7 +91,6 @@
/* Board Clock */ /* Board Clock */
#define CONFIG_SYS_CLK_FREQ 50000000 #define CONFIG_SYS_CLK_FREQ 50000000
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#endif /* __ARMADILLO_800EVA_H */ #endif /* __ARMADILLO_800EVA_H */

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@ -52,7 +52,6 @@
/* Board Clock */ /* Board Clock */
#define RMOBILE_XTAL_CLK 20000000u #define RMOBILE_XTAL_CLK 20000000u
#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */
/* ENV setting */ /* ENV setting */
#if !defined(CONFIG_MTD_NOR_FLASH) #if !defined(CONFIG_MTD_NOR_FLASH)

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@ -131,7 +131,6 @@
/* Board Clock */ /* Board Clock */
#define CONFIG_SYS_CLK_FREQ 41666666 #define CONFIG_SYS_CLK_FREQ 41666666
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#endif /* __ECOVEC_H */ #endif /* __ECOVEC_H */

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@ -69,7 +69,6 @@
/* Clock */ /* Clock */
#define CONFIG_SYS_CLK_FREQ 66666666 #define CONFIG_SYS_CLK_FREQ 66666666
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
/* Ether */ /* Ether */

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@ -33,8 +33,6 @@
/* Board Clock */ /* Board Clock */
#define RMOBILE_XTAL_CLK 20000000u #define RMOBILE_XTAL_CLK 20000000u
#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2)
#define CONFIG_EXTRA_ENV_SETTINGS \ #define CONFIG_EXTRA_ENV_SETTINGS \
"fdt_high=0xffffffff\0" \ "fdt_high=0xffffffff\0" \

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@ -33,8 +33,6 @@
/* Board Clock */ /* Board Clock */
#define RMOBILE_XTAL_CLK 20000000u #define RMOBILE_XTAL_CLK 20000000u
#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2)
#define CONFIG_EXTRA_ENV_SETTINGS \ #define CONFIG_EXTRA_ENV_SETTINGS \
"fdt_high=0xffffffff\0" \ "fdt_high=0xffffffff\0" \

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@ -34,8 +34,6 @@
/* Board Clock */ /* Board Clock */
#define RMOBILE_XTAL_CLK 20000000u #define RMOBILE_XTAL_CLK 20000000u
#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2)
#define CONFIG_EXTRA_ENV_SETTINGS \ #define CONFIG_EXTRA_ENV_SETTINGS \
"fdt_high=0xffffffff\0" \ "fdt_high=0xffffffff\0" \

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@ -49,7 +49,6 @@
/* Clocks */ /* Clocks */
#define CONFIG_SYS_CLK_FREQ 24000000 #define CONFIG_SYS_CLK_FREQ 24000000
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
/* UART */ /* UART */

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@ -60,7 +60,6 @@
/* Board Clock */ /* Board Clock */
#define CONFIG_SYS_CLK_FREQ 33333333 #define CONFIG_SYS_CLK_FREQ 33333333
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
/* PCMCIA */ /* PCMCIA */

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@ -82,7 +82,6 @@
/* Board Clock */ /* Board Clock */
#define CONFIG_SYS_CLK_FREQ 33333333 #define CONFIG_SYS_CLK_FREQ 33333333
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#endif /* __MS7722SE_H */ #endif /* __MS7722SE_H */

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@ -62,7 +62,6 @@
/* Board Clock */ /* Board Clock */
#define CONFIG_SYS_CLK_FREQ 33333333 #define CONFIG_SYS_CLK_FREQ 33333333
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#endif /* __MS7750SE_H */ #endif /* __MS7750SE_H */

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@ -38,8 +38,6 @@
/* Board Clock */ /* Board Clock */
#define RMOBILE_XTAL_CLK 20000000u #define RMOBILE_XTAL_CLK 20000000u
#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2)
#define CONFIG_EXTRA_ENV_SETTINGS \ #define CONFIG_EXTRA_ENV_SETTINGS \
"fdt_high=0xffffffff\0" \ "fdt_high=0xffffffff\0" \

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@ -98,7 +98,6 @@
#else #else
#define CONFIG_SYS_CLK_FREQ 44444444 #define CONFIG_SYS_CLK_FREQ 44444444
#endif #endif
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#endif /* __R0P7734_H */ #endif /* __R0P7734_H */

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@ -46,7 +46,6 @@
* SuperH Clock setting * SuperH Clock setting
*/ */
#define CONFIG_SYS_CLK_FREQ 60000000 #define CONFIG_SYS_CLK_FREQ 60000000
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SYS_PLL_SETTLING_TIME 100/* in us */ #define CONFIG_SYS_PLL_SETTLING_TIME 100/* in us */

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@ -71,7 +71,6 @@
/* Board Clock */ /* Board Clock */
#define CONFIG_SYS_CLK_FREQ 33333333 #define CONFIG_SYS_CLK_FREQ 33333333
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
/* PCI Controller */ /* PCI Controller */

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@ -58,7 +58,6 @@
/* Board Clock */ /* Board Clock */
#define CONFIG_SYS_CLK_FREQ 33333333 #define CONFIG_SYS_CLK_FREQ 33333333
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */ #define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */
#define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) #define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)

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@ -47,7 +47,6 @@
/* Board Clock */ /* Board Clock */
#define CONFIG_SYS_CLK_FREQ 36000000 #define CONFIG_SYS_CLK_FREQ 36000000
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */ #define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */
#define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) #define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)

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@ -46,7 +46,6 @@
/* Board Clock */ /* Board Clock */
#define CONFIG_SYS_CLK_FREQ 66125000 #define CONFIG_SYS_CLK_FREQ 66125000
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */ #define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */
#define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) #define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)

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@ -75,6 +75,5 @@
/* Board Clock */ /* Board Clock */
#define CONFIG_SYS_CLK_FREQ 48000000 #define CONFIG_SYS_CLK_FREQ 48000000
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#endif /* __SH7752EVB_H */ #endif /* __SH7752EVB_H */

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@ -75,6 +75,5 @@
/* Board Clock */ /* Board Clock */
#define CONFIG_SYS_CLK_FREQ 48000000 #define CONFIG_SYS_CLK_FREQ 48000000
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#endif /* __SH7753EVB_H */ #endif /* __SH7753EVB_H */

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@ -87,6 +87,5 @@
/* Board Clock */ /* Board Clock */
#define CONFIG_SYS_CLK_FREQ 48000000 #define CONFIG_SYS_CLK_FREQ 48000000
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#endif /* __SH7757LCR_H */ #endif /* __SH7757LCR_H */

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@ -69,7 +69,6 @@
/* Clock */ /* Clock */
#define CONFIG_SYS_CLK_FREQ 66666666 #define CONFIG_SYS_CLK_FREQ 66666666
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
/* Ether */ /* Ether */

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@ -126,7 +126,6 @@
/* Board Clock */ /* Board Clock */
/* The SCIF used external clock. system clock only used timer. */ /* The SCIF used external clock. system clock only used timer. */
#define CONFIG_SYS_CLK_FREQ 50000000 #define CONFIG_SYS_CLK_FREQ 50000000
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#endif /* __SH7785LCR_H */ #endif /* __SH7785LCR_H */

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@ -78,7 +78,6 @@
#else #else
#define CONFIG_SYS_CLK_FREQ 33333333 #define CONFIG_SYS_CLK_FREQ 33333333
#endif /* CONFIG_T_SH7706LSR */ #endif /* CONFIG_T_SH7706LSR */
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
/* Network device */ /* Network device */

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@ -38,8 +38,6 @@
/* Board Clock */ /* Board Clock */
#define RMOBILE_XTAL_CLK 20000000u #define RMOBILE_XTAL_CLK 20000000u
#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2)
#define CONFIG_EXTRA_ENV_SETTINGS \ #define CONFIG_EXTRA_ENV_SETTINGS \
"fdt_high=0xffffffff\0" \ "fdt_high=0xffffffff\0" \

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@ -42,8 +42,6 @@
/* Board Clock */ /* Board Clock */
#define RMOBILE_XTAL_CLK 20000000u #define RMOBILE_XTAL_CLK 20000000u
#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2)
#define CONFIG_EXTRA_ENV_SETTINGS \ #define CONFIG_EXTRA_ENV_SETTINGS \
"fdt_high=0xffffffff\0" \ "fdt_high=0xffffffff\0" \