arm: dts: ls1028a: Add Ethernet switch node and dependencies

The definition follows the DSA binding in kernel and describes the switch,
its ports and PHYs.  The switch node has the same structure as in Linux
and this patch enables it (and relevant ports) for the LS1028A RDB board.

ENETC PF6 is the 2nd Eth controller linked to the switch on LS1028A, it is
not used in U-Boot and was disabled.  Ethernet port aliases were also
added to better manage the multitude of ports available now.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Michael Walle <michael@walle.cc>
This commit is contained in:
Alex Marginean 2021-01-25 14:23:56 +02:00 committed by Tom Rini
parent 71a2d1e7b8
commit cc32fd911a
2 changed files with 119 additions and 1 deletions

View File

@ -15,6 +15,12 @@
compatible = "fsl,ls1028a-rdb", "fsl,ls1028a"; compatible = "fsl,ls1028a-rdb", "fsl,ls1028a";
aliases { aliases {
spi0 = &fspi; spi0 = &fspi;
eth0 = &enetc0;
eth1 = &enetc2;
eth2 = &mscc_felix_port0;
eth3 = &mscc_felix_port1;
eth4 = &mscc_felix_port2;
eth5 = &mscc_felix_port3;
}; };
}; };
@ -131,9 +137,67 @@
phy-handle = <&rdb_phy0>; phy-handle = <&rdb_phy0>;
}; };
&enetc2 {
status = "okay";
};
&mscc_felix {
status = "okay";
};
&mscc_felix_port0 {
label = "swp0";
phy-handle = <&sw_phy0>;
phy-mode = "qsgmii";
status = "okay";
};
&mscc_felix_port1 {
label = "swp1";
phy-handle = <&sw_phy1>;
phy-mode = "qsgmii";
status = "okay";
};
&mscc_felix_port2 {
label = "swp2";
phy-handle = <&sw_phy2>;
phy-mode = "qsgmii";
status = "okay";
};
&mscc_felix_port3 {
label = "swp3";
phy-handle = <&sw_phy3>;
phy-mode = "qsgmii";
status = "okay";
};
&mscc_felix_port4 {
ethernet = <&enetc2>;
status = "okay";
};
&mdio0 { &mdio0 {
status = "okay"; status = "okay";
rdb_phy0: phy@2 { rdb_phy0: phy@2 {
reg = <2>; reg = <2>;
}; };
/* VSC8514 QSGMII PHY */
sw_phy0: phy@10 {
reg = <0x10>;
};
sw_phy1: phy@11 {
reg = <0x11>;
};
sw_phy2: phy@12 {
reg = <0x12>;
};
sw_phy3: phy@13 {
reg = <0x13>;
};
}; };

View File

@ -151,9 +151,63 @@
reg = <0x000300 0 0 0 0>; reg = <0x000300 0 0 0 0>;
status = "disabled"; status = "disabled";
}; };
mscc_felix: pci@0,5 {
reg = <0x000500 0 0 0 0>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
mscc_felix_port0: port@0 {
reg = <0>;
status = "disabled";
};
mscc_felix_port1: port@1 {
reg = <1>;
status = "disabled";
};
mscc_felix_port2: port@2 {
reg = <2>;
status = "disabled";
};
mscc_felix_port3: port@3 {
reg = <3>;
status = "disabled";
};
mscc_felix_port4: port@4 {
reg = <4>;
phy-mode = "internal";
status = "disabled";
fixed-link {
speed = <2500>;
full-duplex;
};
};
mscc_felix_port5: port@5 {
reg = <5>;
phy-mode = "internal";
status = "disabled";
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
enetc6: pci@0,6 { enetc6: pci@0,6 {
reg = <0x000600 0 0 0 0>; reg = <0x000600 0 0 0 0>;
status = "okay"; status = "disabled";
phy-mode = "internal"; phy-mode = "internal";
}; };
}; };