powerpc/t4240: updated RCW and PBI for rev2.0

Updated the RCW for rev2.0 which uses new frequency settings as below:

Clock Configuration:
CPU0:1666.667 MHz, CPU1:1666.667 MHz, CPU2:1666.667 MHz, CPU3:1666.667 MHz,
CPU4:1666.667 MHz, CPU5:1666.667 MHz, CPU6:1666.667 MHz, CPU7:1666.667 MHz,
CPU8:1666.667 MHz, CPU9:1666.667 MHz, CPU10:1666.667 MHz, CPU11:1666.667MHz,
CCB:733.333 MHz,
DDR:933.333 MHz (1866.667 MT/s data rate) (Asynchronous), IFC:183.333 MHz
FMAN1: 733.333 MHz
FMAN2: 733.333 MHz
QMAN:  366.667 MHz
PME:   533.333 MHz

Remove workaround of IFC bus speed and SERDES A-006031 of rev1.0.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
This commit is contained in:
Shaohui Xie 2014-04-21 11:21:03 +08:00 committed by York Sun
parent b33bd8cd4b
commit cb753850e8
2 changed files with 3 additions and 17 deletions

View File

@ -13,20 +13,6 @@
09000d00 00000000
09000d04 fff80000
09000d08 81000012
#workaround for IFC bus speed
091241c0 f03f3f3f
091241c4 ff003f3f
09124010 00000101
09124130 0000000c
#workaround for SERDES A-006031
090ea000 064740e6
090ea020 064740e6
090eb000 064740e6
090eb020 064740e6
090ec000 064740e6
090ec020 064740e6
090ed000 064740e6
090ed020 064740e6
#Configure alternate space
09000010 00000000
09000014 ff000000

View File

@ -1,7 +1,7 @@
#PBL preamble and RCW header
aa55aa55 010e0100
#serdes protocol 1_28_6_12
120c0019 0c101915 00000000 00000000
04383063 30548c00 6c020000 1d000000
16070019 18101916 00000000 00000000
04383060 30548c00 ec020000 f5000000
00000000 ee0000ee 00000000 000307fc
00000000 00000000 00000000 00000020
00000000 00000000 00000000 00000028