include/configs: Whitespace fixup

A number of moveconfig.py runs have left a instances of multiple empty
lines in a row.  Correct this to a single empty line.

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini 2016-04-24 10:24:59 -04:00
parent 78d1e1d0a1
commit cb04db155f
244 changed files with 0 additions and 675 deletions

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@ -712,7 +712,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_FM1_10GEC1_PHY_ADDR 0x7 /*SLOT 1*/ #define CONFIG_SYS_FM1_10GEC1_PHY_ADDR 0x7 /*SLOT 1*/
#define CONFIG_SYS_FM1_10GEC2_PHY_ADDR 0x6 /*SLOT 2*/ #define CONFIG_SYS_FM1_10GEC2_PHY_ADDR 0x6 /*SLOT 2*/
#define CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR 0x1c #define CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR 0x1c
#define CONFIG_SYS_FM1_DTSEC2_RISER_PHY_ADDR 0x1d #define CONFIG_SYS_FM1_DTSEC2_RISER_PHY_ADDR 0x1d
#define CONFIG_SYS_FM1_DTSEC3_RISER_PHY_ADDR 0x1e #define CONFIG_SYS_FM1_DTSEC3_RISER_PHY_ADDR 0x1e

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@ -52,7 +52,6 @@
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#endif #endif
/* High Level Configuration Options */ /* High Level Configuration Options */
#define CONFIG_BOOKE /* BOOKE */ #define CONFIG_BOOKE /* BOOKE */
#define CONFIG_E500 /* BOOKE e500 family */ #define CONFIG_E500 /* BOOKE e500 family */

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@ -93,7 +93,6 @@
#define CONFIG_CMD_PCI #define CONFIG_CMD_PCI
/* /*
* PCI Windows * PCI Windows
* Memory space is mapped 1-1, but I/O space must start from 0. * Memory space is mapped 1-1, but I/O space must start from 0.
@ -223,7 +222,6 @@ combinations. this should be removed later
#define CONFIG_SYS_DDR_TIMING_5 CONFIG_SYS_DDR_TIMING_5_800 #define CONFIG_SYS_DDR_TIMING_5 CONFIG_SYS_DDR_TIMING_5_800
#endif #endif
/* relocated CCSRBAR */ /* relocated CCSRBAR */
#define CONFIG_SYS_CCSRBAR CONFIG_SYS_CCSRBAR_DEFAULT #define CONFIG_SYS_CCSRBAR CONFIG_SYS_CCSRBAR_DEFAULT
#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR_DEFAULT #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR_DEFAULT
@ -590,7 +588,6 @@ combinations. this should be removed later
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */
/* /*
* For booting Linux, the board info and command line data * For booting Linux, the board info and command line data
* have to be in the first 64 MB of memory, since this is * have to be in the first 64 MB of memory, since this is

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@ -100,7 +100,6 @@
#define CONFIG_CMD_PCI #define CONFIG_CMD_PCI
/* /*
* PCI Windows * PCI Windows
* Memory space is mapped 1-1, but I/O space must start from 0. * Memory space is mapped 1-1, but I/O space must start from 0.

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@ -48,7 +48,6 @@
#define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME #define CONFIG_BOOTP_HOSTNAME
/* /*
* Command line configuration. * Command line configuration.
*/ */
@ -57,7 +56,6 @@
#define CONFIG_CMD_BSP #define CONFIG_CMD_BSP
#define CONFIG_CMD_EEPROM #define CONFIG_CMD_EEPROM
#undef CONFIG_WATCHDOG /* watchdog disabled */ #undef CONFIG_WATCHDOG /* watchdog disabled */
#define CONFIG_SDRAM_BANK0 1 /* init onboard SDRAM bank 0 */ #define CONFIG_SDRAM_BANK0 1 /* init onboard SDRAM bank 0 */
@ -67,7 +65,6 @@
*/ */
#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LONGHELP /* undef to save memory */
#if defined(CONFIG_CMD_KGDB) #if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else #else
@ -102,7 +99,6 @@
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */ #define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */ #define CONFIG_VERSION_VARIABLE 1 /* include version env variable */

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@ -62,7 +62,6 @@
#define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_BOOTP_SEND_HOSTNAME
/* /*
* Command line configuration. * Command line configuration.
*/ */
@ -89,7 +88,6 @@
*/ */
#undef CONFIG_SYS_LONGHELP /* undef to save memory */ #undef CONFIG_SYS_LONGHELP /* undef to save memory */
#if defined(CONFIG_CMD_KGDB) #if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else #else

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@ -40,7 +40,6 @@
#define CONFIG_CMD_PCI #define CONFIG_CMD_PCI
#define CONFIG_CMD_REGINFO #define CONFIG_CMD_REGINFO
#define CONFIG_MCFFEC #define CONFIG_MCFFEC
#ifdef CONFIG_MCFFEC #ifdef CONFIG_MCFFEC
# define CONFIG_MII 1 # define CONFIG_MII 1

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@ -37,7 +37,6 @@
. = DEFINED(env_offset) ? env_offset : .; \ . = DEFINED(env_offset) ? env_offset : .; \
common/env_embedded.o (.text) common/env_embedded.o (.text)
/* /*
* BOOTP options * BOOTP options
*/ */

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@ -58,7 +58,6 @@
#define CONFIG_CMD_CACHE #define CONFIG_CMD_CACHE
#define CONFIG_CMD_MII #define CONFIG_CMD_MII
#define CONFIG_MCFFEC #define CONFIG_MCFFEC
#ifdef CONFIG_MCFFEC #ifdef CONFIG_MCFFEC
#define CONFIG_MII 1 #define CONFIG_MII 1

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@ -21,7 +21,6 @@
#define CONFIG_SYS_TEXT_BASE 0xFFF80000 #define CONFIG_SYS_TEXT_BASE 0xFFF80000
/*********************************************************** /***********************************************************
* Note that it may also be a MIP405T board which is a subset of the * Note that it may also be a MIP405T board which is a subset of the
* MIP405 * MIP405
@ -37,7 +36,6 @@
***********************************************************/ ***********************************************************/
#define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */ #define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */
/* /*
* BOOTP options * BOOTP options
*/ */
@ -46,7 +44,6 @@
#define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME #define CONFIG_BOOTP_HOSTNAME
/* /*
* Command line configuration. * Command line configuration.
*/ */
@ -66,7 +63,6 @@
#if !defined(CONFIG_MIP405T) #if !defined(CONFIG_MIP405T)
#endif #endif
/************************************************************** /**************************************************************
* I2C Stuff: * I2C Stuff:
* the MIP405 is equiped with an Atmel 24C128/256 EEPROM at address * the MIP405 is equiped with an Atmel 24C128/256 EEPROM at address
@ -89,7 +85,6 @@
/* last 6 bits of the address */ /* last 6 bits of the address */
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
#define CONFIG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */ #define CONFIG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */
#define CONFIG_ENV_OFFSET 0x00000 /* environment starts at the beginning of the EEPROM */ #define CONFIG_ENV_OFFSET 0x00000 /* environment starts at the beginning of the EEPROM */
#define CONFIG_ENV_SIZE 0x00800 /* 2k bytes may be used for env vars */ #define CONFIG_ENV_SIZE 0x00800 /* 2k bytes may be used for env vars */
@ -280,7 +275,6 @@
#define MULTI_PURPOSE_SOCKET_ADDR 0xF8000000 #define MULTI_PURPOSE_SOCKET_ADDR 0xF8000000
#define CONFIG_PORT_ADDR PER_PLD_ADDR + 5 #define CONFIG_PORT_ADDR PER_PLD_ADDR + 5
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* Definitions for initial stack pointer and data area (in On Chip SRAM) * Definitions for initial stack pointer and data area (in On Chip SRAM)
*/ */
@ -406,5 +400,4 @@
#define CONFIG_IDENT_STRING "\n(c) 2003 by MPL AG Switzerland, PCI_BOOT Version" #define CONFIG_IDENT_STRING "\n(c) 2003 by MPL AG Switzerland, PCI_BOOT Version"
#endif #endif
#endif /* __CONFIG_H */ #endif /* __CONFIG_H */

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@ -276,7 +276,6 @@
#define CONFIG_SYS_NAND_BLOCK_SIZE 16384 #define CONFIG_SYS_NAND_BLOCK_SIZE 16384
#define CONFIG_SYS_NAND_WINDOW_SIZE (32 * 1024) #define CONFIG_SYS_NAND_WINDOW_SIZE (32 * 1024)
#define CONFIG_SYS_NAND_BR_PRELIM (CONFIG_SYS_NAND_BASE \ #define CONFIG_SYS_NAND_BR_PRELIM (CONFIG_SYS_NAND_BASE \
| BR_DECC_CHK_GEN /* Use HW ECC */ \ | BR_DECC_CHK_GEN /* Use HW ECC */ \
| BR_PS_8 /* 8 bit port */ \ | BR_PS_8 /* 8 bit port */ \
@ -427,7 +426,6 @@
#define TSEC2_PHYIDX 0 #define TSEC2_PHYIDX 0
#endif #endif
/* Options are: TSEC[0-1] */ /* Options are: TSEC[0-1] */
#define CONFIG_ETHPRIME "TSEC1" #define CONFIG_ETHPRIME "TSEC1"
@ -474,7 +472,6 @@
#define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME #define CONFIG_BOOTP_HOSTNAME
/* /*
* Command line configuration. * Command line configuration.
*/ */

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@ -635,7 +635,6 @@
"tftp $fdtaddr $fdtfile;" \ "tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr" "bootm $loadaddr $ramdiskaddr $fdtaddr"
#define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND #define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND
#endif /* __CONFIG_H */ #endif /* __CONFIG_H */

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@ -337,7 +337,6 @@
#define CONFIG_SYS_PCI_SLV_MEM_BUS 0x00000000 #define CONFIG_SYS_PCI_SLV_MEM_BUS 0x00000000
#define CONFIG_SYS_PCI_SLV_MEM_SIZE 0x80000000 #define CONFIG_SYS_PCI_SLV_MEM_SIZE 0x80000000
#ifdef CONFIG_PCI #ifdef CONFIG_PCI
#define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_PCI_INDIRECT_BRIDGE
@ -407,7 +406,6 @@
#define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME #define CONFIG_BOOTP_HOSTNAME
/* /*
* Command line configuration. * Command line configuration.
*/ */
@ -602,7 +600,6 @@
"tftp $fdtaddr $fdtfile;" \ "tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr" "bootm $loadaddr $ramdiskaddr $fdtaddr"
#define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND #define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND
#endif /* __CONFIG_H */ #endif /* __CONFIG_H */

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@ -464,7 +464,6 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
/* /*
* BOOTP options * BOOTP options
*/ */
@ -473,7 +472,6 @@
#define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME #define CONFIG_BOOTP_HOSTNAME
/* /*
* Command line configuration. * Command line configuration.
*/ */
@ -617,7 +615,6 @@
HID0_ENABLE_M_BIT |\ HID0_ENABLE_M_BIT |\
HID0_ENABLE_ADDRESS_BROADCAST) */ HID0_ENABLE_ADDRESS_BROADCAST) */
#define CONFIG_SYS_HID2 HID2_HBE #define CONFIG_SYS_HID2 HID2_HBE
#define CONFIG_HIGH_BATS 1 /* High BATs supported */ #define CONFIG_HIGH_BATS 1 /* High BATs supported */

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@ -484,7 +484,6 @@ boards, we say we have two, but don't display a message if we find only one. */
#define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME #define CONFIG_BOOTP_HOSTNAME
/* /*
* Command line configuration. * Command line configuration.
*/ */
@ -710,7 +709,6 @@ boards, we say we have two, but don't display a message if we find only one. */
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#endif #endif
/* /*
* Environment Configuration * Environment Configuration
*/ */

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@ -475,7 +475,6 @@ extern int board_pci_host_broken(void);
#define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME #define CONFIG_BOOTP_HOSTNAME
/* /*
* Command line configuration. * Command line configuration.
*/ */
@ -695,7 +694,6 @@ extern int board_pci_host_broken(void);
"tftp $fdtaddr $fdtfile;" \ "tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr" "bootm $loadaddr $ramdiskaddr $fdtaddr"
#define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND #define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND
#endif /* __CONFIG_H */ #endif /* __CONFIG_H */

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@ -486,7 +486,6 @@
#define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME #define CONFIG_BOOTP_HOSTNAME
/* /*
* Command line configuration. * Command line configuration.
*/ */

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@ -156,7 +156,6 @@
#undef CONFIG_CLOCKS_IN_MHZ #undef CONFIG_CLOCKS_IN_MHZ
/* /*
* Memory map -- xxx -this is wrong, needs updating * Memory map -- xxx -this is wrong, needs updating
* *

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@ -65,7 +65,6 @@
#define CONFIG_SYS_CLK_FREQ 33000000 #define CONFIG_SYS_CLK_FREQ 33000000
#endif #endif
/* /*
* These can be toggled for performance analysis, otherwise use default. * These can be toggled for performance analysis, otherwise use default.
*/ */
@ -136,7 +135,6 @@
#undef CONFIG_CLOCKS_IN_MHZ #undef CONFIG_CLOCKS_IN_MHZ
/* /*
* Local Bus Definitions * Local Bus Definitions
*/ */
@ -201,7 +199,6 @@
#define CONFIG_SYS_LBC_LSDMR_4 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_MRW) #define CONFIG_SYS_LBC_LSDMR_4 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_MRW)
#define CONFIG_SYS_LBC_LSDMR_5 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_NORMAL) #define CONFIG_SYS_LBC_LSDMR_5 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_NORMAL)
/* /*
* 32KB, 8-bit wide for ADS config reg * 32KB, 8-bit wide for ADS config reg
*/ */
@ -278,7 +275,6 @@
#endif /* CONFIG_PCI */ #endif /* CONFIG_PCI */
#if defined(CONFIG_TSEC_ENET) #if defined(CONFIG_TSEC_ENET)
#define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_MII 1 /* MII PHY management */
@ -293,7 +289,6 @@
#define TSEC1_FLAGS TSEC_GIGABIT #define TSEC1_FLAGS TSEC_GIGABIT
#define TSEC2_FLAGS TSEC_GIGABIT #define TSEC2_FLAGS TSEC_GIGABIT
#if CONFIG_HAS_FEC #if CONFIG_HAS_FEC
#define CONFIG_MPC85XX_FEC 1 #define CONFIG_MPC85XX_FEC 1
#define CONFIG_MPC85XX_FEC_NAME "FEC" #define CONFIG_MPC85XX_FEC_NAME "FEC"
@ -307,7 +302,6 @@
#endif /* CONFIG_TSEC_ENET */ #endif /* CONFIG_TSEC_ENET */
/* /*
* Environment * Environment
*/ */
@ -326,7 +320,6 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
/* /*
* BOOTP options * BOOTP options
*/ */
@ -335,7 +328,6 @@
#define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME #define CONFIG_BOOTP_HOSTNAME
/* /*
* Command line configuration. * Command line configuration.
*/ */
@ -377,7 +369,6 @@
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#endif #endif
/* /*
* Environment Configuration * Environment Configuration
*/ */

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@ -133,7 +133,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_CFI
#define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_FLASH_EMPTY_INFO
/* /*
* SDRAM on the Local Bus * SDRAM on the Local Bus
*/ */
@ -314,7 +313,6 @@ extern unsigned long get_clock_freq(void);
#endif /* CONFIG_PCI */ #endif /* CONFIG_PCI */
#if defined(CONFIG_TSEC_ENET) #if defined(CONFIG_TSEC_ENET)
#define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_MII 1 /* MII PHY management */
@ -353,7 +351,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME #define CONFIG_BOOTP_HOSTNAME
/* /*
* Command line configuration. * Command line configuration.
*/ */
@ -365,7 +362,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_CMD_PCI #define CONFIG_CMD_PCI
#endif #endif
#undef CONFIG_WATCHDOG /* watchdog disabled */ #undef CONFIG_WATCHDOG /* watchdog disabled */
/* /*

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@ -179,12 +179,10 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define PIXIS_VSPEED2_MASK (PIXIS_VSPEED2_TSEC1SER|PIXIS_VSPEED2_TSEC3SER) #define PIXIS_VSPEED2_MASK (PIXIS_VSPEED2_TSEC1SER|PIXIS_VSPEED2_TSEC3SER)
#define PIXIS_VCFGEN1_MASK (PIXIS_VCFGEN1_TSEC1SER|PIXIS_VCFGEN1_TSEC3SER) #define PIXIS_VCFGEN1_MASK (PIXIS_VCFGEN1_TSEC1SER|PIXIS_VCFGEN1_TSEC3SER)
#define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_LOCK 1
#define CONFIG_SYS_INIT_RAM_ADDR 0xf4010000 /* Initial L1 address */ #define CONFIG_SYS_INIT_RAM_ADDR 0xf4010000 /* Initial L1 address */
#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 /* Size of used area in RAM */ #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 /* Size of used area in RAM */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
@ -317,7 +315,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#endif /* CONFIG_PCI */ #endif /* CONFIG_PCI */
#if defined(CONFIG_TSEC_ENET) #if defined(CONFIG_TSEC_ENET)
#define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_MII 1 /* MII PHY management */
@ -368,7 +365,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME #define CONFIG_BOOTP_HOSTNAME
/* /*
* Command line configuration. * Command line configuration.
*/ */

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@ -132,7 +132,6 @@ extern unsigned long get_clock_freq(void);
* *
*/ */
/* /*
* Local Bus Definitions * Local Bus Definitions
*/ */
@ -421,7 +420,6 @@ extern unsigned long get_clock_freq(void);
#endif /* CONFIG_PCI */ #endif /* CONFIG_PCI */
#if defined(CONFIG_TSEC_ENET) #if defined(CONFIG_TSEC_ENET)
#define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_MII 1 /* MII PHY management */
@ -479,7 +477,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME #define CONFIG_BOOTP_HOSTNAME
/* /*
* Command line configuration. * Command line configuration.
*/ */
@ -491,7 +488,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_CMD_PCI #define CONFIG_CMD_PCI
#endif #endif
#undef CONFIG_WATCHDOG /* watchdog disabled */ #undef CONFIG_WATCHDOG /* watchdog disabled */
/* /*
@ -580,7 +576,6 @@ extern unsigned long get_clock_freq(void);
"tftp $fdtaddr $fdtfile;" \ "tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr" "bootm $loadaddr - $fdtaddr"
#define CONFIG_RAMBOOTCOMMAND \ #define CONFIG_RAMBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \ "setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs;" \ "console=$consoledev,$baudrate $othbootargs;" \

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@ -33,7 +33,6 @@
#define CONFIG_FSL_VIA #define CONFIG_FSL_VIA
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
extern unsigned long get_clock_freq(void); extern unsigned long get_clock_freq(void);
#endif #endif
@ -131,7 +130,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_CFI
#define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_FLASH_EMPTY_INFO
/* /*
* SDRAM on the Local Bus * SDRAM on the Local Bus
*/ */
@ -312,7 +310,6 @@ extern unsigned long get_clock_freq(void);
#endif /* CONFIG_PCI */ #endif /* CONFIG_PCI */
#if defined(CONFIG_TSEC_ENET) #if defined(CONFIG_TSEC_ENET)
#define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_MII 1 /* MII PHY management */
@ -351,7 +348,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME #define CONFIG_BOOTP_HOSTNAME
/* /*
* Command line configuration. * Command line configuration.
*/ */
@ -363,7 +359,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_CMD_PCI #define CONFIG_CMD_PCI
#endif #endif
#undef CONFIG_WATCHDOG /* watchdog disabled */ #undef CONFIG_WATCHDOG /* watchdog disabled */
/* /*

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@ -60,7 +60,6 @@
#define CONFIG_SYS_CLK_FREQ 33000000 #define CONFIG_SYS_CLK_FREQ 33000000
#endif #endif
/* /*
* These can be toggled for performance analysis, otherwise use default. * These can be toggled for performance analysis, otherwise use default.
*/ */
@ -133,7 +132,6 @@
#undef CONFIG_CLOCKS_IN_MHZ #undef CONFIG_CLOCKS_IN_MHZ
/* /*
* Local Bus Definitions * Local Bus Definitions
*/ */
@ -198,7 +196,6 @@
#define CONFIG_SYS_LBC_LSDMR_4 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_MRW) #define CONFIG_SYS_LBC_LSDMR_4 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_MRW)
#define CONFIG_SYS_LBC_LSDMR_5 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_NORMAL) #define CONFIG_SYS_LBC_LSDMR_5 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_NORMAL)
/* /*
* 32KB, 8-bit wide for ADS config reg * 32KB, 8-bit wide for ADS config reg
*/ */
@ -273,7 +270,6 @@
#endif /* CONFIG_PCI */ #endif /* CONFIG_PCI */
#ifdef CONFIG_TSEC_ENET #ifdef CONFIG_TSEC_ENET
#ifndef CONFIG_MII #ifndef CONFIG_MII
@ -345,7 +341,6 @@
#endif #endif
/* /*
* Environment * Environment
*/ */
@ -372,7 +367,6 @@
#define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME #define CONFIG_BOOTP_HOSTNAME
/* /*
* Command line configuration. * Command line configuration.
*/ */
@ -419,7 +413,6 @@
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#endif #endif
/* /*
* Environment Configuration * Environment Configuration
*/ */

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@ -51,7 +51,6 @@ extern unsigned long get_clock_freq(void);
*/ */
#define CONFIG_ENABLE_36BIT_PHYS 1 #define CONFIG_ENABLE_36BIT_PHYS 1
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */
@ -144,14 +143,12 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_CFI
#define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_FLASH_EMPTY_INFO
/* /*
* SDRAM on the LocalBus * SDRAM on the LocalBus
*/ */
#define CONFIG_SYS_LBC_SDRAM_BASE 0xf0000000 /* Localbus SDRAM */ #define CONFIG_SYS_LBC_SDRAM_BASE 0xf0000000 /* Localbus SDRAM */
#define CONFIG_SYS_LBC_SDRAM_SIZE 64 /* LBC SDRAM is 64MB */ #define CONFIG_SYS_LBC_SDRAM_SIZE 64 /* LBC SDRAM is 64MB */
/*Chip select 2 - SDRAM*/ /*Chip select 2 - SDRAM*/
#define CONFIG_SYS_BR2_PRELIM 0xf0001861 #define CONFIG_SYS_BR2_PRELIM 0xf0001861
#define CONFIG_SYS_OR2_PRELIM 0xfc006901 #define CONFIG_SYS_OR2_PRELIM 0xfc006901
@ -364,7 +361,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
/* /*
* BOOTP options * BOOTP options
*/ */
@ -373,7 +369,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME #define CONFIG_BOOTP_HOSTNAME
/* /*
* Command line configuration. * Command line configuration.
*/ */
@ -385,7 +380,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_CMD_PCI #define CONFIG_CMD_PCI
#endif #endif
#undef CONFIG_WATCHDOG /* watchdog disabled */ #undef CONFIG_WATCHDOG /* watchdog disabled */
/* /*
@ -459,14 +453,12 @@ extern unsigned long get_clock_freq(void);
"ramargs=setenv bootargs root=/dev/ram rw " \ "ramargs=setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs\0" \ "console=$consoledev,$baudrate $othbootargs\0" \
#define CONFIG_NFSBOOTCOMMAND \ #define CONFIG_NFSBOOTCOMMAND \
"run nfsargs;" \ "run nfsargs;" \
"tftp $loadaddr $bootfile;" \ "tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \ "tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr" "bootm $loadaddr - $fdtaddr"
#define CONFIG_RAMBOOTCOMMAND \ #define CONFIG_RAMBOOTCOMMAND \
"run ramargs;" \ "run ramargs;" \
"tftp $ramdiskaddr $ramdiskfile;" \ "tftp $ramdiskaddr $ramdiskfile;" \

View File

@ -463,7 +463,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME #define CONFIG_BOOTP_HOSTNAME
/* /*
* Command line configuration. * Command line configuration.
*/ */
@ -475,7 +474,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_CMD_PCI #define CONFIG_CMD_PCI
#endif #endif
#undef CONFIG_WATCHDOG /* watchdog disabled */ #undef CONFIG_WATCHDOG /* watchdog disabled */
#define CONFIG_MMC 1 #define CONFIG_MMC 1

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@ -177,7 +177,6 @@
#define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE #define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE
#endif #endif
#define CONFIG_FLASH_BR_PRELIM \ #define CONFIG_FLASH_BR_PRELIM \
(BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000) | BR_PS_16 | BR_V) (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000) | BR_PS_16 | BR_V)
#define CONFIG_FLASH_OR_PRELIM 0xf8000ff7 #define CONFIG_FLASH_OR_PRELIM 0xf8000ff7
@ -318,7 +317,6 @@
#define CONFIG_SYS_NAND_U_BOOT_RELOC (CONFIG_SYS_INIT_L2_END - 0x2000) #define CONFIG_SYS_NAND_U_BOOT_RELOC (CONFIG_SYS_INIT_L2_END - 0x2000)
#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP ((CONFIG_SYS_INIT_L2_END - 1) & ~0xF) #define CONFIG_SYS_NAND_U_BOOT_RELOC_SP ((CONFIG_SYS_INIT_L2_END - 1) & ~0xF)
/* NAND flash config */ /* NAND flash config */
#define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ #define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \
| (2<<BR_DECC_SHIFT) /* Use HW ECC */ \ | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \
@ -358,7 +356,6 @@
| BR_V) /* valid */ | BR_V) /* valid */
#define CONFIG_SYS_OR6_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ #define CONFIG_SYS_OR6_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
/* Serial Port - controlled on board with jumper J8 /* Serial Port - controlled on board with jumper J8
* open - index 2 * open - index 2
* shorted - index 1 * shorted - index 1
@ -509,7 +506,6 @@
#endif /* CONFIG_PCI */ #endif /* CONFIG_PCI */
#if defined(CONFIG_TSEC_ENET) #if defined(CONFIG_TSEC_ENET)
#define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_MII 1 /* MII PHY management */

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@ -20,7 +20,6 @@
#define CONFIG_SYS_TEXT_BASE 0xfff00000 #define CONFIG_SYS_TEXT_BASE 0xfff00000
/* video */ /* video */
#define CONFIG_FSL_DIU_FB #define CONFIG_FSL_DIU_FB
@ -136,14 +135,12 @@
#endif #endif
#define CONFIG_ID_EEPROM #define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID #define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_ID_EEPROM #define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_FLASH_BASE 0xf0000000 /* start of FLASH 128M */ #define CONFIG_SYS_FLASH_BASE 0xf0000000 /* start of FLASH 128M */
#define CONFIG_SYS_FLASH_BASE2 0xf8000000 #define CONFIG_SYS_FLASH_BASE2 0xf8000000
@ -161,7 +158,6 @@
#define CONFIG_SYS_BR3_PRELIM 0xe8000801 /* port size 8bit */ #define CONFIG_SYS_BR3_PRELIM 0xe8000801 /* port size 8bit */
#define CONFIG_SYS_OR3_PRELIM 0xfff06ff7 /* 1MB PIXIS area*/ #define CONFIG_SYS_OR3_PRELIM 0xfff06ff7 /* 1MB PIXIS area*/
#define CONFIG_FSL_PIXIS 1 /* use common PIXIS code */ #define CONFIG_FSL_PIXIS 1 /* use common PIXIS code */
#define PIXIS_BASE 0xe8000000 /* PIXIS registers */ #define PIXIS_BASE 0xe8000000 /* PIXIS registers */
#define PIXIS_ID 0x0 /* Board ID at offset 0 */ #define PIXIS_ID 0x0 /* Board ID at offset 0 */
@ -277,7 +273,6 @@
#define CONFIG_SYS_PCIE2_IO_PHYS 0xe2000000 #define CONFIG_SYS_PCIE2_IO_PHYS 0xe2000000
#define CONFIG_SYS_PCIE2_IO_SIZE 0x00100000 /* 1M */ #define CONFIG_SYS_PCIE2_IO_SIZE 0x00100000 /* 1M */
#if defined(CONFIG_PCI) #if defined(CONFIG_PCI)
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
@ -386,7 +381,6 @@
#define CONFIG_SYS_IBAT4L (CONFIG_SYS_PCIE2_IO_PHYS | BATL_PP_RW | BATL_CACHEINHIBIT) #define CONFIG_SYS_IBAT4L (CONFIG_SYS_PCIE2_IO_PHYS | BATL_PP_RW | BATL_CACHEINHIBIT)
#define CONFIG_SYS_IBAT4U CONFIG_SYS_DBAT4U #define CONFIG_SYS_IBAT4U CONFIG_SYS_DBAT4U
/* /*
* BAT5 128K Cacheable, non-guarded * BAT5 128K Cacheable, non-guarded
* 0xe400_0000 128K Init RAM for stack in the CPU DCache (no backing memory) * 0xe400_0000 128K Init RAM for stack in the CPU DCache (no backing memory)
@ -424,7 +418,6 @@
#define CONFIG_SYS_IBAT7L (PIXIS_BASE | BATL_PP_RW | BATL_CACHEINHIBIT) #define CONFIG_SYS_IBAT7L (PIXIS_BASE | BATL_PP_RW | BATL_CACHEINHIBIT)
#define CONFIG_SYS_IBAT7U CONFIG_SYS_DBAT7U #define CONFIG_SYS_IBAT7U CONFIG_SYS_DBAT7U
/* /*
* Environment * Environment
*/ */
@ -442,7 +435,6 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
/* /*
* BOOTP options * BOOTP options
*/ */
@ -451,7 +443,6 @@
#define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME #define CONFIG_BOOTP_HOSTNAME
/* /*
* Command line configuration. * Command line configuration.
*/ */
@ -463,7 +454,6 @@
#define CONFIG_CMD_EXT2 #define CONFIG_CMD_EXT2
#endif #endif
#define CONFIG_WATCHDOG /* watchdog enabled */ #define CONFIG_WATCHDOG /* watchdog enabled */
#define CONFIG_SYS_WATCHDOG_FREQ 5000 /* Feed interval, 5s */ #define CONFIG_SYS_WATCHDOG_FREQ 5000 /* Feed interval, 5s */

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@ -134,7 +134,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define SPD_EEPROM_ADDRESS3 0x53 /* CTLR 1 DIMM 0 */ #define SPD_EEPROM_ADDRESS3 0x53 /* CTLR 1 DIMM 0 */
#define SPD_EEPROM_ADDRESS4 0x54 /* CTLR 1 DIMM 1 */ #define SPD_EEPROM_ADDRESS4 0x54 /* CTLR 1 DIMM 1 */
/* /*
* These are used when DDR doesn't use SPD. * These are used when DDR doesn't use SPD.
*/ */
@ -359,7 +358,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_PCI_PNP /* do pci plug-and-play */
#undef CONFIG_EEPRO100 #undef CONFIG_EEPRO100
#undef CONFIG_TULIP #undef CONFIG_TULIP
@ -440,7 +438,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#endif /* CONFIG_TSEC_ENET */ #endif /* CONFIG_TSEC_ENET */
#ifdef CONFIG_PHYS_64BIT #ifdef CONFIG_PHYS_64BIT
#define PHYS_HIGH_TO_BXPN(x) ((x & 0x0000000e) << 8) #define PHYS_HIGH_TO_BXPN(x) ((x & 0x0000000e) << 8)
#define PHYS_HIGH_TO_BX(x) ((x & 0x00000001) << 2) #define PHYS_HIGH_TO_BX(x) ((x & 0x00000001) << 2)
@ -600,7 +597,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
/* /*
* BOOTP options * BOOTP options
*/ */
@ -609,7 +605,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME #define CONFIG_BOOTP_HOSTNAME
/* /*
* Command line configuration. * Command line configuration.
*/ */
@ -621,7 +616,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_CMD_EXT2 #define CONFIG_CMD_EXT2
#endif #endif
#undef CONFIG_WATCHDOG /* watchdog disabled */ #undef CONFIG_WATCHDOG /* watchdog disabled */
/* /*
@ -703,7 +697,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
"dis-wd=mw.b ffdf0010 0x00; echo -expect:- 00; md.b ffdf0010 1\0" \ "dis-wd=mw.b ffdf0010 0x00; echo -expect:- 00; md.b ffdf0010 1\0" \
"maxcpus=2" "maxcpus=2"
#define CONFIG_NFSBOOTCOMMAND \ #define CONFIG_NFSBOOTCOMMAND \
"setenv bootargs root=/dev/nfs rw " \ "setenv bootargs root=/dev/nfs rw " \
"nfsroot=$serverip:$rootpath " \ "nfsroot=$serverip:$rootpath " \

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@ -185,7 +185,6 @@
#define CONFIG_CMD_PCI #define CONFIG_CMD_PCI
/* /*
* PCI Windows * PCI Windows
* Memory space is mapped 1-1, but I/O space must start from 0. * Memory space is mapped 1-1, but I/O space must start from 0.
@ -699,7 +698,6 @@ extern unsigned long get_sdram_size(void);
#endif /* CONFIG_TSEC_ENET */ #endif /* CONFIG_TSEC_ENET */
/* SATA */ /* SATA */
#define CONFIG_FSL_SATA #define CONFIG_FSL_SATA
#define CONFIG_FSL_SATA_V2 #define CONFIG_FSL_SATA_V2

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@ -172,7 +172,6 @@
#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
#endif #endif
/* DDR Setup */ /* DDR Setup */
#define CONFIG_DDR_SPD #define CONFIG_DDR_SPD
#define CONFIG_VERY_BIG_RAM #define CONFIG_VERY_BIG_RAM
@ -217,7 +216,6 @@
#define CONFIG_SYS_DDR_ZQ_CONTROL 0x89080600 #define CONFIG_SYS_DDR_ZQ_CONTROL 0x89080600
#define CONFIG_SYS_DDR_WRLVL_CONTROL 0x8675f608 #define CONFIG_SYS_DDR_WRLVL_CONTROL 0x8675f608
/* /*
* Memory map * Memory map
* *

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@ -21,14 +21,12 @@
#define CONFIG_SYS_TEXT_BASE 0xFFF00000 #define CONFIG_SYS_TEXT_BASE 0xFFF00000
/* Serial Console Configuration */ /* Serial Console Configuration */
#define CONFIG_5xx_CONS_SCI1 #define CONFIG_5xx_CONS_SCI1
#undef CONFIG_5xx_CONS_SCI2 #undef CONFIG_5xx_CONS_SCI2
#define CONFIG_BAUDRATE 9600 #define CONFIG_BAUDRATE 9600
/* /*
* BOOTP options * BOOTP options
*/ */
@ -37,7 +35,6 @@
#define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME #define CONFIG_BOOTP_HOSTNAME
/* /*
* Command line configuration. * Command line configuration.
*/ */
@ -47,7 +44,6 @@
#define CONFIG_CMD_EEPROM #define CONFIG_CMD_EEPROM
#define CONFIG_CMD_IRQ #define CONFIG_CMD_IRQ
#if 0 #if 0
#define CONFIG_BOOTDELAY -1 /* autoboot disabled */ #define CONFIG_BOOTDELAY -1 /* autoboot disabled */
#else #else
@ -135,7 +131,6 @@
*/ */
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* FLASH organization * FLASH organization
*----------------------------------------------------------------------- *-----------------------------------------------------------------------
@ -165,7 +160,6 @@
#define CONFIG_ENV_OFFSET ((0 - CONFIG_SYS_FLASH_BASE) - CONFIG_ENV_SIZE) /* Environment starts at this adress */ #define CONFIG_ENV_OFFSET ((0 - CONFIG_SYS_FLASH_BASE) - CONFIG_ENV_SIZE) /* Environment starts at this adress */
#endif #endif
#define CONFIG_SPI 1 #define CONFIG_SPI 1
#define CONFIG_SYS_SPI_CS_USED 0x09 /* CS0 and CS3 are used */ #define CONFIG_SYS_SPI_CS_USED 0x09 /* CS0 and CS3 are used */
#define CONFIG_SYS_SPI_CS_BASE 0x08 /* CS3 is active low */ #define CONFIG_SYS_SPI_CS_BASE 0x08 /* CS3 is active low */
@ -224,7 +218,6 @@
*/ */
#define CONFIG_SYS_OSC_CLK ((uint)4000000) /* Oscillator clock is 4MHz */ #define CONFIG_SYS_OSC_CLK ((uint)4000000) /* Oscillator clock is 4MHz */
#define CONFIG_SYS_PLPRCR (PLPRCR_MF_9 | PLPRCR_DIVF_0) #define CONFIG_SYS_PLPRCR (PLPRCR_MF_9 | PLPRCR_DIVF_0)
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------

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@ -21,13 +21,11 @@
#define CONFIG_SYS_TEXT_BASE 0xFFF80000 #define CONFIG_SYS_TEXT_BASE 0xFFF80000
/*********************************************************** /***********************************************************
* Clock * Clock
***********************************************************/ ***********************************************************/
#define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */ #define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */
/* /*
* BOOTP options * BOOTP options
*/ */
@ -36,7 +34,6 @@
#define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME #define CONFIG_BOOTP_HOSTNAME
/* /*
* Command line configuration. * Command line configuration.
*/ */
@ -81,7 +78,6 @@
/* last 6 bits of the address */ /* last 6 bits of the address */
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
/*************************************************************** /***************************************************************
* Definitions for Serial Presence Detect EEPROM address * Definitions for Serial Presence Detect EEPROM address
* (to get SDRAM settings) * (to get SDRAM settings)
@ -96,13 +92,11 @@
**************************************************************/ **************************************************************/
#define CONFIG_BAUDRATE 9600 /* STD Baudrate */ #define CONFIG_BAUDRATE 9600 /* STD Baudrate */
#define CONFIG_BOOTDELAY 5 #define CONFIG_BOOTDELAY 5
/* autoboot (do NOT change this set environment variable "bootdelay" to -1 instead) */ /* autoboot (do NOT change this set environment variable "bootdelay" to -1 instead) */
/* #define CONFIG_BOOT_RETRY_TIME -10 /XXX* feature is available but not enabled */ /* #define CONFIG_BOOT_RETRY_TIME -10 /XXX* feature is available but not enabled */
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check console even if bootdelay = 0 */ #define CONFIG_ZERO_BOOTDELAY_CHECK /* check console even if bootdelay = 0 */
#define CONFIG_BOOTCOMMAND "diskboot 400000 0:1; bootm" /* autoboot command */ #define CONFIG_BOOTCOMMAND "diskboot 400000 0:1; bootm" /* autoboot command */
#define CONFIG_BOOTARGS "console=ttyS0,9600 root=/dev/hda5" /* boot arguments */ #define CONFIG_BOOTARGS "console=ttyS0,9600 root=/dev/hda5" /* boot arguments */
@ -231,7 +225,6 @@
#define CONFIG_PORT_ADDR 0xF4000000 #define CONFIG_PORT_ADDR 0xF4000000
#define MULTI_PURPOSE_SOCKET_ADDR 0xF8000000 #define MULTI_PURPOSE_SOCKET_ADDR 0xF8000000
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* Definitions for initial stack pointer and data area (in On Chip SRAM) * Definitions for initial stack pointer and data area (in On Chip SRAM)
*/ */
@ -353,5 +346,4 @@
#define CONFIG_ISO_STRING "MEV-10066-001" #define CONFIG_ISO_STRING "MEV-10066-001"
#define CONFIG_IDENT_STRING "\n(c) 2002 by MPL AG Switzerland, " CONFIG_ISO_STRING " " VERSION_TAG #define CONFIG_IDENT_STRING "\n(c) 2002 by MPL AG Switzerland, " CONFIG_ISO_STRING " " VERSION_TAG
#endif /* __CONFIG_H */ #endif /* __CONFIG_H */

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@ -47,7 +47,6 @@
#define CONFIG_PHY_CLK_FREQ EMAC_STACR_CLK_66MHZ /* 66 MHz OPB clock*/ #define CONFIG_PHY_CLK_FREQ EMAC_STACR_CLK_66MHZ /* 66 MHz OPB clock*/
/* /*
* BOOTP options * BOOTP options
*/ */
@ -56,7 +55,6 @@
#define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME #define CONFIG_BOOTP_HOSTNAME
/* /*
* Command line configuration. * Command line configuration.
*/ */
@ -86,7 +84,6 @@
*/ */
#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LONGHELP /* undef to save memory */
#if defined(CONFIG_CMD_KGDB) #if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else #else

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@ -158,7 +158,6 @@
#define CONFIG_SYS_FLASH_EMPTY_INFO 1 /* 'E' for empty sector (flinfo) */ #define CONFIG_SYS_FLASH_EMPTY_INFO 1 /* 'E' for empty sector (flinfo) */
#define CONFIG_SYS_FLASH_QUIET_TEST 1 /* don't warn upon unknown flash */ #define CONFIG_SYS_FLASH_QUIET_TEST 1 /* don't warn upon unknown flash */
/* /*
* Start addresses for the final memory configuration * Start addresses for the final memory configuration
* (Set up by the startup code) * (Set up by the startup code)

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@ -158,7 +158,6 @@
#define CONFIG_SYS_I2C_PPC4XX_SPEED_1 400000 #define CONFIG_SYS_I2C_PPC4XX_SPEED_1 400000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_1 0x7F #define CONFIG_SYS_I2C_PPC4XX_SLAVE_1 0x7F
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x54 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x54
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5

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@ -202,7 +202,6 @@
#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */ #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */
#endif #endif
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
unsigned long get_board_sys_clk(void); unsigned long get_board_sys_clk(void);
unsigned long get_board_ddr_clk(void); unsigned long get_board_ddr_clk(void);
@ -879,7 +878,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_BAUDRATE 115200 #define CONFIG_BAUDRATE 115200
#define __USB_PHY_TYPE utmi #define __USB_PHY_TYPE utmi
#define CONFIG_EXTRA_ENV_SETTINGS \ #define CONFIG_EXTRA_ENV_SETTINGS \
"hwconfig=fsl_ddr:ctlr_intlv=cacheline,bank_intlv=cs0_cs1;\0" \ "hwconfig=fsl_ddr:ctlr_intlv=cacheline,bank_intlv=cs0_cs1;\0" \
"usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0" \ "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0" \

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@ -217,7 +217,6 @@
#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */ #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */
#endif #endif
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
unsigned long get_board_sys_clk(void); unsigned long get_board_sys_clk(void);
unsigned long get_board_ddr_clk(void); unsigned long get_board_ddr_clk(void);
@ -916,7 +915,6 @@ unsigned long get_board_ddr_clk(void);
"setenv loadaddr 0x1000000;" \ "setenv loadaddr 0x1000000;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr" "bootm $loadaddr $ramdiskaddr $fdtaddr"
#define CONFIG_NFSBOOTCOMMAND \ #define CONFIG_NFSBOOTCOMMAND \
"setenv bootargs root=/dev/nfs rw " \ "setenv bootargs root=/dev/nfs rw " \
"nfsroot=$serverip:$rootpath " \ "nfsroot=$serverip:$rootpath " \

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@ -450,7 +450,6 @@ unsigned long get_board_ddr_clk(void);
#define I2C_MUX_PCA_ADDR 0x77 #define I2C_MUX_PCA_ADDR 0x77
#define I2C_MUX_PCA_ADDR_PRI 0x77 /* Primary Mux*/ #define I2C_MUX_PCA_ADDR_PRI 0x77 /* Primary Mux*/
/* I2C bus multiplexer */ /* I2C bus multiplexer */
#define I2C_MUX_CH_DEFAULT 0x8 #define I2C_MUX_CH_DEFAULT 0x8
#define I2C_MUX_CH_DIU 0xC #define I2C_MUX_CH_DIU 0xC

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@ -709,7 +709,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg
#endif #endif
#endif #endif
#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000
#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
#endif /* CONFIG_NOBQFMAN */ #endif /* CONFIG_NOBQFMAN */

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@ -744,7 +744,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_FSL_ESDHC_ADAPTER_IDENT #define CONFIG_FSL_ESDHC_ADAPTER_IDENT
#endif #endif
/* /*
* Dynamic MTD Partition support with mtdparts * Dynamic MTD Partition support with mtdparts
*/ */

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@ -652,7 +652,6 @@ unsigned long get_board_ddr_clk(void);
#define FM1_10GEC4_PHY_ADDR 0x01 #define FM1_10GEC4_PHY_ADDR 0x01
#endif #endif
#ifdef CONFIG_FMAN_ENET #ifdef CONFIG_FMAN_ENET
#define CONFIG_MII /* MII PHY management */ #define CONFIG_MII /* MII PHY management */
#define CONFIG_ETHPRIME "FM1@DTSEC3" #define CONFIG_ETHPRIME "FM1@DTSEC3"

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@ -343,7 +343,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_RAMBOOT #define CONFIG_SYS_RAMBOOT
#endif #endif
/* I2C */ /* I2C */
#define CONFIG_SYS_FSL_I2C_SPEED 100000 /* I2C speed */ #define CONFIG_SYS_FSL_I2C_SPEED 100000 /* I2C speed */
#define CONFIG_SYS_FSL_I2C2_SPEED 100000 /* I2C2 speed */ #define CONFIG_SYS_FSL_I2C2_SPEED 100000 /* I2C2 speed */
@ -404,7 +403,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SF_DEFAULT_SPEED 10000000 #define CONFIG_SF_DEFAULT_SPEED 10000000
#define CONFIG_SF_DEFAULT_MODE 0 #define CONFIG_SF_DEFAULT_MODE 0
/* Qman/Bman */ /* Qman/Bman */
#ifndef CONFIG_NOBQFMAN #ifndef CONFIG_NOBQFMAN
#define CONFIG_SYS_DPAA_QBMAN /* Support Q/Bman */ #define CONFIG_SYS_DPAA_QBMAN /* Support Q/Bman */
@ -492,7 +490,6 @@ unsigned long get_board_ddr_clk(void);
#define FM2_10GEC2_PHY_ADDR 0x3 #define FM2_10GEC2_PHY_ADDR 0x3
#endif #endif
/* SATA */ /* SATA */
#ifdef CONFIG_FSL_SATA_V2 #ifdef CONFIG_FSL_SATA_V2
#define CONFIG_LIBATA #define CONFIG_LIBATA

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@ -154,14 +154,12 @@
#define CONFIG_DDR_SPD #define CONFIG_DDR_SPD
#define CONFIG_SYS_FSL_DDR3 #define CONFIG_SYS_FSL_DDR3
/* /*
* IFC Definitions * IFC Definitions
*/ */
#define CONFIG_SYS_FLASH_BASE 0xe0000000 #define CONFIG_SYS_FLASH_BASE 0xe0000000
#define CONFIG_SYS_FLASH_BASE_PHYS (0xf00000000ull | CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_FLASH_BASE_PHYS (0xf00000000ull | CONFIG_SYS_FLASH_BASE)
#ifdef CONFIG_SPL_BUILD #ifdef CONFIG_SPL_BUILD
#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE #define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE
#else #else
@ -349,7 +347,6 @@
/* default location for tftp and bootm */ /* default location for tftp and bootm */
#define CONFIG_LOADADDR 1000000 #define CONFIG_LOADADDR 1000000
#define CONFIG_BAUDRATE 115200 #define CONFIG_BAUDRATE 115200
#define CONFIG_HVBOOT \ #define CONFIG_HVBOOT \
@ -572,7 +569,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_RAMBOOT #define CONFIG_SYS_RAMBOOT
#endif #endif
/* I2C */ /* I2C */
#define CONFIG_SYS_FSL_I2C_SPEED 100000 /* I2C speed */ #define CONFIG_SYS_FSL_I2C_SPEED 100000 /* I2C speed */
#define CONFIG_SYS_FSL_I2C2_SPEED 100000 /* I2C2 speed */ #define CONFIG_SYS_FSL_I2C2_SPEED 100000 /* I2C2 speed */
@ -606,7 +602,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SF_DEFAULT_SPEED 10000000 #define CONFIG_SF_DEFAULT_SPEED 10000000
#define CONFIG_SF_DEFAULT_MODE 0 #define CONFIG_SF_DEFAULT_MODE 0
/* Qman/Bman */ /* Qman/Bman */
#ifndef CONFIG_NOBQFMAN #ifndef CONFIG_NOBQFMAN
#define CONFIG_SYS_DPAA_QBMAN /* Support Q/Bman */ #define CONFIG_SYS_DPAA_QBMAN /* Support Q/Bman */
@ -696,7 +691,6 @@ unsigned long get_board_ddr_clk(void);
#define CORTINA_PHY_ADDR4 FM2_10GEC2_PHY_ADDR #define CORTINA_PHY_ADDR4 FM2_10GEC2_PHY_ADDR
#endif #endif
/* SATA */ /* SATA */
#ifdef CONFIG_FSL_SATA_V2 #ifdef CONFIG_FSL_SATA_V2
#define CONFIG_LIBATA #define CONFIG_LIBATA

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@ -117,7 +117,6 @@
#define CONFIG_SYS_CONSOLE_IS_IN_ENV #define CONFIG_SYS_CONSOLE_IS_IN_ENV
#endif /* #ifndef CONFIG_TQM5200S */ #endif /* #ifndef CONFIG_TQM5200S */
/* Partitions */ /* Partitions */
#define CONFIG_MAC_PARTITION #define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION #define CONFIG_DOS_PARTITION
@ -151,7 +150,6 @@
#define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4 #define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
#endif #endif
/* /*
* BOOTP options * BOOTP options
*/ */
@ -160,7 +158,6 @@
#define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME #define CONFIG_BOOTP_HOSTNAME
/* /*
* Command line configuration. * Command line configuration.
*/ */
@ -198,7 +195,6 @@
#define CONFIG_CMD_DIAG #define CONFIG_CMD_DIAG
#endif #endif
#define CONFIG_TIMESTAMP /* display image timestamps */ #define CONFIG_TIMESTAMP /* display image timestamps */
#if (CONFIG_SYS_TEXT_BASE != 0xFFF00000) #if (CONFIG_SYS_TEXT_BASE != 0xFFF00000)
@ -485,7 +481,6 @@
#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE #define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE
#endif #endif
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET

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@ -95,13 +95,11 @@
#define CONFIG_BOOTP_BOOTPATH #define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_BOOTFILESIZE #define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_MAC_PARTITION #define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION #define CONFIG_DOS_PARTITION
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */ #define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
/* /*
* Command line configuration. * Command line configuration.
*/ */
@ -115,7 +113,6 @@
#define CONFIG_CMD_BMP #define CONFIG_CMD_BMP
#endif #endif
#define CONFIG_NETCONSOLE #define CONFIG_NETCONSOLE
/* /*

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@ -93,13 +93,11 @@
#define CONFIG_BOOTP_BOOTPATH #define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_BOOTFILESIZE #define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_MAC_PARTITION #define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION #define CONFIG_DOS_PARTITION
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */ #define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
/* /*
* Command line configuration. * Command line configuration.
*/ */

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@ -282,7 +282,6 @@
#define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME #define CONFIG_BOOTP_HOSTNAME
/* /*
* Command line configuration. * Command line configuration.
*/ */
@ -307,7 +306,6 @@
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */ #define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#if defined(CONFIG_CMD_KGDB) #if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else #else

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@ -84,7 +84,6 @@
#define CONFIG_BOOTP_BOOTPATH #define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_BOOTFILESIZE #define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_MAC_PARTITION #define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION #define CONFIG_DOS_PARTITION

View File

@ -84,7 +84,6 @@
#define CONFIG_BOOTP_BOOTPATH #define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_BOOTFILESIZE #define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_MAC_PARTITION #define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION #define CONFIG_DOS_PARTITION
@ -99,10 +98,8 @@
#define CONFIG_CMD_IDE #define CONFIG_CMD_IDE
#define CONFIG_CMD_JFFS2 #define CONFIG_CMD_JFFS2
#define CONFIG_NETCONSOLE #define CONFIG_NETCONSOLE
/* /*
* Miscellaneous configurable options * Miscellaneous configurable options
*/ */

View File

@ -86,13 +86,11 @@
#define CONFIG_BOOTP_BOOTPATH #define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_BOOTFILESIZE #define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_MAC_PARTITION #define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION #define CONFIG_DOS_PARTITION
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */ #define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
/* /*
* Command line configuration. * Command line configuration.
*/ */

View File

@ -115,13 +115,11 @@
#define CONFIG_BOOTP_BOOTPATH #define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_BOOTFILESIZE #define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_MAC_PARTITION #define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION #define CONFIG_DOS_PARTITION
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */ #define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
/* /*
* Command line configuration. * Command line configuration.
*/ */

View File

@ -86,13 +86,11 @@
#define CONFIG_BOOTP_BOOTPATH #define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_BOOTFILESIZE #define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_MAC_PARTITION #define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION #define CONFIG_DOS_PARTITION
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */ #define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
/* /*
* Command line configuration. * Command line configuration.
*/ */

View File

@ -86,13 +86,11 @@
#define CONFIG_BOOTP_BOOTPATH #define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_BOOTFILESIZE #define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_MAC_PARTITION #define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION #define CONFIG_DOS_PARTITION
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */ #define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
/* /*
* Command line configuration. * Command line configuration.
*/ */

View File

@ -89,13 +89,11 @@
#define CONFIG_BOOTP_BOOTPATH #define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_BOOTFILESIZE #define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_MAC_PARTITION #define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION #define CONFIG_DOS_PARTITION
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */ #define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
/* /*
* Command line configuration. * Command line configuration.
*/ */

View File

@ -89,13 +89,11 @@
#define CONFIG_BOOTP_BOOTPATH #define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_BOOTFILESIZE #define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_MAC_PARTITION #define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION #define CONFIG_DOS_PARTITION
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */ #define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
/* /*
* Command line configuration. * Command line configuration.
*/ */

View File

@ -127,7 +127,6 @@
#define CONFIG_BOOTP_BOOTPATH #define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_BOOTFILESIZE #define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_MAC_PARTITION #define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION #define CONFIG_DOS_PARTITION
@ -135,7 +134,6 @@
#define CONFIG_TIMESTAMP /* but print image timestmps */ #define CONFIG_TIMESTAMP /* but print image timestmps */
/* /*
* Command line configuration. * Command line configuration.
*/ */

View File

@ -13,7 +13,6 @@
#ifndef __CONFIG_H #ifndef __CONFIG_H
#define __CONFIG_H #define __CONFIG_H
#define MACH_TYPE_MPL_VCMA9 227 #define MACH_TYPE_MPL_VCMA9 227
/* /*
@ -29,7 +28,6 @@
#define CONFIG_SYS_TEXT_BASE 0x0 #define CONFIG_SYS_TEXT_BASE 0x0
#define CONFIG_SYS_ARM_CACHE_WRITETHROUGH #define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
/* input clock of PLL (VCMA9 has 12MHz input clock) */ /* input clock of PLL (VCMA9 has 12MHz input clock) */
@ -113,7 +111,6 @@
/* RTC */ /* RTC */
#define CONFIG_RTC_S3C24X0 #define CONFIG_RTC_S3C24X0
/* allow to overwrite serial and ethaddr */ /* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE #define CONFIG_ENV_OVERWRITE

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@ -74,7 +74,6 @@
*/ */
#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LONGHELP /* undef to save memory */
#if defined(CONFIG_CMD_KGDB) #if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else #else

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@ -230,7 +230,6 @@
* +- 31 0 PSC1 * +- 31 0 PSC1
*/ */
/* /*
* Miscellaneous configurable options * Miscellaneous configurable options
*/ */

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@ -88,7 +88,6 @@
#define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME #define CONFIG_BOOTP_HOSTNAME
/* /*
* Command line configuration. * Command line configuration.
*/ */
@ -222,7 +221,6 @@
#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM #define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used area in DPRAM */ #define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used area in DPRAM */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
@ -276,7 +274,6 @@
# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif #endif
/* /*
* Various low-level settings * Various low-level settings
*/ */

View File

@ -342,7 +342,6 @@
CLOCK_SCCR2_DIU_EN | \ CLOCK_SCCR2_DIU_EN | \
CLOCK_SCCR2_I2C_EN) CLOCK_SCCR2_I2C_EN)
#define CONFIG_CMDLINE_EDITING 1 /* command line history */ #define CONFIG_CMDLINE_EDITING 1 /* command line history */
/* I2C */ /* I2C */

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@ -134,7 +134,6 @@
#define CONFIG_CMD_MMC /* MMC support */ #define CONFIG_CMD_MMC /* MMC support */
#define CONFIG_CMD_NAND /* NAND support */ #define CONFIG_CMD_NAND /* NAND support */
#define CONFIG_SYS_NO_FLASH #define CONFIG_SYS_NO_FLASH
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000

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@ -10,7 +10,6 @@
#ifndef __AMCC_COMMON_H #ifndef __AMCC_COMMON_H
#define __AMCC_COMMON_H #define __AMCC_COMMON_H
#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* Start of U-Boot */ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* Start of U-Boot */
#define CONFIG_SYS_MONITOR_LEN (0xFFFFFFFF - CONFIG_SYS_MONITOR_BASE + 1) #define CONFIG_SYS_MONITOR_LEN (0xFFFFFFFF - CONFIG_SYS_MONITOR_BASE + 1)
@ -88,7 +87,6 @@
#define CONFIG_VERSION_VARIABLE /* include version env variable */ #define CONFIG_VERSION_VARIABLE /* include version env variable */
#define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup*/ #define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup*/
#define CONFIG_LOADS_ECHO /* echo on for serial download */ #define CONFIG_LOADS_ECHO /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */ #define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */

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@ -147,7 +147,6 @@
#define CONFIG_ENV_VARS_UBOOT_CONFIG #define CONFIG_ENV_VARS_UBOOT_CONFIG
#define CONFIG_PREBOOT "run check_flash check_env;" #define CONFIG_PREBOOT "run check_flash check_env;"
/* /*
* Boot Linux * Boot Linux
*/ */

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@ -38,7 +38,6 @@
#define PHYS_SDRAM_1_SIZE 0x20000000 /* Max 512 MB RAM */ #define PHYS_SDRAM_1_SIZE 0x20000000 /* Max 512 MB RAM */
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
/* Environment */ /* Environment */
#define CONFIG_ENV_OVERWRITE #define CONFIG_ENV_OVERWRITE
#define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_IS_IN_NAND
@ -92,7 +91,6 @@
#define CONFIG_USB_STORAGE #define CONFIG_USB_STORAGE
#endif #endif
/* RTC */ /* RTC */
#ifdef CONFIG_CMD_DATE #ifdef CONFIG_CMD_DATE
#define CONFIG_RTC_PCF8563 #define CONFIG_RTC_PCF8563

View File

@ -68,7 +68,6 @@
#define CONFIG_CMD_FPGA_LOADMK #define CONFIG_CMD_FPGA_LOADMK
#define CONFIG_CMDLINE_EDITING #define CONFIG_CMDLINE_EDITING
#define CONFIG_MCFRTC #define CONFIG_MCFRTC
#undef RTC_DEBUG #undef RTC_DEBUG

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@ -60,7 +60,6 @@
#define CONFIG_CMD_BOOTZ #define CONFIG_CMD_BOOTZ
/* /*
* Memory Configuration * Memory Configuration
*/ */

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@ -61,7 +61,6 @@
#undef CONFIG_FB_ADDR #undef CONFIG_FB_ADDR
#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
/* LED */ /* LED */
#define CONFIG_AT91_LED #define CONFIG_AT91_LED
#define CONFIG_RED_LED AT91_PIN_PD14 /* this is the power led */ #define CONFIG_RED_LED AT91_PIN_PD14 /* this is the power led */

View File

@ -74,7 +74,6 @@
* NB: in this case, USB 1.1 devices won't be recognized. * NB: in this case, USB 1.1 devices won't be recognized.
*/ */
/* SDRAM */ /* SDRAM */
#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_BASE 0x20000000

View File

@ -86,7 +86,6 @@
#define CONFIG_CMD_JFFS2 #define CONFIG_CMD_JFFS2
#define CONFIG_CMD_MMC #define CONFIG_CMD_MMC
#define CONFIG_ATMEL_USART #define CONFIG_ATMEL_USART
#define CONFIG_MACB #define CONFIG_MACB
#define CONFIG_PORTMUX_PIO #define CONFIG_PORTMUX_PIO
@ -97,7 +96,6 @@
#define CONFIG_GENERIC_MMC #define CONFIG_GENERIC_MMC
#define CONFIG_ATMEL_SPI #define CONFIG_ATMEL_SPI
#define CONFIG_SYS_DCACHE_LINESZ 32 #define CONFIG_SYS_DCACHE_LINESZ 32
#define CONFIG_SYS_ICACHE_LINESZ 32 #define CONFIG_SYS_ICACHE_LINESZ 32

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@ -106,7 +106,6 @@
#define CONFIG_CMD_MMC #define CONFIG_CMD_MMC
#define CONFIG_CMD_MII #define CONFIG_CMD_MII
#define CONFIG_ATMEL_USART #define CONFIG_ATMEL_USART
#define CONFIG_MACB #define CONFIG_MACB
#define CONFIG_PORTMUX_PIO #define CONFIG_PORTMUX_PIO
@ -117,7 +116,6 @@
#define CONFIG_GENERIC_MMC #define CONFIG_GENERIC_MMC
#define CONFIG_ATMEL_SPI #define CONFIG_ATMEL_SPI
#define CONFIG_SYS_DCACHE_LINESZ 32 #define CONFIG_SYS_DCACHE_LINESZ 32
#define CONFIG_SYS_ICACHE_LINESZ 32 #define CONFIG_SYS_ICACHE_LINESZ 32

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@ -107,7 +107,6 @@
#define CONFIG_CMD_JFFS2 #define CONFIG_CMD_JFFS2
#define CONFIG_CMD_MMC #define CONFIG_CMD_MMC
#define CONFIG_ATMEL_USART #define CONFIG_ATMEL_USART
#define CONFIG_MACB #define CONFIG_MACB
#define CONFIG_PORTMUX_PIO #define CONFIG_PORTMUX_PIO

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@ -198,7 +198,6 @@
"run mmcboot;" \ "run mmcboot;" \
"run nandboot;" "run nandboot;"
/* NS16550 Configuration */ /* NS16550 Configuration */
#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */
#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */ #define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */

View File

@ -7,14 +7,12 @@
#include <asm/config-pre.h> #include <asm/config-pre.h>
/* /*
* Processor Settings * Processor Settings
*/ */
#define CONFIG_BFIN_CPU bf536-0.3 #define CONFIG_BFIN_CPU bf536-0.3
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
/* /*
* Clock Settings * Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -39,14 +37,12 @@
#define CONFIG_SCLK_DIV 3 #define CONFIG_SCLK_DIV 3
#define CONFIG_VR_CTL_VAL (VLEV_110 | GAIN_20 | FREQ_1000) #define CONFIG_VR_CTL_VAL (VLEV_110 | GAIN_20 | FREQ_1000)
/* /*
* Memory Settings * Memory Settings
*/ */
#define CONFIG_MEM_ADD_WDTH 9 #define CONFIG_MEM_ADD_WDTH 9
#define CONFIG_MEM_SIZE 32 #define CONFIG_MEM_SIZE 32
/* /*
* SDRAM Settings * SDRAM Settings
*/ */
@ -60,7 +56,6 @@
#define CONFIG_SYS_MONITOR_LEN (256 * 1024) #define CONFIG_SYS_MONITOR_LEN (256 * 1024)
#define CONFIG_SYS_MALLOC_LEN (128 * 1024) #define CONFIG_SYS_MALLOC_LEN (128 * 1024)
/* /*
* Network Settings * Network Settings
*/ */
@ -75,7 +70,6 @@
#define CONFIG_ROOTPATH "/romfs/brettl2" #define CONFIG_ROOTPATH "/romfs/brettl2"
#endif #endif
/* /*
* Flash Settings * Flash Settings
*/ */
@ -87,7 +81,6 @@
#define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_MAX_FLASH_SECT 135 #define CONFIG_SYS_MAX_FLASH_SECT 135
/* /*
* Env Storage Settings * Env Storage Settings
*/ */
@ -115,14 +108,12 @@
common/env_embedded.o (.text*); common/env_embedded.o (.text*);
#endif #endif
/* /*
* I2C Settings * I2C Settings
*/ */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_ADI #define CONFIG_SYS_I2C_ADI
/* /*
* Misc Settings * Misc Settings
*/ */

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@ -7,14 +7,12 @@
#include <asm/config-pre.h> #include <asm/config-pre.h>
/* /*
* Processor Settings * Processor Settings
*/ */
#define CONFIG_BFIN_CPU bf506-0.0 #define CONFIG_BFIN_CPU bf506-0.0
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
/* /*
* Clock Settings * Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -38,7 +36,6 @@
/* Values can range from 1-15 */ /* Values can range from 1-15 */
#define CONFIG_SCLK_DIV 5 #define CONFIG_SCLK_DIV 5
/* /*
* Memory Settings * Memory Settings
*/ */
@ -52,7 +49,6 @@
#define CONFIG_SYS_MONITOR_LEN (4 * 1024) #define CONFIG_SYS_MONITOR_LEN (4 * 1024)
#define CONFIG_SYS_MALLOC_LEN (4 * 1024) #define CONFIG_SYS_MALLOC_LEN (4 * 1024)
/* /*
* Flash Settings * Flash Settings
*/ */
@ -79,7 +75,6 @@
#define CONFIG_ENV_IS_NOWHERE #define CONFIG_ENV_IS_NOWHERE
#define CONFIG_ENV_SIZE 0x400 #define CONFIG_ENV_SIZE 0x400
/* /*
* Misc Settings * Misc Settings
*/ */

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@ -7,14 +7,12 @@
#include <asm/config-pre.h> #include <asm/config-pre.h>
/* /*
* Processor Settings * Processor Settings
*/ */
#define CONFIG_BFIN_CPU bf518-0.0 #define CONFIG_BFIN_CPU bf518-0.0
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
/* /*
* Clock Settings * Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -38,7 +36,6 @@
/* Values can range from 1-15 */ /* Values can range from 1-15 */
#define CONFIG_SCLK_DIV 5 #define CONFIG_SCLK_DIV 5
/* /*
* Memory Settings * Memory Settings
*/ */
@ -56,7 +53,6 @@
#define CONFIG_SYS_MONITOR_LEN (512 * 1024) #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
#define CONFIG_SYS_MALLOC_LEN (384 * 1024) #define CONFIG_SYS_MALLOC_LEN (384 * 1024)
/* /*
* Network Settings * Network Settings
*/ */
@ -98,7 +94,6 @@
#define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_MAX_FLASH_SECT 71 #define CONFIG_SYS_MAX_FLASH_SECT 71
/* /*
* SPI Settings * SPI Settings
*/ */
@ -106,7 +101,6 @@
#define CONFIG_ENV_SPI_MAX_HZ 30000000 #define CONFIG_ENV_SPI_MAX_HZ 30000000
#define CONFIG_SF_DEFAULT_SPEED 30000000 #define CONFIG_SF_DEFAULT_SPEED 30000000
/* /*
* Env Storage Settings * Env Storage Settings
*/ */
@ -124,14 +118,12 @@
#endif #endif
#define CONFIG_ENV_IS_EMBEDDED_IN_LDR #define CONFIG_ENV_IS_EMBEDDED_IN_LDR
/* /*
* I2C Settings * I2C Settings
*/ */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_ADI #define CONFIG_SYS_I2C_ADI
/* /*
* SDH Settings * SDH Settings
*/ */
@ -141,7 +133,6 @@
#define CONFIG_BFIN_SDH #define CONFIG_BFIN_SDH
#endif #endif
/* /*
* Misc Settings * Misc Settings
*/ */

View File

@ -7,14 +7,12 @@
#include <asm/config-pre.h> #include <asm/config-pre.h>
/* /*
* Processor Settings * Processor Settings
*/ */
#define CONFIG_BFIN_CPU bf526-0.0 #define CONFIG_BFIN_CPU bf526-0.0
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
/* /*
* Clock Settings * Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -38,7 +36,6 @@
/* Values can range from 1-15 */ /* Values can range from 1-15 */
#define CONFIG_SCLK_DIV 5 #define CONFIG_SCLK_DIV 5
/* /*
* Memory Settings * Memory Settings
*/ */
@ -56,7 +53,6 @@
#define CONFIG_SYS_MONITOR_LEN (768 * 1024) #define CONFIG_SYS_MONITOR_LEN (768 * 1024)
#define CONFIG_SYS_MALLOC_LEN (512 * 1024) #define CONFIG_SYS_MALLOC_LEN (512 * 1024)
/* /*
* NAND Settings * NAND Settings
* (can't be used same time as ethernet) * (can't be used same time as ethernet)
@ -73,7 +69,6 @@
#define CONFIG_CMD_NAND #define CONFIG_CMD_NAND
#endif #endif
/* /*
* Network Settings * Network Settings
*/ */
@ -96,7 +91,6 @@
#define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_MAX_FLASH_SECT 71 #define CONFIG_SYS_MAX_FLASH_SECT 71
/* /*
* SPI Settings * SPI Settings
*/ */
@ -104,7 +98,6 @@
#define CONFIG_ENV_SPI_MAX_HZ 30000000 #define CONFIG_ENV_SPI_MAX_HZ 30000000
#define CONFIG_SF_DEFAULT_SPEED 30000000 #define CONFIG_SF_DEFAULT_SPEED 30000000
/* /*
* Env Storage Settings * Env Storage Settings
*/ */
@ -122,14 +115,12 @@
#endif #endif
#define CONFIG_ENV_IS_EMBEDDED_IN_LDR #define CONFIG_ENV_IS_EMBEDDED_IN_LDR
/* /*
* I2C Settings * I2C Settings
*/ */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_ADI #define CONFIG_SYS_I2C_ADI
/* /*
* USB Settings * USB Settings
*/ */
@ -141,7 +132,6 @@
#define CONFIG_USB_MUSB_TIMEOUT 100000 #define CONFIG_USB_MUSB_TIMEOUT 100000
#endif #endif
/* /*
* Misc Settings * Misc Settings
*/ */
@ -167,7 +157,6 @@
/* #define STATUS_LED_BIT2 GPIO_PG12 */ /* #define STATUS_LED_BIT2 GPIO_PG12 */
#endif #endif
/* /*
* Pull in common ADI header for remaining command/environment setup * Pull in common ADI header for remaining command/environment setup
*/ */

View File

@ -7,14 +7,12 @@
#include <asm/config-pre.h> #include <asm/config-pre.h>
/* /*
* Processor Settings * Processor Settings
*/ */
#define CONFIG_BFIN_CPU bf527-0.2 #define CONFIG_BFIN_CPU bf527-0.2
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER
/* /*
* Clock Settings * Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -38,7 +36,6 @@
/* Values can range from 1-15 */ /* Values can range from 1-15 */
#define CONFIG_SCLK_DIV 5 #define CONFIG_SCLK_DIV 5
/* /*
* Memory Settings * Memory Settings
*/ */
@ -55,7 +52,6 @@
#define CONFIG_SYS_MONITOR_LEN (768 * 1024) #define CONFIG_SYS_MONITOR_LEN (768 * 1024)
#define CONFIG_SYS_MALLOC_LEN (640 * 1024) #define CONFIG_SYS_MALLOC_LEN (640 * 1024)
/* /*
* NAND Settings * NAND Settings
* (can't be used same time as ethernet) * (can't be used same time as ethernet)
@ -71,7 +67,6 @@
#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1
#endif #endif
/* /*
* Flash Settings * Flash Settings
*/ */
@ -82,7 +77,6 @@
#define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_MAX_FLASH_SECT 259 #define CONFIG_SYS_MAX_FLASH_SECT 259
/* /*
* SPI Settings * SPI Settings
*/ */
@ -90,7 +84,6 @@
#define CONFIG_ENV_SPI_MAX_HZ 30000000 #define CONFIG_ENV_SPI_MAX_HZ 30000000
#define CONFIG_SF_DEFAULT_SPEED 30000000 #define CONFIG_SF_DEFAULT_SPEED 30000000
/* /*
* Env Storage Settings * Env Storage Settings
*/ */
@ -113,14 +106,12 @@
#define CONFIG_ENV_IS_EMBEDDED_IN_LDR #define CONFIG_ENV_IS_EMBEDDED_IN_LDR
#endif #endif
/* /*
* I2C Settings * I2C Settings
*/ */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_ADI #define CONFIG_SYS_I2C_ADI
/* /*
* SPI_MMC Settings * SPI_MMC Settings
*/ */
@ -128,7 +119,6 @@
#define CONFIG_GENERIC_MMC #define CONFIG_GENERIC_MMC
#define CONFIG_MMC_SPI #define CONFIG_MMC_SPI
/* /*
* Misc Settings * Misc Settings
*/ */

View File

@ -7,14 +7,12 @@
#include <asm/config-pre.h> #include <asm/config-pre.h>
/* /*
* Processor Settings * Processor Settings
*/ */
#define CONFIG_BFIN_CPU bf527-0.0 #define CONFIG_BFIN_CPU bf527-0.0
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
/* /*
* Clock Settings * Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -38,7 +36,6 @@
/* Values can range from 1-15 */ /* Values can range from 1-15 */
#define CONFIG_SCLK_DIV 4 #define CONFIG_SCLK_DIV 4
/* /*
* Memory Settings * Memory Settings
*/ */
@ -55,7 +52,6 @@
#define CONFIG_SYS_MONITOR_LEN (768 * 1024) #define CONFIG_SYS_MONITOR_LEN (768 * 1024)
#define CONFIG_SYS_MALLOC_LEN (640 * 1024) #define CONFIG_SYS_MALLOC_LEN (640 * 1024)
/* /*
* NAND Settings * NAND Settings
* (can't be used same time as ethernet) * (can't be used same time as ethernet)
@ -71,7 +67,6 @@
#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1
#endif #endif
/* /*
* Network Settings * Network Settings
*/ */
@ -94,7 +89,6 @@
#define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_MAX_FLASH_SECT 259 #define CONFIG_SYS_MAX_FLASH_SECT 259
/* /*
* SPI Settings * SPI Settings
*/ */
@ -102,7 +96,6 @@
#define CONFIG_ENV_SPI_MAX_HZ 30000000 #define CONFIG_ENV_SPI_MAX_HZ 30000000
#define CONFIG_SF_DEFAULT_SPEED 30000000 #define CONFIG_SF_DEFAULT_SPEED 30000000
/* /*
* Env Storage Settings * Env Storage Settings
*/ */
@ -125,14 +118,12 @@
#define CONFIG_ENV_IS_EMBEDDED_IN_LDR #define CONFIG_ENV_IS_EMBEDDED_IN_LDR
#endif #endif
/* /*
* I2C Settings * I2C Settings
*/ */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_ADI #define CONFIG_SYS_I2C_ADI
/* /*
* USB Settings * USB Settings
*/ */

View File

@ -7,14 +7,12 @@
#include <asm/config-pre.h> #include <asm/config-pre.h>
/* /*
* Processor Settings * Processor Settings
*/ */
#define CONFIG_BFIN_CPU bf527-0.2 #define CONFIG_BFIN_CPU bf527-0.2
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
/* /*
* Clock Settings * Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -42,7 +40,6 @@
#define CONFIG_PLL_CTL_VAL 0x2a00 #define CONFIG_PLL_CTL_VAL 0x2a00
#define CONFIG_VR_CTL_VAL 0x7090 #define CONFIG_VR_CTL_VAL 0x7090
/* /*
* Memory Settings * Memory Settings
*/ */
@ -59,7 +56,6 @@
#define CONFIG_SYS_MONITOR_LEN (768 * 1024) #define CONFIG_SYS_MONITOR_LEN (768 * 1024)
#define CONFIG_SYS_MALLOC_LEN (640 * 1024) #define CONFIG_SYS_MALLOC_LEN (640 * 1024)
/* /*
* Flash Settings * Flash Settings
*/ */
@ -70,7 +66,6 @@
#define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_MAX_FLASH_SECT 259 #define CONFIG_SYS_MAX_FLASH_SECT 259
/* /*
* SPI Settings * SPI Settings
*/ */
@ -79,7 +74,6 @@
#define CONFIG_SF_DEFAULT_SPEED 30000000 #define CONFIG_SF_DEFAULT_SPEED 30000000
#define CONFIG_SPI_FLASH_ALL #define CONFIG_SPI_FLASH_ALL
/* /*
* Env Storage Settings * Env Storage Settings
*/ */
@ -98,14 +92,12 @@
#define CONFIG_ENV_IS_EMBEDDED_IN_LDR #define CONFIG_ENV_IS_EMBEDDED_IN_LDR
#endif #endif
/* /*
* I2C Settings * I2C Settings
*/ */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_ADI #define CONFIG_SYS_I2C_ADI
/* /*
* Misc Settings * Misc Settings
*/ */

View File

@ -7,14 +7,12 @@
#include <asm/config-pre.h> #include <asm/config-pre.h>
/* /*
* Processor Settings * Processor Settings
*/ */
#define CONFIG_BFIN_CPU bf533-0.3 #define CONFIG_BFIN_CPU bf533-0.3
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
/* /*
* Clock Settings * Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -38,7 +36,6 @@
/* Values can range from 1-15 */ /* Values can range from 1-15 */
#define CONFIG_SCLK_DIV 5 #define CONFIG_SCLK_DIV 5
/* /*
* Memory Settings * Memory Settings
*/ */
@ -60,7 +57,6 @@
#define CONFIG_SYS_MONITOR_LEN (256 * 1024) #define CONFIG_SYS_MONITOR_LEN (256 * 1024)
#define CONFIG_SYS_MALLOC_LEN (128 * 1024) #define CONFIG_SYS_MALLOC_LEN (128 * 1024)
/* /*
* Network Settings * Network Settings
*/ */
@ -76,7 +72,6 @@
} while (0) } while (0)
#define CONFIG_HOSTNAME bf533-ezkit #define CONFIG_HOSTNAME bf533-ezkit
/* /*
* Flash Settings * Flash Settings
*/ */
@ -88,7 +83,6 @@
#define CONFIG_ENV_SECT_SIZE 0x10000 #define CONFIG_ENV_SECT_SIZE 0x10000
#define FLASH_TOT_SECT 40 #define FLASH_TOT_SECT 40
/* /*
* I2C Settings * I2C Settings
*/ */

View File

@ -7,7 +7,6 @@
#include <asm/config-pre.h> #include <asm/config-pre.h>
/* /*
* Processor Settings * Processor Settings
*/ */
@ -53,7 +52,6 @@
#define CONFIG_SYS_MONITOR_LEN (256 * 1024) #define CONFIG_SYS_MONITOR_LEN (256 * 1024)
#define CONFIG_SYS_MALLOC_LEN (384 * 1024) #define CONFIG_SYS_MALLOC_LEN (384 * 1024)
/* /*
* Network Settings * Network Settings
*/ */
@ -69,7 +67,6 @@
} while (0) } while (0)
#define CONFIG_HOSTNAME bf533-stamp #define CONFIG_HOSTNAME bf533-stamp
/* I2C */ /* I2C */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
@ -134,7 +131,6 @@
common/env_embedded.o (.text*); common/env_embedded.o (.text*);
#endif #endif
/* /*
* I2C Settings * I2C Settings
*/ */
@ -177,7 +173,6 @@
#define CONFIG_EBIU_AMBCTL1_VAL 0x99B3ffc2 #define CONFIG_EBIU_AMBCTL1_VAL 0x99B3ffc2
#endif #endif
/* /*
* Misc Settings * Misc Settings
*/ */
@ -211,7 +206,6 @@
/* define to enable splash screen support */ /* define to enable splash screen support */
/* #define CONFIG_VIDEO */ /* #define CONFIG_VIDEO */
/* /*
* Pull in common ADI header for remaining command/environment setup * Pull in common ADI header for remaining command/environment setup
*/ */

View File

@ -20,14 +20,12 @@
#include <asm/config-pre.h> #include <asm/config-pre.h>
/* /*
* Processor Settings * Processor Settings
*/ */
#define CONFIG_BFIN_CPU bf537-0.2 #define CONFIG_BFIN_CPU bf537-0.2
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER
/* /*
* Clock Settings * Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -51,7 +49,6 @@
/* Values can range from 1-15 */ /* Values can range from 1-15 */
#define CONFIG_SCLK_DIV 5 #define CONFIG_SCLK_DIV 5
/* /*
* Memory Settings * Memory Settings
*/ */
@ -68,7 +65,6 @@
#define CONFIG_SYS_MONITOR_LEN (256 << 10) #define CONFIG_SYS_MONITOR_LEN (256 << 10)
#define CONFIG_SYS_MALLOC_LEN (128 << 10) #define CONFIG_SYS_MALLOC_LEN (128 << 10)
/* /*
* Network Settings * Network Settings
*/ */
@ -87,14 +83,12 @@
#define CONFIG_SYS_AUTOLOAD "no" #define CONFIG_SYS_AUTOLOAD "no"
#define CONFIG_ROOTPATH "/romfs" #define CONFIG_ROOTPATH "/romfs"
/* /*
* Flash Settings * Flash Settings
*/ */
/* We don't have a parallel flash chip there */ /* We don't have a parallel flash chip there */
#define CONFIG_SYS_NO_FLASH #define CONFIG_SYS_NO_FLASH
/* /*
* SPI Settings * SPI Settings
*/ */
@ -102,7 +96,6 @@
#define CONFIG_ENV_SPI_MAX_HZ 30000000 #define CONFIG_ENV_SPI_MAX_HZ 30000000
#define CONFIG_SF_DEFAULT_SPEED 30000000 #define CONFIG_SF_DEFAULT_SPEED 30000000
/* /*
* Env Storage Settings * Env Storage Settings
*/ */
@ -112,7 +105,6 @@
#define CONFIG_ENV_SECT_SIZE 0x10000 #define CONFIG_ENV_SECT_SIZE 0x10000
#define CONFIG_ENV_IS_EMBEDDED_IN_LDR #define CONFIG_ENV_IS_EMBEDDED_IN_LDR
/* /*
* I2C settings * I2C settings
*/ */
@ -121,7 +113,6 @@
#define CONFIG_SYS_I2C_SPEED 50000 #define CONFIG_SYS_I2C_SPEED 50000
#define CONFIG_SYS_I2C_SLAVE 0 #define CONFIG_SYS_I2C_SLAVE 0
/* /*
* Misc Settings * Misc Settings
*/ */

View File

@ -7,14 +7,12 @@
#include <asm/config-pre.h> #include <asm/config-pre.h>
/* /*
* Processor Settings * Processor Settings
*/ */
#define CONFIG_BFIN_CPU bf537-0.2 #define CONFIG_BFIN_CPU bf537-0.2
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER
/* /*
* Clock Settings * Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -38,7 +36,6 @@
/* Values can range from 1-15 */ /* Values can range from 1-15 */
#define CONFIG_SCLK_DIV 4 #define CONFIG_SCLK_DIV 4
/* /*
* Memory Settings * Memory Settings
*/ */
@ -55,7 +52,6 @@
#define CONFIG_SYS_MONITOR_LEN (512 * 1024) #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
#define CONFIG_SYS_MALLOC_LEN (128 * 1024) #define CONFIG_SYS_MALLOC_LEN (128 * 1024)
/* /*
* Network Settings * Network Settings
*/ */
@ -75,7 +71,6 @@
#define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_MAX_FLASH_SECT 71 #define CONFIG_SYS_MAX_FLASH_SECT 71
/* /*
* SPI Settings * SPI Settings
*/ */
@ -83,7 +78,6 @@
#define CONFIG_ENV_SPI_MAX_HZ 30000000 #define CONFIG_ENV_SPI_MAX_HZ 30000000
#define CONFIG_SF_DEFAULT_SPEED 30000000 #define CONFIG_SF_DEFAULT_SPEED 30000000
/* /*
* Env Storage Settings * Env Storage Settings
*/ */
@ -112,7 +106,6 @@
common/env_embedded.o (.text*); common/env_embedded.o (.text*);
#endif #endif
/* /*
* NAND Settings * NAND Settings
*/ */
@ -133,14 +126,12 @@
#define NAND_PLAT_WRITE_ADR(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_ALE(chip), cmd) #define NAND_PLAT_WRITE_ADR(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_ALE(chip), cmd)
#define NAND_PLAT_GPIO_DEV_READY GPIO_PF12 #define NAND_PLAT_GPIO_DEV_READY GPIO_PF12
/* /*
* I2C settings * I2C settings
*/ */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_ADI #define CONFIG_SYS_I2C_ADI
/* /*
* Misc Settings * Misc Settings
*/ */
@ -157,7 +148,6 @@
#define CONFIG_BOOTCOMMAND "run nandboot" #define CONFIG_BOOTCOMMAND "run nandboot"
#define CONFIG_BOOTARGS_ROOT "/dev/mtdblock1 rw rootfstype=yaffs" #define CONFIG_BOOTARGS_ROOT "/dev/mtdblock1 rw rootfstype=yaffs"
/* /*
* Pull in common ADI header for remaining command/environment setup * Pull in common ADI header for remaining command/environment setup
*/ */

View File

@ -20,14 +20,12 @@
#include <asm/config-pre.h> #include <asm/config-pre.h>
/* /*
* Processor Settings * Processor Settings
*/ */
#define CONFIG_BFIN_CPU bf537-0.2 #define CONFIG_BFIN_CPU bf537-0.2
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER
/* /*
* Clock Settings * Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -51,7 +49,6 @@
/* Values can range from 1-15 */ /* Values can range from 1-15 */
#define CONFIG_SCLK_DIV 5 #define CONFIG_SCLK_DIV 5
/* /*
* Memory Settings * Memory Settings
*/ */
@ -68,7 +65,6 @@
#define CONFIG_SYS_MONITOR_LEN (256 << 10) #define CONFIG_SYS_MONITOR_LEN (256 << 10)
#define CONFIG_SYS_MALLOC_LEN (384 << 10) #define CONFIG_SYS_MALLOC_LEN (384 << 10)
/* /*
* Network Settings * Network Settings
*/ */
@ -93,7 +89,6 @@
/* We don't have a parallel flash chip there */ /* We don't have a parallel flash chip there */
#define CONFIG_SYS_NO_FLASH #define CONFIG_SYS_NO_FLASH
/* /*
* SPI Settings * SPI Settings
*/ */
@ -101,7 +96,6 @@
#define CONFIG_ENV_SPI_MAX_HZ 30000000 #define CONFIG_ENV_SPI_MAX_HZ 30000000
#define CONFIG_SF_DEFAULT_SPEED 30000000 #define CONFIG_SF_DEFAULT_SPEED 30000000
/* /*
* Env Storage Settings * Env Storage Settings
*/ */
@ -111,7 +105,6 @@
#define CONFIG_ENV_SECT_SIZE 0x10000 #define CONFIG_ENV_SECT_SIZE 0x10000
#define CONFIG_ENV_IS_EMBEDDED_IN_LDR #define CONFIG_ENV_IS_EMBEDDED_IN_LDR
/* /*
* I2C settings * I2C settings
*/ */
@ -120,7 +113,6 @@
#define CONFIG_SYS_I2C_SPEED 50000 #define CONFIG_SYS_I2C_SPEED 50000
#define CONFIG_SYS_I2C_SLAVE 0 #define CONFIG_SYS_I2C_SLAVE 0
/* /*
* Misc Settings * Misc Settings
*/ */

View File

@ -7,14 +7,12 @@
#include <asm/config-pre.h> #include <asm/config-pre.h>
/* /*
* Processor Settings * Processor Settings
*/ */
#define CONFIG_BFIN_CPU bf537-0.2 #define CONFIG_BFIN_CPU bf537-0.2
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
/* /*
* Clock Settings * Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -38,7 +36,6 @@
/* Values can range from 1-15 */ /* Values can range from 1-15 */
#define CONFIG_SCLK_DIV 4 #define CONFIG_SCLK_DIV 4
/* /*
* Memory Settings * Memory Settings
*/ */
@ -55,7 +52,6 @@
#define CONFIG_SYS_MONITOR_LEN (768 * 1024) #define CONFIG_SYS_MONITOR_LEN (768 * 1024)
#define CONFIG_SYS_MALLOC_LEN (384 * 1024) #define CONFIG_SYS_MALLOC_LEN (384 * 1024)
/* /*
* Network Settings * Network Settings
*/ */
@ -77,7 +73,6 @@
/* some have 67 sectors (M29W320DB), but newer have 71 (M29W320EB) */ /* some have 67 sectors (M29W320DB), but newer have 71 (M29W320EB) */
#define CONFIG_SYS_MAX_FLASH_SECT 71 #define CONFIG_SYS_MAX_FLASH_SECT 71
/* /*
* SPI Settings * SPI Settings
*/ */
@ -86,7 +81,6 @@
#define CONFIG_SF_DEFAULT_SPEED 30000000 #define CONFIG_SF_DEFAULT_SPEED 30000000
#define CONFIG_SPI_FLASH_ALL #define CONFIG_SPI_FLASH_ALL
/* /*
* Env Storage Settings * Env Storage Settings
*/ */
@ -120,14 +114,12 @@
common/env_embedded.o (.text*); common/env_embedded.o (.text*);
#endif #endif
/* /*
* I2C Settings * I2C Settings
*/ */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_ADI #define CONFIG_SYS_I2C_ADI
/* /*
* SPI_MMC Settings * SPI_MMC Settings
*/ */
@ -243,7 +235,6 @@
#endif #endif
/* /*
* Misc Settings * Misc Settings
*/ */
@ -270,7 +261,6 @@
#define CONFIG_BOOTCOMMAND "bootldr 0x203f0100" #define CONFIG_BOOTCOMMAND "bootldr 0x203f0100"
#endif #endif
/* /*
* Pull in common ADI header for remaining command/environment setup * Pull in common ADI header for remaining command/environment setup
*/ */

View File

@ -7,14 +7,12 @@
#include <asm/config-pre.h> #include <asm/config-pre.h>
/* /*
* Processor Settings * Processor Settings
*/ */
#define CONFIG_BFIN_CPU bf538-0.4 #define CONFIG_BFIN_CPU bf538-0.4
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
/* /*
* Clock Settings * Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -38,7 +36,6 @@
/* Values can range from 1-15 */ /* Values can range from 1-15 */
#define CONFIG_SCLK_DIV 4 #define CONFIG_SCLK_DIV 4
/* /*
* Memory Settings * Memory Settings
*/ */
@ -55,7 +52,6 @@
#define CONFIG_SYS_MONITOR_LEN (256 * 1024) #define CONFIG_SYS_MONITOR_LEN (256 * 1024)
#define CONFIG_SYS_MALLOC_LEN (384 * 1024) #define CONFIG_SYS_MALLOC_LEN (384 * 1024)
/* /*
* Network Settings * Network Settings
*/ */
@ -64,7 +60,6 @@
#define CONFIG_SMC91111_BASE 0x20310300 #define CONFIG_SMC91111_BASE 0x20310300
#define CONFIG_HOSTNAME bf538f-ezkit #define CONFIG_HOSTNAME bf538f-ezkit
/* /*
* Flash Settings * Flash Settings
*/ */
@ -75,7 +70,6 @@
#define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_MAX_FLASH_SECT 71 #define CONFIG_SYS_MAX_FLASH_SECT 71
/* /*
* SPI Settings * SPI Settings
*/ */
@ -119,14 +113,12 @@
common/env_embedded.o (.text*); common/env_embedded.o (.text*);
#endif #endif
/* /*
* I2C Settings * I2C Settings
*/ */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_ADI #define CONFIG_SYS_I2C_ADI
/* /*
* Misc Settings * Misc Settings
*/ */

View File

@ -7,14 +7,12 @@
#include <asm/config-pre.h> #include <asm/config-pre.h>
/* /*
* Processor Settings * Processor Settings
*/ */
#define CONFIG_BFIN_CPU bf548-0.0 #define CONFIG_BFIN_CPU bf548-0.0
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
/* /*
* Clock Settings * Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -38,7 +36,6 @@
/* Values can range from 1-15 */ /* Values can range from 1-15 */
#define CONFIG_SCLK_DIV 4 #define CONFIG_SCLK_DIV 4
/* /*
* Memory Settings * Memory Settings
*/ */
@ -64,7 +61,6 @@
#define CONFIG_SYS_MONITOR_LEN (1024 * 1024) #define CONFIG_SYS_MONITOR_LEN (1024 * 1024)
#define CONFIG_SYS_MALLOC_LEN (768 * 1024) #define CONFIG_SYS_MALLOC_LEN (768 * 1024)
/* /*
* Network Settings * Network Settings
*/ */
@ -74,7 +70,6 @@
#define CONFIG_SMC911X_16_BIT #define CONFIG_SMC911X_16_BIT
#define CONFIG_HOSTNAME bf548-ezkit #define CONFIG_HOSTNAME bf548-ezkit
/* /*
* Flash Settings * Flash Settings
*/ */
@ -85,7 +80,6 @@
#define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_MAX_FLASH_SECT 259 #define CONFIG_SYS_MAX_FLASH_SECT 259
/* /*
* SPI Settings * SPI Settings
*/ */
@ -93,7 +87,6 @@
#define CONFIG_ENV_SPI_MAX_HZ 30000000 #define CONFIG_ENV_SPI_MAX_HZ 30000000
#define CONFIG_SF_DEFAULT_SPEED 30000000 #define CONFIG_SF_DEFAULT_SPEED 30000000
/* /*
* Env Storage Settings * Env Storage Settings
*/ */
@ -133,7 +126,6 @@
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_ADI #define CONFIG_SYS_I2C_ADI
/* /*
* SATA * SATA
*/ */
@ -146,7 +138,6 @@
#define CONFIG_BFIN_ATA_MODE XFER_PIO_4 #define CONFIG_BFIN_ATA_MODE XFER_PIO_4
#endif #endif
/* /*
* SDH Settings * SDH Settings
*/ */
@ -156,7 +147,6 @@
#define CONFIG_BFIN_SDH #define CONFIG_BFIN_SDH
#endif #endif
/* /*
* USB Settings * USB Settings
*/ */
@ -168,7 +158,6 @@
#define CONFIG_USB_MUSB_TIMEOUT 100000 #define CONFIG_USB_MUSB_TIMEOUT 100000
#endif #endif
/* /*
* Misc Settings * Misc Settings
*/ */
@ -199,7 +188,6 @@
#define CONFIG_SYS_POST_FLASH_END 127 #define CONFIG_SYS_POST_FLASH_END 127
#endif #endif
/* /*
* Pull in common ADI header for remaining command/environment setup * Pull in common ADI header for remaining command/environment setup
*/ */

View File

@ -8,14 +8,12 @@
#include <asm/config-pre.h> #include <asm/config-pre.h>
/* /*
* Processor Settings * Processor Settings
*/ */
#define CONFIG_BFIN_CPU bf561-0.5 #define CONFIG_BFIN_CPU bf561-0.5
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
/* /*
* Clock Settings * Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -39,7 +37,6 @@
/* Values can range from 1-15 */ /* Values can range from 1-15 */
#define CONFIG_SCLK_DIV 5 #define CONFIG_SCLK_DIV 5
/* /*
* Memory Settings * Memory Settings
*/ */
@ -56,7 +53,6 @@
#define CONFIG_SYS_MONITOR_LEN (384 * 1024) #define CONFIG_SYS_MONITOR_LEN (384 * 1024)
#define CONFIG_SYS_MALLOC_LEN (128 * 1024) #define CONFIG_SYS_MALLOC_LEN (128 * 1024)
/* /*
* RTC Settings * RTC Settings
*/ */
@ -71,7 +67,6 @@
#define CONFIG_SYS_DTT_LOW_TEMP -30 #define CONFIG_SYS_DTT_LOW_TEMP -30
#define CONFIG_SYS_DTT_HYSTERESIS 3*/ #define CONFIG_SYS_DTT_HYSTERESIS 3*/
/* /*
* Network Settings * Network Settings
*/ */
@ -91,13 +86,11 @@
#define CONFIG_HOSTNAME bf561-acvilon #define CONFIG_HOSTNAME bf561-acvilon
/* /*
* Flash Settings * Flash Settings
*/ */
#define CONFIG_SYS_NO_FLASH #define CONFIG_SYS_NO_FLASH
/* /*
* I2C Settings * I2C Settings
*/ */
@ -107,7 +100,6 @@
#define CONFIG_PCA9564_I2C #define CONFIG_PCA9564_I2C
#define CONFIG_PCA9564_BASE 0x2c000000 #define CONFIG_PCA9564_BASE 0x2c000000
/* /*
* SPI Settings * SPI Settings
*/ */
@ -115,7 +107,6 @@
#define CONFIG_ENV_SPI_MAX_HZ 10000000 #define CONFIG_ENV_SPI_MAX_HZ 10000000
#define CONFIG_SF_DEFAULT_SPEED 10000000 #define CONFIG_SF_DEFAULT_SPEED 10000000
/* /*
* Env Storage Settings * Env Storage Settings
*/ */
@ -124,7 +115,6 @@
#define CONFIG_ENV_OFFSET ((16 + 256) * 1056) #define CONFIG_ENV_OFFSET ((16 + 256) * 1056)
#define CONFIG_ENV_SIZE (8 * 1056) #define CONFIG_ENV_SIZE (8 * 1056)
/* /*
* NAND Settings * NAND Settings
* We're using NAND_PLAT driver to make things simplier * We're using NAND_PLAT driver to make things simplier
@ -146,7 +136,6 @@
#define NAND_PLAT_WRITE_ADR(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_ALE(chip), cmd) #define NAND_PLAT_WRITE_ADR(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_ALE(chip), cmd)
#define NAND_PLAT_GPIO_DEV_READY GPIO_PF10 #define NAND_PLAT_GPIO_DEV_READY GPIO_PF10
/* /*
* Misc Settings * Misc Settings
*/ */

View File

@ -7,14 +7,12 @@
#include <asm/config-pre.h> #include <asm/config-pre.h>
/* /*
* Processor Settings * Processor Settings
*/ */
#define CONFIG_BFIN_CPU bf561-0.3 #define CONFIG_BFIN_CPU bf561-0.3
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
/* /*
* Clock Settings * Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -38,7 +36,6 @@
/* Values can range from 1-15 */ /* Values can range from 1-15 */
#define CONFIG_SCLK_DIV 6 #define CONFIG_SCLK_DIV 6
/* /*
* Memory Settings * Memory Settings
*/ */
@ -55,7 +52,6 @@
#define CONFIG_SYS_MONITOR_LEN (256 * 1024) #define CONFIG_SYS_MONITOR_LEN (256 * 1024)
#define CONFIG_SYS_MALLOC_LEN (128 * 1024) #define CONFIG_SYS_MALLOC_LEN (128 * 1024)
/* /*
* Network Settings * Network Settings
*/ */
@ -65,7 +61,6 @@
#define CONFIG_SMC_USE_32_BIT 1 #define CONFIG_SMC_USE_32_BIT 1
#define CONFIG_HOSTNAME bf561-ezkit #define CONFIG_HOSTNAME bf561-ezkit
/* /*
* Flash Settings * Flash Settings
*/ */
@ -82,7 +77,6 @@
#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
#define CONFIG_ENV_SECT_SIZE 0x2000 #define CONFIG_ENV_SECT_SIZE 0x2000
/* /*
* I2C Settings * I2C Settings
*/ */
@ -106,7 +100,6 @@
*/ */
/* #define CONFIG_CORE1_RUN 1 */ /* #define CONFIG_CORE1_RUN 1 */
/* /*
* Pull in common ADI header for remaining command/environment setup * Pull in common ADI header for remaining command/environment setup
*/ */

View File

@ -13,7 +13,6 @@
#define CONFIG_BFIN_CPU bf609-0.0 #define CONFIG_BFIN_CPU bf609-0.0
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
/* For ez-board version 1.0, else undef this */ /* For ez-board version 1.0, else undef this */
#define CONFIG_BFIN_BOARD_VERSION_1_0 #define CONFIG_BFIN_BOARD_VERSION_1_0

View File

@ -10,14 +10,12 @@
#include <asm/config-pre.h> #include <asm/config-pre.h>
/* /*
* Processor Settings * Processor Settings
*/ */
#define CONFIG_BFIN_CPU bf537-0.3 #define CONFIG_BFIN_CPU bf537-0.3
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER
/* /*
* Clock Settings * Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -41,7 +39,6 @@
/* Values can range from 1-15 */ /* Values can range from 1-15 */
#define CONFIG_SCLK_DIV 5 #define CONFIG_SCLK_DIV 5
/* /*
* Memory Settings * Memory Settings
*/ */
@ -58,7 +55,6 @@
#define CONFIG_SYS_MONITOR_LEN (512 * 1024) #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
#define CONFIG_SYS_MALLOC_LEN (384 * 1024) #define CONFIG_SYS_MALLOC_LEN (384 * 1024)
/* /*
* Network Settings * Network Settings
*/ */
@ -75,7 +71,6 @@
*/ */
#define CONFIG_SYS_NO_FLASH /* We have no parallel FLASH */ #define CONFIG_SYS_NO_FLASH /* We have no parallel FLASH */
/* /*
* SPI Settings * SPI Settings
*/ */
@ -83,7 +78,6 @@
#define CONFIG_ENV_SPI_MAX_HZ 30000000 #define CONFIG_ENV_SPI_MAX_HZ 30000000
#define CONFIG_SF_DEFAULT_SPEED 30000000 #define CONFIG_SF_DEFAULT_SPEED 30000000
/* /*
* Env Storage Settings * Env Storage Settings
*/ */
@ -93,14 +87,12 @@
#define CONFIG_ENV_SECT_SIZE 0x10000 #define CONFIG_ENV_SECT_SIZE 0x10000
#define CONFIG_ENV_IS_EMBEDDED_IN_LDR #define CONFIG_ENV_IS_EMBEDDED_IN_LDR
/* /*
* I2C Settings * I2C Settings
*/ */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_ADI #define CONFIG_SYS_I2C_ADI
/* /*
* NAND Settings * NAND Settings
*/ */

View File

@ -135,7 +135,6 @@
#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM #define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used area in DPRAM */ #define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used area in DPRAM */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET

View File

@ -34,7 +34,6 @@
"mtdparts=" MTDPARTS_DEFAULT "\0" \ "mtdparts=" MTDPARTS_DEFAULT "\0" \
"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"
/* additional features on charon board */ /* additional features on charon board */
#define CONFIG_RESET_PHY_R #define CONFIG_RESET_PHY_R

View File

@ -7,14 +7,12 @@
#include <asm/config-pre.h> #include <asm/config-pre.h>
/* /*
* Processor Settings * Processor Settings
*/ */
#define CONFIG_BFIN_CPU bf527-0.0 #define CONFIG_BFIN_CPU bf527-0.0
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
/* /*
* Clock Settings * Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -41,7 +39,6 @@
/* Decrease core voltage */ /* Decrease core voltage */
#define CONFIG_VR_CTL_VAL (VLEV_120 | CLKBUFOE | FREQ_1000) #define CONFIG_VR_CTL_VAL (VLEV_120 | CLKBUFOE | FREQ_1000)
/* /*
* Memory Settings * Memory Settings
*/ */
@ -58,7 +55,6 @@
#define CONFIG_SYS_MONITOR_LEN (256 * 1024) #define CONFIG_SYS_MONITOR_LEN (256 * 1024)
#define CONFIG_SYS_MALLOC_LEN (128 * 1024) #define CONFIG_SYS_MALLOC_LEN (128 * 1024)
/* /*
* NAND Settings * NAND Settings
* (can't be used sametime as ethernet) * (can't be used sametime as ethernet)
@ -71,7 +67,6 @@
#define CONFIG_CMD_NAND #define CONFIG_CMD_NAND
#endif #endif
/* /*
* Network Settings * Network Settings
*/ */
@ -95,7 +90,6 @@
#define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_MAX_FLASH_SECT 67 #define CONFIG_SYS_MAX_FLASH_SECT 67
/* /*
* Env Storage Settings * Env Storage Settings
*/ */
@ -106,14 +100,12 @@
#define CONFIG_ENV_SECT_SIZE 0x8000 #define CONFIG_ENV_SECT_SIZE 0x8000
#define CONFIG_ENV_IS_EMBEDDED_IN_LDR #define CONFIG_ENV_IS_EMBEDDED_IN_LDR
/* /*
* I2C Settings * I2C Settings
*/ */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_ADI #define CONFIG_SYS_I2C_ADI
/* /*
* Misc Settings * Misc Settings
*/ */

View File

@ -7,14 +7,12 @@
#include <asm/config-pre.h> #include <asm/config-pre.h>
/* /*
* Processor Settings * Processor Settings
*/ */
#define CONFIG_BFIN_CPU bf533-0.3 #define CONFIG_BFIN_CPU bf533-0.3
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
/* /*
* Clock Settings * Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -41,7 +39,6 @@
/* Decrease core voltage */ /* Decrease core voltage */
#define CONFIG_VR_CTL_VAL (VLEV_115 | GAIN_20 | FREQ_1000) #define CONFIG_VR_CTL_VAL (VLEV_115 | GAIN_20 | FREQ_1000)
/* /*
* Memory Settings * Memory Settings
*/ */
@ -58,7 +55,6 @@
#define CONFIG_SYS_MONITOR_LEN (256 * 1024) #define CONFIG_SYS_MONITOR_LEN (256 * 1024)
#define CONFIG_SYS_MALLOC_LEN (128 * 1024) #define CONFIG_SYS_MALLOC_LEN (128 * 1024)
/* /*
* Network Settings * Network Settings
*/ */
@ -67,7 +63,6 @@
#define CONFIG_SMC91111_BASE 0x20200300 #define CONFIG_SMC91111_BASE 0x20200300
#define CONFIG_HOSTNAME cm-bf533 #define CONFIG_HOSTNAME cm-bf533
/* /*
* Flash Settings * Flash Settings
*/ */
@ -78,7 +73,6 @@
#define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_MAX_FLASH_SECT 16 #define CONFIG_SYS_MAX_FLASH_SECT 16
/* /*
* Env Storage Settings * Env Storage Settings
*/ */
@ -87,7 +81,6 @@
#define CONFIG_ENV_SECT_SIZE 0x20000 #define CONFIG_ENV_SECT_SIZE 0x20000
#define CONFIG_ENV_SIZE 0x10000 #define CONFIG_ENV_SIZE 0x10000
/* /*
* Misc Settings * Misc Settings
*/ */

View File

@ -7,14 +7,12 @@
#include <asm/config-pre.h> #include <asm/config-pre.h>
/* /*
* Processor Settings * Processor Settings
*/ */
#define CONFIG_BFIN_CPU bf537-0.2 #define CONFIG_BFIN_CPU bf537-0.2
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
/* /*
* Clock Settings * Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -41,7 +39,6 @@
/* Decrease core voltage */ /* Decrease core voltage */
#define CONFIG_VR_CTL_VAL (VLEV_115 | CLKBUFOE | GAIN_20 | FREQ_1000) #define CONFIG_VR_CTL_VAL (VLEV_115 | CLKBUFOE | GAIN_20 | FREQ_1000)
/* /*
* Memory Settings * Memory Settings
*/ */
@ -58,7 +55,6 @@
#define CONFIG_SYS_MONITOR_LEN (768 * 1024) #define CONFIG_SYS_MONITOR_LEN (768 * 1024)
#define CONFIG_SYS_MALLOC_LEN (128 * 1024) #define CONFIG_SYS_MALLOC_LEN (128 * 1024)
/* /*
* Network Settings * Network Settings
*/ */
@ -83,14 +79,12 @@
#define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_MAX_FLASH_SECT 35 #define CONFIG_SYS_MAX_FLASH_SECT 35
/* /*
* SPI Settings * SPI Settings
*/ */
#define CONFIG_BFIN_SPI #define CONFIG_BFIN_SPI
#define CONFIG_ENV_SPI_MAX_HZ 30000000 #define CONFIG_ENV_SPI_MAX_HZ 30000000
/* /*
* Env Storage Settings * Env Storage Settings
*/ */
@ -115,14 +109,12 @@
common/env_embedded.o (.text*); common/env_embedded.o (.text*);
#endif #endif
/* /*
* I2C Settings * I2C Settings
*/ */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_ADI #define CONFIG_SYS_I2C_ADI
/* /*
* SPI_MMC Settings * SPI_MMC Settings
*/ */
@ -130,7 +122,6 @@
#define CONFIG_GENERIC_MMC #define CONFIG_GENERIC_MMC
#define CONFIG_MMC_SPI #define CONFIG_MMC_SPI
/* /*
* Misc Settings * Misc Settings
*/ */

View File

@ -7,14 +7,12 @@
#include <asm/config-pre.h> #include <asm/config-pre.h>
/* /*
* Processor Settings * Processor Settings
*/ */
#define CONFIG_BFIN_CPU bf537-0.2 #define CONFIG_BFIN_CPU bf537-0.2
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
/* /*
* Clock Settings * Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -40,7 +38,6 @@
/* Core voltage */ /* Core voltage */
#define CONFIG_VR_CTL_VAL (VLEV_110 | GAIN_20 | FREQ_1000) #define CONFIG_VR_CTL_VAL (VLEV_110 | GAIN_20 | FREQ_1000)
/* /*
* Memory Settings * Memory Settings
*/ */
@ -57,7 +54,6 @@
#define CONFIG_SYS_MONITOR_LEN (768 * 1024) #define CONFIG_SYS_MONITOR_LEN (768 * 1024)
#define CONFIG_SYS_MALLOC_LEN (128 * 1024) #define CONFIG_SYS_MALLOC_LEN (128 * 1024)
/* /*
* Network Settings * Network Settings
*/ */
@ -81,14 +77,12 @@
#define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_MAX_FLASH_SECT 35 #define CONFIG_SYS_MAX_FLASH_SECT 35
/* /*
* SPI Settings * SPI Settings
*/ */
#define CONFIG_BFIN_SPI #define CONFIG_BFIN_SPI
#define CONFIG_ENV_SPI_MAX_HZ 30000000 #define CONFIG_ENV_SPI_MAX_HZ 30000000
/* /*
* Env Storage Settings * Env Storage Settings
*/ */
@ -113,14 +107,12 @@
common/env_embedded.o (.text*); common/env_embedded.o (.text*);
#endif #endif
/* /*
* I2C Settings * I2C Settings
*/ */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_ADI #define CONFIG_SYS_I2C_ADI
/* /*
* SPI_MMC Settings * SPI_MMC Settings
*/ */

View File

@ -7,14 +7,12 @@
#include <asm/config-pre.h> #include <asm/config-pre.h>
/* /*
* Processor Settings * Processor Settings
*/ */
#define CONFIG_BFIN_CPU bf548-0.0 #define CONFIG_BFIN_CPU bf548-0.0
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
/* /*
* Clock Settings * Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -41,7 +39,6 @@
/* Decrease core voltage */ /* Decrease core voltage */
#define CONFIG_VR_CTL_VAL (VLEV_115 | GAIN_20 | FREQ_1000) #define CONFIG_VR_CTL_VAL (VLEV_115 | GAIN_20 | FREQ_1000)
/* /*
* Memory Settings * Memory Settings
*/ */
@ -67,7 +64,6 @@
#define CONFIG_SYS_MONITOR_LEN (512 * 1024) #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
#define CONFIG_SYS_MALLOC_LEN (640 * 1024) #define CONFIG_SYS_MALLOC_LEN (640 * 1024)
/* /*
* Network Settings * Network Settings
*/ */
@ -77,7 +73,6 @@
#define CONFIG_SMC911X_16_BIT #define CONFIG_SMC911X_16_BIT
#define CONFIG_HOSTNAME cm-bf548 #define CONFIG_HOSTNAME cm-bf548
/* /*
* Flash Settings * Flash Settings
*/ */
@ -88,7 +83,6 @@
#define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_MAX_FLASH_SECT 259 #define CONFIG_SYS_MAX_FLASH_SECT 259
/* /*
* Env Storage Settings * Env Storage Settings
*/ */
@ -98,14 +92,12 @@
#define CONFIG_ENV_SIZE 0x8000 #define CONFIG_ENV_SIZE 0x8000
#define CONFIG_ENV_IS_EMBEDDED_IN_LDR #define CONFIG_ENV_IS_EMBEDDED_IN_LDR
/* /*
* I2C Settings * I2C Settings
*/ */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_ADI #define CONFIG_SYS_I2C_ADI
/* /*
* Misc Settings * Misc Settings
*/ */
@ -134,7 +126,6 @@
#define FLASH_END_POST_BLOCK 71 /* Should < = 71 */ #define FLASH_END_POST_BLOCK 71 /* Should < = 71 */
#endif #endif
/* /*
* Pull in common ADI header for remaining command/environment setup * Pull in common ADI header for remaining command/environment setup
*/ */

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