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armv8/lsch3/config: Define CONFIG_SYS_CACHELINE_SIZE for LS2085A

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Define CONFIG_SYS_CACHELINE_SIZE for LS2085A which is required by
USB XHCI stack for alignment

Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
This commit is contained in:
Nikhil Badola 2015-06-26 16:59:21 +05:30 committed by York Sun
parent 56848428a8
commit ca7fb12cc1
1 changed files with 1 additions and 0 deletions
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1
arch/arm/include/asm/arch-fsl-lsch3/config.h
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@ -10,6 +10,7 @@
#include <fsl_ddrc_version.h>
#define CONFIG_SYS_PAGE_SIZE 0x10000
#define CONFIG_SYS_CACHELINE_SIZE 64
#ifndef L1_CACHE_BYTES
#define L1_CACHE_SHIFT 6