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riscv: ax25: add SPL support
The U-Boot SPL will boot in M mode and load the FIT image which include OpenSBI and U-Boot proper images. After loading progress, it will jump to OpenSBI first and then U-Boot proper which will run in S mode. Also remove V5L2_CACHE due to U-Boot SPL code size consideration. Without this concern, it can be enable manually for performance. Signed-off-by: Rick Chen <rick@andestech.com> Cc: KC Lin <kclin@andestech.com> Cc: Alan Kao <alankao@andestech.com>
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@ -6,7 +6,9 @@ config RISCV_NDS
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imply RISCV_TIMER
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imply ANDES_PLIC if (RISCV_MMODE || SPL_RISCV_MMODE)
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imply ANDES_PLMT if (RISCV_MMODE || SPL_RISCV_MMODE)
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imply V5L2_CACHE
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imply SPL_CPU_SUPPORT
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imply SPL_OPENSBI
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imply SPL_LOAD_FIT
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help
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Run U-Boot on AndeStar V5 platforms and use some specific features
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which are provided by Andes Technology AndeStar V5 families.
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