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ram: stm32mp1: display result for software read DQS gating

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Display result information for software read DQS gating, the tuning 0
which be used by CubeMX DDR tuning tools.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
This commit is contained in:
Patrick Delaunay 2020-03-06 11:14:04 +01:00
parent e9a20f8a19
commit c8eb4e038c
1 changed files with 6 additions and 4 deletions
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10
drivers/ram/stm32mp1/stm32mp1_tuning.c
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@ -1182,15 +1182,17 @@ static u8 set_midpoint_read_dqs_gating(struct stm32mp1_ddrphy *phy, u8 byte,
dqs_gate_values[byte][0],
dqs_gate_values[byte][1]);
pr_debug("*******the nominal values were system latency: 0 phase: 2*******\n");
set_r0dgsl_delay(phy, byte, dqs_gate_values[byte][0]);
set_r0dgps_delay(phy, byte, dqs_gate_values[byte][1]);
}
} else {
/* if intermitant, restore defaut values */
pr_debug("dqs gating:no regular fail/pass/fail found. defaults values restored.\n");
set_r0dgsl_delay(phy, byte, 0);
set_r0dgps_delay(phy, byte, 2);
dqs_gate_values[byte][0] = 0;
dqs_gate_values[byte][1] = 2;
}
set_r0dgsl_delay(phy, byte, dqs_gate_values[byte][0]);
set_r0dgps_delay(phy, byte, dqs_gate_values[byte][1]);
printf("Byte %d, R0DGSL = %d, R0DGPS = %d\n",
byte, dqs_gate_values[byte][0], dqs_gate_values[byte][1]);
/* return 0 if intermittent or if both left_bound
* and right_bound are not found