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arm: am437x: Correct PLL frequency for 25MHz
The frequencies for 25MHz in dpll_per were out of spec for 25MHz, correct. Signed-off-by: James Doublesin <doublesin@ti.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
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@ -124,7 +124,7 @@ const struct dpll_params dpll_core[NUM_CRYSTAL_FREQ] = {
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const struct dpll_params dpll_per[NUM_CRYSTAL_FREQ] = {
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const struct dpll_params dpll_per[NUM_CRYSTAL_FREQ] = {
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{400, 7, 5, -1, -1, -1, -1}, /* 19.2 MHz */
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{400, 7, 5, -1, -1, -1, -1}, /* 19.2 MHz */
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{400, 9, 5, -1, -1, -1, -1}, /* 24 MHz */
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{400, 9, 5, -1, -1, -1, -1}, /* 24 MHz */
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{32, 0, 8, -1, -1, -1, -1}, /* 25 MHz */
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{384, 9, 5, -1, -1, -1, -1}, /* 25 MHz */
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{480, 12, 5, -1, -1, -1, -1} /* 26 MHz */
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{480, 12, 5, -1, -1, -1, -1} /* 26 MHz */
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};
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};
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