arm: am437x: Correct PLL frequency for 25MHz

The frequencies for 25MHz in dpll_per were out of spec for 25MHz,
correct.

Signed-off-by: James Doublesin <doublesin@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
This commit is contained in:
James Doublesin 2014-12-22 16:26:12 -06:00 committed by Tom Rini
parent fc46bae2ae
commit c87b6a96ac

View File

@ -124,7 +124,7 @@ const struct dpll_params dpll_core[NUM_CRYSTAL_FREQ] = {
const struct dpll_params dpll_per[NUM_CRYSTAL_FREQ] = {
{400, 7, 5, -1, -1, -1, -1}, /* 19.2 MHz */
{400, 9, 5, -1, -1, -1, -1}, /* 24 MHz */
{32, 0, 8, -1, -1, -1, -1}, /* 25 MHz */
{384, 9, 5, -1, -1, -1, -1}, /* 25 MHz */
{480, 12, 5, -1, -1, -1, -1} /* 26 MHz */
};