brain-hackers_pepepper-mirror/u-boot-brain
1
0
Fork 0
mirror of https://github.com/brain-hackers/u-boot-brain synced 2024-10-04 02:20:43 +09:00
Code Issues Projects Releases Wiki Activity

Fixed OF device tree of mpc86xxhpcn board.

Browse Source 
The changes works in with kernel irq mapping rework.

Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
This commit is contained in:
Zhang Wei 2006-07-28 00:01:34 +08:00 committed by Jon Loeliger
parent bea3f28d28
commit c86360b830
1 changed files with 75 additions and 61 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

136
board/mpc8641hpcn/oftree.dts
View File

@ -205,99 +205,113 @@
clock-frequency = <1fca055>;
interrupt-parent = <40000>;
interrupts = <18 2>;
interrupt-map-mask = <f800 0 0 f>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x11 */
8800 0 0 1 40000 3 0
8800 0 0 2 40000 4 0
8800 0 0 3 40000 5 0
8800 0 0 4 40000 6 0
8800 0 0 1 4d0 3 2
8800 0 0 2 4d0 4 2
8800 0 0 3 4d0 5 2
8800 0 0 4 4d0 6 2
/* IDSEL 0x12 */
9000 0 0 1 40000 4 0
9000 0 0 2 40000 5 0
9000 0 0 3 40000 6 0
9000 0 0 4 40000 3 0
9000 0 0 1 4d0 4 2
9000 0 0 2 4d0 5 2
9000 0 0 3 4d0 6 2
9000 0 0 4 4d0 3 2
/* IDSEL 0x13 */
9800 0 0 1 40000 0 0
9800 0 0 2 40000 0 0
9800 0 0 3 40000 0 0
9800 0 0 4 40000 0 0
9800 0 0 1 4d0 0 0
9800 0 0 2 4d0 0 0
9800 0 0 3 4d0 0 0
9800 0 0 4 4d0 0 0
/* IDSEL 0x14 */
a000 0 0 1 40000 0 0
a000 0 0 2 40000 0 0
a000 0 0 3 40000 0 0
a000 0 0 4 40000 0 0
a000 0 0 1 4d0 0 0
a000 0 0 2 4d0 0 0
a000 0 0 3 4d0 0 0
a000 0 0 4 4d0 0 0
/* IDSEL 0x15 */
a800 0 0 1 40000 0 0
a800 0 0 2 40000 0 0
a800 0 0 3 40000 0 0
a800 0 0 4 40000 0 0
a800 0 0 1 4d0 0 0
a800 0 0 2 4d0 0 0
a800 0 0 3 4d0 0 0
a800 0 0 4 4d0 0 0
/* IDSEL 0x16 */
b000 0 0 1 40000 0 0
b000 0 0 2 40000 0 0
b000 0 0 3 40000 0 0
b000 0 0 4 40000 0 0
b000 0 0 1 4d0 0 0
b000 0 0 2 4d0 0 0
b000 0 0 3 4d0 0 0
b000 0 0 4 4d0 0 0
/* IDSEL 0x17 */
b800 0 0 1 40000 0 0
b800 0 0 2 40000 0 0
b800 0 0 3 40000 0 0
b800 0 0 4 40000 0 0
b800 0 0 1 4d0 0 0
b800 0 0 2 4d0 0 0
b800 0 0 3 4d0 0 0
b800 0 0 4 4d0 0 0
/* IDSEL 0x18 */
c000 0 0 1 40000 0 0
c000 0 0 2 40000 0 0
c000 0 0 3 40000 0 0
c000 0 0 4 40000 0 0
c000 0 0 1 4d0 0 0
c000 0 0 2 4d0 0 0
c000 0 0 3 4d0 0 0
c000 0 0 4 4d0 0 0
/* IDSEL 0x19 */
c800 0 0 1 40000 0 0
c800 0 0 2 40000 0 0
c800 0 0 3 40000 0 0
c800 0 0 4 40000 0 0
c800 0 0 1 4d0 0 0
c800 0 0 2 4d0 0 0
c800 0 0 3 4d0 0 0
c800 0 0 4 4d0 0 0
/* IDSEL 0x1a */
d000 0 0 1 40000 6 0
d000 0 0 2 40000 3 0
d000 0 0 3 40000 4 0
d000 0 0 4 40000 5 0
d000 0 0 1 4d0 6 2
d000 0 0 2 4d0 3 2
d000 0 0 3 4d0 4 2
d000 0 0 4 4d0 5 2
/* IDSEL 0x1b */
d800 0 0 1 40000 5 0
d800 0 0 2 40000 0 0
d800 0 0 3 40000 0 0
d800 0 0 4 40000 0 0
d800 0 0 1 4d0 5 2
d800 0 0 2 4d0 0 0
d800 0 0 3 4d0 0 0
d800 0 0 4 4d0 0 0
/* IDSEL 0x1c */
e000 0 0 1 40000 9 0
e000 0 0 2 40000 a 0
e000 0 0 3 40000 c 0
e000 0 0 4 40000 7 0
e000 0 0 1 4d0 9 2
e000 0 0 2 4d0 a 2
e000 0 0 3 4d0 c 2
e000 0 0 4 4d0 7 2
/* IDSEL 0x1d */
e800 0 0 1 40000 9 0
e800 0 0 2 40000 a 0
e800 0 0 3 40000 b 0
e800 0 0 4 40000 0 0
e800 0 0 1 4d0 9 2
e800 0 0 2 4d0 a 2
e800 0 0 3 4d0 b 2
e800 0 0 4 4d0 0 0
/* IDSEL 0x1e */
f000 0 0 1 40000 c 0
f000 0 0 2 40000 0 0
f000 0 0 3 40000 0 0
f000 0 0 4 40000 0 0
f000 0 0 1 4d0 c 2
f000 0 0 2 4d0 0 0
f000 0 0 3 4d0 0 0
f000 0 0 4 4d0 0 0
/* IDSEL 0x1f */
f800 0 0 1 40000 6 0
f800 0 0 2 40000 0 0
f800 0 0 3 40000 0 0
f800 0 0 4 40000 0 0
f800 0 0 1 4d0 6 2
f800 0 0 2 4d0 0 0
f800 0 0 3 4d0 0 0
f800 0 0 4 4d0 0 0
>;
i8259@4d0 {
linux,phandle = <4d0>;
clock-frequency = <0>;
interrupt-controller;
device_type = "interrupt-controller";
#address-cells = <0>;
#interrupt-cells = <2>;
built-in;
compatible = "chrp,iic";
big-endian;
interrupts = <49 2>;
interrupt-parent = <40000>;
};
};
pic@40000 {
linux,phandle = <40000>;