Add support for MT7622 reference board
This adds a general board file based on MT7622 SoCs from MediaTek. This commit is adding the basic boot support for the MT7622 rfb. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com> Tested-by: Frank Wunderlich <frank-w@public-files.de>
This commit is contained in:
Sam Shih
Tom Rini
parent
25273dbd57
commit
c7fbc62082
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@ -872,6 +872,7 @@ dtb-$(CONFIG_SOC_K3_J721E) += k3-j721e-common-proc-board.dtb \
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k3-j721e-r5-common-proc-board.dtb
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dtb-$(CONFIG_ARCH_MEDIATEK) += \
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mt7622-rfb.dtb \
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mt7623n-bananapi-bpi-r2.dtb \
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mt7629-rfb.dtb \
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mt8512-bm1-emmc.dtb \
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@ -0,0 +1,180 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2019 MediaTek Inc.
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* Author: Sam Shih <sam.shih@mediatek.com>
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*/
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/dts-v1/;
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#include "mt7622.dtsi"
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#include "mt7622-u-boot.dtsi"
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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model = "mt7622-rfb";
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compatible = "mediatek,mt7622", "mediatek,mt7622-rfb";
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chosen {
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stdout-path = &uart0;
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tick-timer = &timer0;
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};
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aliases {
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spi0 = &snfi;
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};
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memory@40000000 {
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device_type = "memory";
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reg = <0x40000000 0x10000000>;
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};
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reg_1p8v: regulator-1p8v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-1.8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_3p3v: regulator-3p3v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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};
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&pinctrl {
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snfi_pins: snfi-pins {
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mux {
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function = "flash";
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groups = "snfi";
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};
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};
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snor_pins: snor-pins {
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mux {
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function = "flash";
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groups = "spi_nor";
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};
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};
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uart0_pins: uart0 {
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mux {
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function = "uart";
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groups = "uart0_0_tx_rx" ;
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};
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};
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watchdog_pins: watchdog-default {
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mux {
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function = "watchdog";
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groups = "watchdog";
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};
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};
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mmc0_pins_default: mmc0default {
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mux {
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function = "emmc";
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groups = "emmc";
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};
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/* "NDL0","NDL1","NDL2","NDL3","NDL4","NDL5","NDL6","NDL7",
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* "NRB","NCLE" pins are used as DAT0,DAT1,DAT2,DAT3,DAT4,
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* DAT5,DAT6,DAT7,CMD,CLK for eMMC respectively
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*/
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conf-cmd-dat {
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pins = "NDL0", "NDL1", "NDL2",
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"NDL3", "NDL4", "NDL5",
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"NDL6", "NDL7", "NRB";
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input-enable;
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bias-pull-up;
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};
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conf-clk {
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pins = "NCLE";
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bias-pull-down;
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};
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};
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mmc1_pins_default: mmc1default {
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mux {
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function = "sd";
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groups = "sd_0";
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};
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/* "I2S2_OUT, "I2S4_IN"", "I2S3_IN", "I2S2_IN",
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* "I2S4_OUT", "I2S3_OUT" are used as DAT0, DAT1,
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* DAT2, DAT3, CMD, CLK for SD respectively.
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*/
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conf-cmd-data {
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pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN",
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"I2S2_IN","I2S4_OUT";
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input-enable;
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drive-strength = <8>;
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bias-pull-up;
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};
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conf-clk {
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pins = "I2S3_OUT";
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drive-strength = <12>;
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bias-pull-down;
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};
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conf-cd {
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pins = "TXD3";
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bias-pull-up;
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};
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};
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};
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&snfi {
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pinctrl-names = "default", "snfi";
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pinctrl-0 = <&snor_pins>;
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pinctrl-1 = <&snfi_pins>;
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status = "okay";
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spi-flash@0{
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compatible = "jedec,spi-nor";
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reg = <0>;
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u-boot,dm-pre-reloc;
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};
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pins>;
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status = "okay";
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};
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&mmc0 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc0_pins_default>;
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status = "okay";
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bus-width = <8>;
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max-frequency = <50000000>;
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cap-sd-highspeed;
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vmmc-supply = <®_3p3v>;
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vqmmc-supply = <®_3p3v>;
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non-removable;
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};
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&mmc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc1_pins_default>;
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status = "okay";
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bus-width = <4>;
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max-frequency = <50000000>;
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cap-sd-highspeed;
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r_smpl = <1>;
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vmmc-supply = <®_3p3v>;
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vqmmc-supply = <®_3p3v>;
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};
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&watchdog {
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pinctrl-names = "default";
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pinctrl-0 = <&watchdog_pins>;
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status = "okay";
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};
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@ -0,0 +1,17 @@
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if TARGET_MT7622
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config SYS_BOARD
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default "mt7622"
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config SYS_CONFIG_NAME
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default "mt7622"
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config MTK_BROM_HEADER_INFO
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string
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default "lk=1"
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config MTK_BROM_HEADER_INFO
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string
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default "media=nor"
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endif
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@ -0,0 +1,6 @@
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MT7622
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M: Sam Shih <sam.shih@mediatek.com>
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S: Maintained
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F: board/mediatek/mt7622
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F: include/configs/mt7622.h
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F: configs/mt7622_rfb_defconfig
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@ -0,0 +1,4 @@
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# SPDX-License-Identifier: GPL-2.0
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obj-y += mt7622_rfb.o
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@ -0,0 +1,23 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2018 MediaTek Inc.
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* Author: Sam Shih <sam.shih@mediatek.com>
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*/
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#include <common.h>
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#include <config.h>
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DECLARE_GLOBAL_DATA_PTR;
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int board_init(void)
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{
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gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
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return 0;
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}
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int board_late_init(void)
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{
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gd->env_valid = 1; //to load environment variable from persistent store
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env_relocate();
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return 0;
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}
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@ -0,0 +1,55 @@
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CONFIG_ARM=y
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CONFIG_POSITION_INDEPENDENT=y
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CONFIG_ARCH_MEDIATEK=y
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CONFIG_TARGET_MT7622=y
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CONFIG_SYS_TEXT_BASE=0x41e00000
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CONFIG_SYS_MALLOC_F_LEN=0x4000
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_SMBIOS_PRODUCT_NAME=""
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CONFIG_FIT=y
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CONFIG_LOGLEVEL=7
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CONFIG_LOG=y
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CONFIG_LOG_MAX_LEVEL=6
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CONFIG_DEFAULT_FDT_FILE="mt7622-rfb"
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CONFIG_SYS_PROMPT="MT7622> "
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CONFIG_CMD_BOOTMENU=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_SF_TEST=y
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CONFIG_CMD_SMC=y
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CONFIG_DEFAULT_DEVICE_TREE="mt7622-rfb"
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CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
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CONFIG_REGMAP=y
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CONFIG_SYSCON=y
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CONFIG_CLK=y
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CONFIG_DM_GPIO=y
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CONFIG_DM_MMC=y
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CONFIG_MMC_HS200_SUPPORT=y
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CONFIG_MMC_MTK=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH_EON=y
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CONFIG_SPI_FLASH_GIGADEVICE=y
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CONFIG_SPI_FLASH_ISSI=y
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CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_SPI_FLASH_SPANSION=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_DM_ETH=y
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CONFIG_PINCTRL=y
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CONFIG_PINCONF=y
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CONFIG_PINCTRL_MT7622=y
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CONFIG_POWER_DOMAIN=y
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CONFIG_MTK_POWER_DOMAIN=y
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CONFIG_RAM=y
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CONFIG_DM_RESET=y
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CONFIG_DM_SERIAL=y
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CONFIG_MTK_SERIAL=y
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CONFIG_SPI=y
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CONFIG_DM_SPI=y
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CONFIG_MTK_SNFI_SPI=y
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CONFIG_SYSRESET_WATCHDOG=y
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CONFIG_TIMER=y
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CONFIG_MTK_TIMER=y
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CONFIG_WDT_MTK=y
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CONFIG_LZ4=y
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CONFIG_LZO=y
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CONFIG_HEXDUMP=y
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@ -0,0 +1,46 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Configuration for MediaTek MT7629 SoC
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*
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* Copyright (C) 2019 MediaTek Inc.
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* Author: Sam Shih <sam.shih@mediatek.com>
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*/
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#ifndef __MT7622_H
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#define __MT7622_H
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#include <linux/sizes.h>
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#define CONFIG_SYS_MAXARGS 8
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#define CONFIG_SYS_BOOTM_LEN SZ_64M
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#define CONFIG_SYS_CBSIZE SZ_1K
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + 16)
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN SZ_4M
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#define CONFIG_SYS_NONCACHED_MEMORY SZ_1M
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/* Allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_SYS_MMC_ENV_DEV 0
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/* Uboot definition */
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#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE
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/* SPL -> Uboot */
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#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_2M - \
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GENERATED_GBL_DATA_SIZE)
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/* UBoot -> Kernel */
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#define CONFIG_LOADADDR 0x4007ff28
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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/* DRAM */
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#define CONFIG_SYS_SDRAM_BASE 0x40000000
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/* Ethernet */
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#define CONFIG_IPADDR 192.168.1.1
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#define CONFIG_SERVERIP 192.168.1.3
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#endif
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