brain-hackers_pepepper-mirror
/
u-boot-brain
mirror of https://github.com/brain-hackers/u-boot-brain
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

usb.h: use standard __LITTLE_ENDIAN from Linux headers 

Rather than forcing people to define a custom "LITTLEENDIAN", just use the
__LITTLE_ENDIAN one from the Linux byteorder headers that every arch is
already setting up.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
This commit is contained in:
Mike Frysinger 2009-01-01 18:27:27 -05:00 committed by Remy Bohmer
parent 7b6e31eb17
commit c7d703f3f3
16 changed files with 5 additions and 25 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
common/usb_storage.c
View File

@ -45,8 +45,6 @@
* New Note:
* Support for USB Mass Storage Devices (BBB) has been added. It has
* only been tested with USB memory sticks.
* Nota bene: if you are using the BBB support with a little-endian
* CPU then you MUST define LITTLEENDIAN in the configuration file!
*/

4
cpu/arm920t/s3c24x0/usb_ohci.c
View File

@ -29,9 +29,7 @@
*/
/*
* IMPORTANT NOTES
* 1 - you MUST define LITTLEENDIAN in the configuration file for the
* board or this driver will NOT work!
* 2 - this driver is intended for use with USB Mass Storage Devices
* 1 - this driver is intended for use with USB Mass Storage Devices
* (BBB) ONLY. There is NO support for Interrupt or Isochronous pipes!
*/

6
cpu/mips/au1x00_usb_ohci.c
View File

@ -27,9 +27,7 @@
*/
/*
* IMPORTANT NOTES
* 1 - you MUST define LITTLEENDIAN in the configuration file for the
* board or this driver will NOT work!
* 2 - this driver is intended for use with USB Mass Storage Devices
* 1 - this driver is intended for use with USB Mass Storage Devices
* (BBB) ONLY. There is NO support for Interrupt or Isochronous pipes!
*/
@ -56,7 +54,7 @@
#define USBH_ENABLE_CE (1<<3)
#define USBH_ENABLE_RD (1<<4)
#ifdef LITTLEENDIAN
#ifdef __LITTLE_ENDIAN
#define USBH_ENABLE_INIT (USBH_ENABLE_CE | USBH_ENABLE_E | USBH_ENABLE_C)
#else
#define USBH_ENABLE_INIT (USBH_ENABLE_CE | USBH_ENABLE_E | USBH_ENABLE_C | USBH_ENABLE_BE)

1
include/configs/VCMA9.h
View File

@ -36,7 +36,6 @@
#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
#define CONFIG_S3C2410 1 /* in a SAMSUNG S3C2410 SoC */
#define CONFIG_VCMA9 1 /* on a MPL VCMA9 Board */
#define LITTLEENDIAN 1 /* used by usb_ohci.c */
/* input clock of PLL */
#define CONFIG_SYS_CLK_FREQ 12000000/* VCMA9 has 12MHz input clock */

1
include/configs/afeb9260.h
View File

@ -114,7 +114,6 @@
/* USB */
#define CONFIG_USB_OHCI_NEW 1
#define LITTLEENDIAN 1
#define CONFIG_DOS_PARTITION 1
#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9260_UHP_BASE */

1
include/configs/at91cap9adk.h
View File

@ -131,7 +131,6 @@
/* USB */
#define CONFIG_USB_OHCI_NEW 1
#define LITTLEENDIAN 1
#define CONFIG_DOS_PARTITION 1
#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00700000 /* AT91_BASE_UHP */

1
include/configs/at91sam9260ek.h
View File

@ -116,7 +116,6 @@
/* USB */
#define CONFIG_USB_OHCI_NEW 1
#define LITTLEENDIAN 1
#define CONFIG_DOS_PARTITION 1
#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9260_UHP_BASE */

1
include/configs/at91sam9261ek.h
View File

@ -129,7 +129,6 @@
/* USB */
#define CONFIG_USB_OHCI_NEW 1
#define LITTLEENDIAN 1
#define CONFIG_DOS_PARTITION 1
#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */

1
include/configs/at91sam9263ek.h
View File

@ -136,7 +136,6 @@
/* USB */
#define CONFIG_USB_OHCI_NEW 1
#define LITTLEENDIAN 1
#define CONFIG_DOS_PARTITION 1
#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000 /* AT91SAM9263_UHP_BASE */

2
include/configs/delta.h
View File

@ -131,8 +131,6 @@
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "delta"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3
#define LITTLEENDIAN 1 /* used by usb_ohci.c */
#define CONFIG_BOOTDELAY -1
#define CONFIG_ETHADDR 08:00:3e:26:0a:5b
#define CONFIG_NETMASK 255.255.0.0

1
include/configs/mp2usb.h
View File

@ -216,7 +216,6 @@
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_DEVICE_DEREGISTER /* needs device_deregister */
#define LITTLEENDIAN 1 /* used by usb_ohci.c */
#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_HZ_CLOCK (AT91C_MASTER_CLOCK/2) /* AT91C_TC0_CMR is implicitly set to */

1
include/configs/sh7785lcr.h
View File

@ -123,7 +123,6 @@
#undef CONFIG_SYS_DIRECT_FLASH_TFTP
/* R8A66597 */
#define LITTLEENDIAN /* for include/usb.h */
#define CONFIG_USB_R8A66597_HCD
#define CONFIG_R8A66597_BASE_ADDR SH7785LCR_USB_BASE
#define CONFIG_R8A66597_XTAL 0x0000 /* 12MHz */

1
include/configs/smdk6400.h
View File

@ -293,7 +293,6 @@
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "s3c6400"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3
#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
#define LITTLEENDIAN 1 /* used by usb_ohci.c */
#define CONFIG_USB_STORAGE 1
#endif

1
include/configs/trab.h
View File

@ -44,7 +44,6 @@
#define CONFIG_S3C2400 1 /* in a SAMSUNG S3C2400 SoC */
#define CONFIG_TRAB 1 /* on a TRAB Board */
#undef CONFIG_TRAB_50MHZ /* run the CPU at 50 MHz */
#define LITTLEENDIAN 1 /* used by usb_ohci.c */
/* automatic software updates (see board/trab/auto_update.c) */
#define CONFIG_AUTO_UPDATE 1

2
include/configs/trizepsiv.h
View File

@ -42,8 +42,6 @@
*/
#define CONFIG_PXA27X 1 /* This is an PXA27x CPU */
#define LITTLEENDIAN 1 /* used by usb_ohci.c */
#define CONFIG_MMC 1
#define BOARD_LATE_INIT 1

4
include/usb.h
View File

@ -265,13 +265,13 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate);
((x_ & 0xFF000000UL) >> 24)); \
})
#ifdef LITTLEENDIAN
#ifdef __LITTLE_ENDIAN
# define swap_16(x) (x)
# define swap_32(x) (x)
#else
# define swap_16(x) __swap_16(x)
# define swap_32(x) __swap_32(x)
#endif /* LITTLEENDIAN */
#endif
/*
* Calling this entity a "pipe" is glorifying it. A USB pipe