ARM: rmobile: Do not init caches in TPL before DRAM

Skip the cache initialization, which can be done later on in U-Boot
proper, since this interferes with early DRAM initialization in TPL.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This commit is contained in:
Marek Vasut 2018-04-04 23:32:44 +02:00
parent ce19d4ca7d
commit c670607331

View File

@ -11,6 +11,7 @@
#include <linux/linkage.h>
ENTRY(lowlevel_init)
#ifndef CONFIG_TPL_BUILD
mrc p15, 0, r4, c0, c0, 5 /* mpidr */
orr r4, r4, r4, lsr #6
and r4, r4, #7 /* id 0-3 = ca15.0,1,2,3 */
@ -83,6 +84,7 @@ _exit_init_l2_a15:
bl s_init
ldr lr, [sp]
#endif
mov pc, lr
nop
ENDPROC(lowlevel_init)