phy: usbphyc: Binding update of vdda supply

Move supply vdda1v1 and vdda1v8 in usbphyc node and
no more in port

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
This commit is contained in:
Patrick Delaunay 2019-03-29 15:42:11 +01:00 committed by Marek Vasut
parent 1655f2da84
commit c50151d43f
4 changed files with 35 additions and 34 deletions

View File

@ -382,18 +382,10 @@
status = "okay";
};
&usbotg_hs {
usb33d-supply = <&usb33>;
};
&usbphyc_port0 {
phy-supply = <&vdd_usb>;
vdda1v1-supply = <&reg11>;
vdda1v8-supply = <&reg18>;
};
&usbphyc_port1 {
phy-supply = <&vdd_usb>;
vdda1v1-supply = <&reg11>;
vdda1v8-supply = <&reg18>;
};

View File

@ -836,6 +836,7 @@
g-np-tx-fifo-size = <32>;
g-tx-fifo-size = <128 128 64 64 64 64 32 32>;
dr_mode = "otg";
usb33d-supply = <&usb33>;
status = "disabled";
};
@ -1161,6 +1162,8 @@
reg = <0x5a006000 0x1000>;
clocks = <&rcc USBPHY_K>;
resets = <&rcc USBPHY_R>;
vdda1v1-supply = <&reg11>;
vdda1v8-supply = <&reg18>;
status = "disabled";
usbphyc_port0: usb-phy@0 {

View File

@ -23,6 +23,8 @@ Required properties:
- compatible: must be "st,stm32mp1-usbphyc"
- reg: address and length of the usb phy control register set
- clocks: phandle + clock specifier for the PLL phy clock
- vdda1v1-supply: phandle to the regulator providing 1V1 power to the PHY
- vdda1v8-supply: phandle to the regulator providing 1V8 power to the PHY
- #address-cells: number of address cells for phys sub-nodes, must be <1>
- #size-cells: number of size cells for phys sub-nodes, must be <0>
@ -40,8 +42,6 @@ Required properties:
- reg: phy port index
- phy-supply: phandle to the regulator providing 3V3 power to the PHY,
see phy-bindings.txt in the same directory.
- vdda1v1-supply: phandle to the regulator providing 1V1 power to the PHY
- vdda1v8-supply: phandle to the regulator providing 1V8 power to the PHY
- #phy-cells: see phy-bindings.txt in the same directory, must be <0> for PHY
port#1 and must be <1> for PHY port#2, to select USB controller

View File

@ -51,10 +51,10 @@ struct pll_params {
struct stm32_usbphyc {
fdt_addr_t base;
struct clk clk;
struct udevice *vdda1v1;
struct udevice *vdda1v8;
struct stm32_usbphyc_phy {
struct udevice *vdd;
struct udevice *vdda1v1;
struct udevice *vdda1v8;
bool init;
bool powered;
} phys[MAX_PHYS];
@ -212,19 +212,20 @@ static int stm32_usbphyc_phy_power_on(struct phy *phy)
int ret;
pr_debug("%s phy ID = %lu\n", __func__, phy->id);
if (usbphyc_phy->vdda1v1) {
ret = regulator_set_enable(usbphyc_phy->vdda1v1, true);
if (usbphyc->vdda1v1) {
ret = regulator_set_enable(usbphyc->vdda1v1, true);
if (ret)
return ret;
}
if (usbphyc_phy->vdda1v8) {
ret = regulator_set_enable(usbphyc_phy->vdda1v8, true);
if (usbphyc->vdda1v8) {
ret = regulator_set_enable(usbphyc->vdda1v8, true);
if (ret)
return ret;
}
if (usbphyc_phy->vdd) {
ret = regulator_set_enable(usbphyc_phy->vdd, true);
if (usbphyc->vdd) {
ret = regulator_set_enable(usbphyc->vdd, true);
if (ret)
return ret;
}
@ -246,20 +247,20 @@ static int stm32_usbphyc_phy_power_off(struct phy *phy)
if (stm32_usbphyc_is_powered(usbphyc))
return 0;
if (usbphyc_phy->vdda1v1) {
ret = regulator_set_enable(usbphyc_phy->vdda1v1, false);
if (usbphyc->vdda1v1) {
ret = regulator_set_enable(usbphyc->vdda1v1, false);
if (ret)
return ret;
}
if (usbphyc_phy->vdda1v8) {
ret = regulator_set_enable(usbphyc_phy->vdda1v8, false);
if (usbphyc->vdda1v8) {
ret = regulator_set_enable(usbphyc->vdda1v8, false);
if (ret)
return ret;
}
if (usbphyc_phy->vdd) {
ret = regulator_set_enable(usbphyc_phy->vdd, false);
if (usbphyc->vdd) {
ret = regulator_set_enable(usbphyc->vdd, false);
if (ret)
return ret;
}
@ -351,6 +352,21 @@ static int stm32_usbphyc_probe(struct udevice *dev)
reset_deassert(&reset);
}
/* get usbphyc regulator */
ret = device_get_supply_regulator(dev, "vdda1v1-supply",
&usbphyc->vdda1v1);
if (ret) {
dev_err(dev, "Can't get vdda1v1-supply regulator\n");
return ret;
}
ret = device_get_supply_regulator(dev, "vdda1v8-supply",
&usbphyc->vdda1v8);
if (ret) {
dev_err(dev, "Can't get vdda1v8-supply regulator\n");
return ret;
}
/*
* parse all PHY subnodes in order to populate regulator associated
* to each PHY port
@ -366,16 +382,6 @@ static int stm32_usbphyc_probe(struct udevice *dev)
if (ret)
return ret;
ret = stm32_usbphyc_get_regulator(dev, node, "vdda1v1-supply",
&usbphyc_phy->vdda1v1);
if (ret)
return ret;
ret = stm32_usbphyc_get_regulator(dev, node, "vdda1v8-supply",
&usbphyc_phy->vdda1v8);
if (ret)
return ret;
node = dev_read_next_subnode(node);
}