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dm: pci: Update the PCI read_config() method to const dev *

Browse Source 
At present this method uses a non-const udevice pointer, but the call
should not modify the device. Use a const pointer.

Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Simon Glass 2020-01-27 08:49:37 -07:00
parent fc347fbdd4
commit c4e72c4ad8
26 changed files with 67 additions and 60 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
drivers/misc/p2sb_emul.c
View File

@ -48,8 +48,9 @@ struct p2sb_emul_priv {
u8 regs[16]; u8 regs[16];
}; };
static int sandbox_p2sb_emul_read_config(struct udevice *emul, uint offset, static int sandbox_p2sb_emul_read_config(const struct udevice *emul,
ulong *valuep, enum pci_size_t size) uint offset, ulong *valuep,
enum pci_size_t size)
{ {
struct p2sb_emul_platdata *plat = dev_get_platdata(emul); struct p2sb_emul_platdata *plat = dev_get_platdata(emul);

9
drivers/misc/swap_case.c
View File

@ -51,7 +51,7 @@ struct swap_case_priv {
char mem_text[MEM_TEXT_SIZE]; char mem_text[MEM_TEXT_SIZE];
}; };
static int sandbox_swap_case_use_ea(struct udevice *dev) static int sandbox_swap_case_use_ea(const struct udevice *dev)
{ {
return !!ofnode_get_property(dev->node, "use-ea", NULL); return !!ofnode_get_property(dev->node, "use-ea", NULL);
} }
@ -82,7 +82,7 @@ static const u32 ea_regs[] = {
PCI_CAP_EA_SIZE_HI, PCI_CAP_EA_SIZE_HI,
}; };
static int sandbox_swap_case_read_ea(struct udevice *emul, uint offset, static int sandbox_swap_case_read_ea(const struct udevice *emul, uint offset,
ulong *valuep, enum pci_size_t size) ulong *valuep, enum pci_size_t size)
{ {
u32 reg; u32 reg;
@ -95,8 +95,9 @@ static int sandbox_swap_case_read_ea(struct udevice *emul, uint offset,
return 0; return 0;
} }
static int sandbox_swap_case_read_config(struct udevice *emul, uint offset, static int sandbox_swap_case_read_config(const struct udevice *emul,
ulong *valuep, enum pci_size_t size) uint offset, ulong *valuep,
enum pci_size_t size)
{ {
struct swap_case_platdata *plat = dev_get_platdata(emul); struct swap_case_platdata *plat = dev_get_platdata(emul);

2
drivers/pci/pci-aardvark.c
View File

@ -297,7 +297,7 @@ static int pcie_advk_check_pio_status(struct pcie_advk *pcie,
* *
* Return: 0 on success * Return: 0 on success
*/ */
static int pcie_advk_read_config(struct udevice *bus, pci_dev_t bdf, static int pcie_advk_read_config(const struct udevice *bus, pci_dev_t bdf,
uint offset, ulong *valuep, uint offset, ulong *valuep,
enum pci_size_t size) enum pci_size_t size)
{ {

2
drivers/pci/pci-emul-uclass.c
View File

@ -15,7 +15,7 @@ struct sandbox_pci_emul_priv {
int dev_count; int dev_count;
}; };
int sandbox_pci_get_emul(struct udevice *bus, pci_dev_t find_devfn, int sandbox_pci_get_emul(const struct udevice *bus, pci_dev_t find_devfn,
struct udevice **containerp, struct udevice **emulp) struct udevice **containerp, struct udevice **emulp)
{ {
struct pci_emul_uc_priv *upriv; struct pci_emul_uc_priv *upriv;

4
drivers/pci/pci-rcar-gen2.c
View File

@ -107,7 +107,7 @@ static int rcar_gen2_pci_addr_valid(pci_dev_t d, uint offset)
return 0; return 0;
} }
static u32 get_bus_address(struct udevice *dev, pci_dev_t bdf, u32 offset) static u32 get_bus_address(const struct udevice *dev, pci_dev_t bdf, u32 offset)
{ {
struct rcar_gen2_pci_priv *priv = dev_get_priv(dev); struct rcar_gen2_pci_priv *priv = dev_get_priv(dev);
@ -126,7 +126,7 @@ static u32 setup_bus_address(struct udevice *dev, pci_dev_t bdf, u32 offset)
return get_bus_address(dev, bdf, offset); return get_bus_address(dev, bdf, offset);
} }
static int rcar_gen2_pci_read_config(struct udevice *dev, pci_dev_t bdf, static int rcar_gen2_pci_read_config(const struct udevice *dev, pci_dev_t bdf,
uint offset, ulong *value, uint offset, ulong *value,
enum pci_size_t size) enum pci_size_t size)
{ {

6
drivers/pci/pci-rcar-gen3.c
View File

@ -143,7 +143,7 @@ static void rcar_rmw32(struct udevice *dev, int where, u32 mask, u32 data)
mask << shift, data << shift); mask << shift, data << shift);
} }
static u32 rcar_read_conf(struct udevice *dev, int where) static u32 rcar_read_conf(const struct udevice *dev, int where)
{ {
struct rcar_gen3_pcie_priv *priv = dev_get_platdata(dev); struct rcar_gen3_pcie_priv *priv = dev_get_platdata(dev);
int shift = 8 * (where & 3); int shift = 8 * (where & 3);
@ -151,7 +151,7 @@ static u32 rcar_read_conf(struct udevice *dev, int where)
return readl(priv->regs + (where & ~3)) >> shift; return readl(priv->regs + (where & ~3)) >> shift;
} }
static int rcar_pcie_config_access(struct udevice *udev, static int rcar_pcie_config_access(const struct udevice *udev,
unsigned char access_type, unsigned char access_type,
pci_dev_t bdf, int where, ulong *data) pci_dev_t bdf, int where, ulong *data)
{ {
@ -204,7 +204,7 @@ static int rcar_gen3_pcie_addr_valid(pci_dev_t d, uint where)
return 0; return 0;
} }
static int rcar_gen3_pcie_read_config(struct udevice *dev, pci_dev_t bdf, static int rcar_gen3_pcie_read_config(const struct udevice *dev, pci_dev_t bdf,
uint where, ulong *val, uint where, ulong *val,
enum pci_size_t size) enum pci_size_t size)
{ {

14
drivers/pci/pci-uclass.c
View File

@ -124,7 +124,7 @@ static void pci_dev_find_ofnode(struct udevice *bus, phys_addr_t bdf,
} }
}; };
int pci_bus_find_devfn(struct udevice *bus, pci_dev_t find_devfn, int pci_bus_find_devfn(const struct udevice *bus, pci_dev_t find_devfn,
struct udevice **devp) struct udevice **devp)
{ {
struct udevice *dev; struct udevice *dev;
@ -551,8 +551,9 @@ int pci_auto_config_devices(struct udevice *bus)
} }
int pci_generic_mmap_write_config( int pci_generic_mmap_write_config(
struct udevice *bus, const struct udevice *bus,
int (*addr_f)(struct udevice *bus, pci_dev_t bdf, uint offset, void **addrp), int (*addr_f)(const struct udevice *bus, pci_dev_t bdf, uint offset,
void **addrp),
pci_dev_t bdf, pci_dev_t bdf,
uint offset, uint offset,
ulong value, ulong value,
@ -579,8 +580,9 @@ int pci_generic_mmap_write_config(
} }
int pci_generic_mmap_read_config( int pci_generic_mmap_read_config(
struct udevice *bus, const struct udevice *bus,
int (*addr_f)(struct udevice *bus, pci_dev_t bdf, uint offset, void **addrp), int (*addr_f)(const struct udevice *bus, pci_dev_t bdf, uint offset,
void **addrp),
pci_dev_t bdf, pci_dev_t bdf,
uint offset, uint offset,
ulong *valuep, ulong *valuep,
@ -1054,7 +1056,7 @@ static int pci_uclass_child_post_bind(struct udevice *dev)
return 0; return 0;
} }
static int pci_bridge_read_config(struct udevice *bus, pci_dev_t bdf, static int pci_bridge_read_config(const struct udevice *bus, pci_dev_t bdf,
uint offset, ulong *valuep, uint offset, ulong *valuep,
enum pci_size_t size) enum pci_size_t size)
{ {

2
drivers/pci/pci_mpc85xx.c
View File

@ -15,7 +15,7 @@ struct mpc85xx_pci_priv {
void __iomem *cfg_data; void __iomem *cfg_data;
}; };
static int mpc85xx_pci_dm_read_config(struct udevice *dev, pci_dev_t bdf, static int mpc85xx_pci_dm_read_config(const struct udevice *dev, pci_dev_t bdf,
uint offset, ulong *value, uint offset, ulong *value,
enum pci_size_t size) enum pci_size_t size)
{ {

2
drivers/pci/pci_mvebu.c
View File

@ -136,7 +136,7 @@ static inline struct mvebu_pcie *hose_to_pcie(struct pci_controller *hose)
return container_of(hose, struct mvebu_pcie, hose); return container_of(hose, struct mvebu_pcie, hose);
} }
static int mvebu_pcie_read_config(struct udevice *bus, pci_dev_t bdf, static int mvebu_pcie_read_config(const struct udevice *bus, pci_dev_t bdf,
uint offset, ulong *valuep, uint offset, ulong *valuep,
enum pci_size_t size) enum pci_size_t size)
{ {

2
drivers/pci/pci_sandbox.c
View File

@ -39,7 +39,7 @@ static int sandbox_pci_write_config(struct udevice *bus, pci_dev_t devfn,
return ops->write_config(emul, offset, value, size); return ops->write_config(emul, offset, value, size);
} }
static int sandbox_pci_read_config(struct udevice *bus, pci_dev_t devfn, static int sandbox_pci_read_config(const struct udevice *bus, pci_dev_t devfn,
uint offset, ulong *valuep, uint offset, ulong *valuep,
enum pci_size_t size) enum pci_size_t size)
{ {

4
drivers/pci/pci_sh7751.c
View File

@ -80,12 +80,12 @@ static int sh7751_pci_addr_valid(pci_dev_t d, uint offset)
return 0; return 0;
} }
static u32 get_bus_address(struct udevice *dev, pci_dev_t bdf, u32 offset) static u32 get_bus_address(const struct udevice *dev, pci_dev_t bdf, u32 offset)
{ {
return BIT(31) | (PCI_DEV(bdf) << 8) | (offset & ~3); return BIT(31) | (PCI_DEV(bdf) << 8) | (offset & ~3);
} }
static int sh7751_pci_read_config(struct udevice *dev, pci_dev_t bdf, static int sh7751_pci_read_config(const struct udevice *dev, pci_dev_t bdf,
uint offset, ulong *value, uint offset, ulong *value,
enum pci_size_t size) enum pci_size_t size)
{ {

2
drivers/pci/pci_tegra.c
View File

@ -308,7 +308,7 @@ static int tegra_pcie_conf_address(struct tegra_pcie *pcie, pci_dev_t bdf,
} }
} }
static int pci_tegra_read_config(struct udevice *bus, pci_dev_t bdf, static int pci_tegra_read_config(const struct udevice *bus, pci_dev_t bdf,
uint offset, ulong *valuep, uint offset, ulong *valuep,
enum pci_size_t size) enum pci_size_t size)
{ {

5
drivers/pci/pci_x86.c
View File

@ -8,8 +8,9 @@
#include <pci.h> #include <pci.h>
#include <asm/pci.h> #include <asm/pci.h>
static int _pci_x86_read_config(struct udevice *bus, pci_dev_t bdf, uint offset, static int _pci_x86_read_config(const struct udevice *bus, pci_dev_t bdf,
ulong *valuep, enum pci_size_t size) uint offset, ulong *valuep,
enum pci_size_t size)
{ {
return pci_x86_read_config(bdf, offset, valuep, size); return pci_x86_read_config(bdf, offset, valuep, size);
} }

2
drivers/pci/pcie_dw_mvebu.c
View File

@ -240,7 +240,7 @@ static int pcie_dw_addr_valid(pci_dev_t d, int first_busno)
* *
* Return: 0 on success * Return: 0 on success
*/ */
static int pcie_dw_mvebu_read_config(struct udevice *bus, pci_dev_t bdf, static int pcie_dw_mvebu_read_config(const struct udevice *bus, pci_dev_t bdf,
uint offset, ulong *valuep, uint offset, ulong *valuep,
enum pci_size_t size) enum pci_size_t size)
{ {

2
drivers/pci/pcie_dw_ti.c
View File

@ -289,7 +289,7 @@ static int pcie_dw_addr_valid(pci_dev_t d, int first_busno)
* *
* Return: 0 on success * Return: 0 on success
*/ */
static int pcie_dw_ti_read_config(struct udevice *bus, pci_dev_t bdf, static int pcie_dw_ti_read_config(const struct udevice *bus, pci_dev_t bdf,
uint offset, ulong *valuep, uint offset, ulong *valuep,
enum pci_size_t size) enum pci_size_t size)
{ {

11
drivers/pci/pcie_ecam_generic.c
View File

@ -35,8 +35,9 @@ struct generic_ecam_pcie {
* code. Otherwise the address to access will be written to the pointer pointed * code. Otherwise the address to access will be written to the pointer pointed
* to by @paddress. * to by @paddress.
*/ */
static int pci_generic_ecam_conf_address(struct udevice *bus, pci_dev_t bdf, static int pci_generic_ecam_conf_address(const struct udevice *bus,
uint offset, void **paddress) pci_dev_t bdf, uint offset,
void **paddress)
{ {
struct generic_ecam_pcie *pcie = dev_get_priv(bus); struct generic_ecam_pcie *pcie = dev_get_priv(bus);
void *addr; void *addr;
@ -63,9 +64,9 @@ static int pci_generic_ecam_conf_address(struct udevice *bus, pci_dev_t bdf,
* space of the device identified by the bus, device & function numbers in @bdf * space of the device identified by the bus, device & function numbers in @bdf
* on the PCI bus @bus. * on the PCI bus @bus.
*/ */
static int pci_generic_ecam_read_config(struct udevice *bus, pci_dev_t bdf, static int pci_generic_ecam_read_config(const struct udevice *bus,
uint offset, ulong *valuep, pci_dev_t bdf, uint offset,
enum pci_size_t size) ulong *valuep, enum pci_size_t size)
{ {
return pci_generic_mmap_read_config(bus, pci_generic_ecam_conf_address, return pci_generic_mmap_read_config(bus, pci_generic_ecam_conf_address,
bdf, offset, valuep, size); bdf, offset, valuep, size);

2
drivers/pci/pcie_fsl.c
View File

@ -42,7 +42,7 @@ static int fsl_pcie_addr_valid(struct fsl_pcie *pcie, pci_dev_t bdf)
return 0; return 0;
} }
static int fsl_pcie_read_config(struct udevice *bus, pci_dev_t bdf, static int fsl_pcie_read_config(const struct udevice *bus, pci_dev_t bdf,
uint offset, ulong *valuep, uint offset, ulong *valuep,
enum pci_size_t size) enum pci_size_t size)
{ {

2
drivers/pci/pcie_imx.c
View File

@ -748,7 +748,7 @@ void pci_init_board(void)
imx_pcie_init(); imx_pcie_init();
} }
#else #else
static int imx_pcie_dm_read_config(struct udevice *dev, pci_dev_t bdf, static int imx_pcie_dm_read_config(const struct udevice *dev, pci_dev_t bdf,
uint offset, ulong *value, uint offset, ulong *value,
enum pci_size_t size) enum pci_size_t size)
{ {

4
drivers/pci/pcie_intel_fpga.c
View File

@ -226,7 +226,7 @@ static int tlp_cfg_dword_write(struct intel_fpga_pcie *pcie, pci_dev_t bdf,
return tlp_read_packet(pcie, NULL); return tlp_read_packet(pcie, NULL);
} }
int intel_fpga_rp_conf_addr(struct udevice *bus, pci_dev_t bdf, int intel_fpga_rp_conf_addr(const struct udevice *bus, pci_dev_t bdf,
uint offset, void **paddress) uint offset, void **paddress)
{ {
struct intel_fpga_pcie *pcie = dev_get_priv(bus); struct intel_fpga_pcie *pcie = dev_get_priv(bus);
@ -326,7 +326,7 @@ static int _pcie_intel_fpga_write_config(struct intel_fpga_pcie *pcie,
byte_en, data); byte_en, data);
} }
static int pcie_intel_fpga_read_config(struct udevice *bus, pci_dev_t bdf, static int pcie_intel_fpga_read_config(const struct udevice *bus, pci_dev_t bdf,
uint offset, ulong *valuep, uint offset, ulong *valuep,
enum pci_size_t size) enum pci_size_t size)
{ {

4
drivers/pci/pcie_layerscape.c
View File

@ -243,7 +243,7 @@ static int ls_pcie_addr_valid(struct ls_pcie *pcie, pci_dev_t bdf)
return 0; return 0;
} }
int ls_pcie_conf_address(struct udevice *bus, pci_dev_t bdf, int ls_pcie_conf_address(const struct udevice *bus, pci_dev_t bdf,
uint offset, void **paddress) uint offset, void **paddress)
{ {
struct ls_pcie *pcie = dev_get_priv(bus); struct ls_pcie *pcie = dev_get_priv(bus);
@ -271,7 +271,7 @@ int ls_pcie_conf_address(struct udevice *bus, pci_dev_t bdf,
return 0; return 0;
} }
static int ls_pcie_read_config(struct udevice *bus, pci_dev_t bdf, static int ls_pcie_read_config(const struct udevice *bus, pci_dev_t bdf,
uint offset, ulong *valuep, uint offset, ulong *valuep,
enum pci_size_t size) enum pci_size_t size)
{ {

2
drivers/pci/pcie_layerscape_gen4.c
View File

@ -227,7 +227,7 @@ void *ls_pcie_g4_conf_address(struct ls_pcie_g4 *pcie, pci_dev_t bdf,
return pcie->cfg + offset; return pcie->cfg + offset;
} }
static int ls_pcie_g4_read_config(struct udevice *bus, pci_dev_t bdf, static int ls_pcie_g4_read_config(const struct udevice *bus, pci_dev_t bdf,
uint offset, ulong *valuep, uint offset, ulong *valuep,
enum pci_size_t size) enum pci_size_t size)
{ {

4
drivers/pci/pcie_mediatek.c
View File

@ -66,7 +66,7 @@ struct mtk_pcie {
struct list_head ports; struct list_head ports;
}; };
static int mtk_pcie_config_address(struct udevice *udev, pci_dev_t bdf, static int mtk_pcie_config_address(const struct udevice *udev, pci_dev_t bdf,
uint offset, void **paddress) uint offset, void **paddress)
{ {
struct mtk_pcie *pcie = dev_get_priv(udev); struct mtk_pcie *pcie = dev_get_priv(udev);
@ -77,7 +77,7 @@ static int mtk_pcie_config_address(struct udevice *udev, pci_dev_t bdf,
return 0; return 0;
} }
static int mtk_pcie_read_config(struct udevice *bus, pci_dev_t bdf, static int mtk_pcie_read_config(const struct udevice *bus, pci_dev_t bdf,
uint offset, ulong *valuep, uint offset, ulong *valuep,
enum pci_size_t size) enum pci_size_t size)
{ {

7
drivers/pci/pcie_phytium.c
View File

@ -75,9 +75,8 @@ static int phytium_pci_skip_dev(pci_dev_t parent)
* code. Otherwise the address to access will be written to the pointer pointed * code. Otherwise the address to access will be written to the pointer pointed
* to by @paddress. * to by @paddress.
*/ */
static int pci_phytium_conf_address(struct udevice *bus, pci_dev_t bdf, static int pci_phytium_conf_address(const struct udevice *bus, pci_dev_t bdf,
uint offset, uint offset, void **paddress)
void **paddress)
{ {
struct phytium_pcie *pcie = dev_get_priv(bus); struct phytium_pcie *pcie = dev_get_priv(bus);
void *addr; void *addr;
@ -119,7 +118,7 @@ static int pci_phytium_conf_address(struct udevice *bus, pci_dev_t bdf,
* space of the device identified by the bus, device & function numbers in @bdf * space of the device identified by the bus, device & function numbers in @bdf
* on the PCI bus @bus. * on the PCI bus @bus.
*/ */
static int pci_phytium_read_config(struct udevice *bus, pci_dev_t bdf, static int pci_phytium_read_config(const struct udevice *bus, pci_dev_t bdf,
uint offset, ulong *valuep, uint offset, ulong *valuep,
enum pci_size_t size) enum pci_size_t size)
{ {

4
drivers/pci/pcie_xilinx.c
View File

@ -54,7 +54,7 @@ static bool pcie_xilinx_link_up(struct xilinx_pcie *pcie)
* *
* Return: 0 on success, else -ENODEV * Return: 0 on success, else -ENODEV
*/ */
static int pcie_xilinx_config_address(struct udevice *udev, pci_dev_t bdf, static int pcie_xilinx_config_address(const struct udevice *udev, pci_dev_t bdf,
uint offset, void **paddress) uint offset, void **paddress)
{ {
struct xilinx_pcie *pcie = dev_get_priv(udev); struct xilinx_pcie *pcie = dev_get_priv(udev);
@ -97,7 +97,7 @@ static int pcie_xilinx_config_address(struct udevice *udev, pci_dev_t bdf,
* *
* Return: 0 on success, else -ENODEV or -EINVAL * Return: 0 on success, else -ENODEV or -EINVAL
*/ */
static int pcie_xilinx_read_config(struct udevice *bus, pci_dev_t bdf, static int pcie_xilinx_read_config(const struct udevice *bus, pci_dev_t bdf,
uint offset, ulong *valuep, uint offset, ulong *valuep,
enum pci_size_t size) enum pci_size_t size)
{ {

2
drivers/power/acpi_pmc/pmc_emul.c
View File

@ -42,7 +42,7 @@ struct pmc_emul_priv {
u8 regs[MEMMAP_SIZE]; u8 regs[MEMMAP_SIZE];
}; };
static int sandbox_pmc_emul_read_config(struct udevice *emul, uint offset, static int sandbox_pmc_emul_read_config(const struct udevice *emul, uint offset,
ulong *valuep, enum pci_size_t size) ulong *valuep, enum pci_size_t size)
{ {
struct pmc_emul_platdata *plat = dev_get_platdata(emul); struct pmc_emul_platdata *plat = dev_get_platdata(emul);

22
include/pci.h
View File

@ -899,8 +899,8 @@ struct dm_pci_ops {
* @size: Access size * @size: Access size
* @return 0 if OK, -ve on error * @return 0 if OK, -ve on error
*/ */
int (*read_config)(struct udevice *bus, pci_dev_t bdf, uint offset, int (*read_config)(const struct udevice *bus, pci_dev_t bdf,
ulong *valuep, enum pci_size_t size); uint offset, ulong *valuep, enum pci_size_t size);
/** /**
* write_config() - Write a PCI configuration value * write_config() - Write a PCI configuration value
* *
@ -974,7 +974,7 @@ int dm_pci_bus_find_bdf(pci_dev_t bdf, struct udevice **devp);
* @devp: Returns the device for this address, if found * @devp: Returns the device for this address, if found
* @return 0 if OK, -ENODEV if not found * @return 0 if OK, -ENODEV if not found
*/ */
int pci_bus_find_devfn(struct udevice *bus, pci_dev_t find_devfn, int pci_bus_find_devfn(const struct udevice *bus, pci_dev_t find_devfn,
struct udevice **devp); struct udevice **devp);
/** /**
@ -1155,8 +1155,9 @@ int pci_read_config8(pci_dev_t pcidev, int offset, u8 *valuep);
* Return: 0 on success, else -EINVAL * Return: 0 on success, else -EINVAL
*/ */
int pci_generic_mmap_write_config( int pci_generic_mmap_write_config(
struct udevice *bus, const struct udevice *bus,
int (*addr_f)(struct udevice *bus, pci_dev_t bdf, uint offset, void **addrp), int (*addr_f)(const struct udevice *bus, pci_dev_t bdf, uint offset,
void **addrp),
pci_dev_t bdf, pci_dev_t bdf,
uint offset, uint offset,
ulong value, ulong value,
@ -1180,8 +1181,9 @@ int pci_generic_mmap_write_config(
* Return: 0 on success, else -EINVAL * Return: 0 on success, else -EINVAL
*/ */
int pci_generic_mmap_read_config( int pci_generic_mmap_read_config(
struct udevice *bus, const struct udevice *bus,
int (*addr_f)(struct udevice *bus, pci_dev_t bdf, uint offset, void **addrp), int (*addr_f)(const struct udevice *bus, pci_dev_t bdf, uint offset,
void **addrp),
pci_dev_t bdf, pci_dev_t bdf,
uint offset, uint offset,
ulong *valuep, ulong *valuep,
@ -1523,8 +1525,8 @@ struct dm_pci_emul_ops {
* @size: Access size * @size: Access size
* @return 0 if OK, -ve on error * @return 0 if OK, -ve on error
*/ */
int (*read_config)(struct udevice *dev, uint offset, ulong *valuep, int (*read_config)(const struct udevice *dev, uint offset,
enum pci_size_t size); ulong *valuep, enum pci_size_t size);
/** /**
* write_config() - Write a PCI configuration value * write_config() - Write a PCI configuration value
* *
@ -1609,7 +1611,7 @@ struct dm_pci_emul_ops {
* @emulp: Returns emulated device if found * @emulp: Returns emulated device if found
* @return 0 if found, -ENODEV if not found * @return 0 if found, -ENODEV if not found
*/ */
int sandbox_pci_get_emul(struct udevice *bus, pci_dev_t find_devfn, int sandbox_pci_get_emul(const struct udevice *bus, pci_dev_t find_devfn,
struct udevice **containerp, struct udevice **emulp); struct udevice **containerp, struct udevice **emulp);
/** /**