brain-hackers_pepepper-mirror/u-boot-brain
1
0
Fork 0
mirror of https://github.com/brain-hackers/u-boot-brain synced 2024-06-09 23:36:03 +09:00
Code Issues Projects Releases Wiki Activity

drivers/net/vsc9953: Remove 'CONFIG_' from macros' name

Browse Source 
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <yorksun@freescale.com>
This commit is contained in:
Codrin Ciubotariu 2015-07-24 16:52:44 +03:00 committed by York Sun
parent 1fb8d79339
commit c4390486a6
2 changed files with 40 additions and 40 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

38
drivers/net/vsc9953.c
View File

@ -202,26 +202,26 @@ void vsc9953_init(bd_t *bis)
VSC9953_DEVCPU_GCB);
out_le32(&l2dev_gcb->chip_regs.soft_rst,
CONFIG_VSC9953_SOFT_SWC_RST_ENA);
VSC9953_SOFT_SWC_RST_ENA);
timeout = 50000;
while ((in_le32(&l2dev_gcb->chip_regs.soft_rst) &
CONFIG_VSC9953_SOFT_SWC_RST_ENA) && --timeout)
VSC9953_SOFT_SWC_RST_ENA) && --timeout)
udelay(1); /* busy wait for vsc9953 soft reset */
if (timeout == 0)
debug("Timeout waiting for VSC9953 to reset\n");
out_le32(&l2sys_reg->sys.reset_cfg, CONFIG_VSC9953_MEM_ENABLE |
CONFIG_VSC9953_MEM_INIT);
out_le32(&l2sys_reg->sys.reset_cfg, VSC9953_MEM_ENABLE |
VSC9953_MEM_INIT);
timeout = 50000;
while ((in_le32(&l2sys_reg->sys.reset_cfg) &
CONFIG_VSC9953_MEM_INIT) && --timeout)
VSC9953_MEM_INIT) && --timeout)
udelay(1); /* busy wait for vsc9953 memory init */
if (timeout == 0)
debug("Timeout waiting for VSC9953 memory to initialize\n");
out_le32(&l2sys_reg->sys.reset_cfg, (in_le32(&l2sys_reg->sys.reset_cfg)
| CONFIG_VSC9953_CORE_ENABLE));
| VSC9953_CORE_ENABLE));
/* VSC9953 Setting to be done once only */
out_le32(&l2qsys_reg->sys.ext_cpu_cfg, 0x00000b00);
@ -233,34 +233,34 @@ void vsc9953_init(bd_t *bis)
/* Enable VSC9953 GMII Ports Port ID 0 - 7 */
if (VSC9953_INTERNAL_PORT_CHECK(i)) {
out_le32(&l2ana_reg->pfc[i].pfc_cfg,
CONFIG_VSC9953_PFC_FC_QSGMII);
VSC9953_PFC_FC_QSGMII);
out_le32(&l2sys_reg->pause_cfg.mac_fc_cfg[i],
CONFIG_VSC9953_MAC_FC_CFG_QSGMII);
VSC9953_MAC_FC_CFG_QSGMII);
} else {
out_le32(&l2ana_reg->pfc[i].pfc_cfg,
CONFIG_VSC9953_PFC_FC);
VSC9953_PFC_FC);
out_le32(&l2sys_reg->pause_cfg.mac_fc_cfg[i],
CONFIG_VSC9953_MAC_FC_CFG);
VSC9953_MAC_FC_CFG);
}
out_le32(&l2dev_gmii_reg->port_mode.clock_cfg,
CONFIG_VSC9953_CLOCK_CFG);
VSC9953_CLOCK_CFG);
out_le32(&l2dev_gmii_reg->mac_cfg_status.mac_ena_cfg,
CONFIG_VSC9953_MAC_ENA_CFG);
VSC9953_MAC_ENA_CFG);
out_le32(&l2dev_gmii_reg->mac_cfg_status.mac_mode_cfg,
CONFIG_VSC9953_MAC_MODE_CFG);
VSC9953_MAC_MODE_CFG);
out_le32(&l2dev_gmii_reg->mac_cfg_status.mac_ifg_cfg,
CONFIG_VSC9953_MAC_IFG_CFG);
VSC9953_MAC_IFG_CFG);
/* mac_hdx_cfg varies with port id*/
hdx_cfg = (CONFIG_VSC9953_MAC_HDX_CFG | (i << 16));
hdx_cfg = VSC9953_MAC_HDX_CFG | (i << 16);
out_le32(&l2dev_gmii_reg->mac_cfg_status.mac_hdx_cfg, hdx_cfg);
out_le32(&l2sys_reg->sys.front_port_mode[i],
CONFIG_VSC9953_FRONT_PORT_MODE);
VSC9953_FRONT_PORT_MODE);
out_le32(&l2qsys_reg->sys.switch_port_mode[i],
CONFIG_VSC9953_PORT_ENA);
VSC9953_PORT_ENA);
out_le32(&l2dev_gmii_reg->mac_cfg_status.mac_maxlen_cfg,
CONFIG_VSC9953_MAC_MAX_LEN);
VSC9953_MAC_MAX_LEN);
out_le32(&l2sys_reg->pause_cfg.pause_cfg[i],
CONFIG_VSC9953_PAUSE_CFG);
VSC9953_PAUSE_CFG);
/* WAIT FOR 2 us*/
udelay(2);

42
include/vsc9953.h
View File

@ -33,29 +33,29 @@
#define T1040_SWITCH_GMII_DEV_OFFSET 0x010000
#define VSC9953_PHY_REGS_OFFST 0x0000AC
#define CONFIG_VSC9953_SOFT_SWC_RST_ENA 0x00000001
#define CONFIG_VSC9953_CORE_ENABLE 0x80
#define CONFIG_VSC9953_MEM_ENABLE 0x40
#define CONFIG_VSC9953_MEM_INIT 0x20
#define VSC9953_SOFT_SWC_RST_ENA 0x00000001
#define VSC9953_CORE_ENABLE 0x80
#define VSC9953_MEM_ENABLE 0x40
#define VSC9953_MEM_INIT 0x20
#define CONFIG_VSC9953_PORT_ENA 0x00003a00
#define CONFIG_VSC9953_MAC_ENA_CFG 0x00000011
#define CONFIG_VSC9953_MAC_MODE_CFG 0x00000011
#define CONFIG_VSC9953_MAC_IFG_CFG 0x00000515
#define CONFIG_VSC9953_MAC_HDX_CFG 0x00001043
#define CONFIG_VSC9953_CLOCK_CFG 0x00000001
#define CONFIG_VSC9953_CLOCK_CFG_1000M 0x00000001
#define CONFIG_VSC9953_PFC_FC 0x00000001
#define CONFIG_VSC9953_PFC_FC_QSGMII 0x00000000
#define CONFIG_VSC9953_MAC_FC_CFG 0x04700000
#define CONFIG_VSC9953_MAC_FC_CFG_QSGMII 0x00700000
#define CONFIG_VSC9953_PAUSE_CFG 0x001ffffe
#define CONFIG_VSC9953_TOT_TAIL_DROP_LVL 0x000003ff
#define CONFIG_VSC9953_FRONT_PORT_MODE 0x00000000
#define CONFIG_VSC9953_MAC_MAX_LEN 0x000005ee
#define VSC9953_PORT_ENA 0x00003a00
#define VSC9953_MAC_ENA_CFG 0x00000011
#define VSC9953_MAC_MODE_CFG 0x00000011
#define VSC9953_MAC_IFG_CFG 0x00000515
#define VSC9953_MAC_HDX_CFG 0x00001043
#define VSC9953_CLOCK_CFG 0x00000001
#define VSC9953_CLOCK_CFG_1000M 0x00000001
#define VSC9953_PFC_FC 0x00000001
#define VSC9953_PFC_FC_QSGMII 0x00000000
#define VSC9953_MAC_FC_CFG 0x04700000
#define VSC9953_MAC_FC_CFG_QSGMII 0x00700000
#define VSC9953_PAUSE_CFG 0x001ffffe
#define VSC9953_TOT_TAIL_DROP_LVL 0x000003ff
#define VSC9953_FRONT_PORT_MODE 0x00000000
#define VSC9953_MAC_MAX_LEN 0x000005ee
#define CONFIG_VSC9953_VCAP_MV_CFG 0x0000ffff
#define CONFIG_VSC9953_VCAP_UPDATE_CTRL 0x01000004
#define VSC9953_VCAP_MV_CFG 0x0000ffff
#define VSC9953_VCAP_UPDATE_CTRL 0x01000004
#define VSC9953_MAX_PORTS 10
#define VSC9953_PORT_CHECK(port) \
(((port) < 0 || (port) >= VSC9953_MAX_PORTS) ? 0 : 1)