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https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
ARM: DTS: Resync am3517-evm.dts with Linux 4.19
Some minor changes have been made to the AM3517-evm and the underlying am3517.dtsi files. This patch re-sync's the DTS and DTSI files with Linux. Signed-off-by: Adam Ford <aford173@gmail.com>
This commit is contained in:
Adam Ford
Tom Rini
parent
44cdfc0ece
commit
c3b89468fc
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@ -127,6 +127,7 @@
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status = "okay";
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pinctrl-names = "default";
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enable-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>; /* gpio176, lcd INI */
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vcc-supply = <&vdd_io_reg>;
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port {
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lcd_in: endpoint {
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@ -154,6 +155,7 @@
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bl: backlight {
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compatible = "pwm-backlight";
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pinctrl-names = "default";
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power-supply = <&vdd_io_reg>;
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pinctrl-0 = <&backlight_pins>;
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pwms = <&pwm11 0 5000000 0>;
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brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
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@ -168,6 +170,13 @@
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ti,timers = <&timer11>;
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#pwm-cells = <3>;
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};
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/* HS USB Host PHY on PORT 1 */
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hsusb1_phy: hsusb1_phy {
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compatible = "usb-nop-xceiv";
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reset-gpios = <&gpio2 25 GPIO_ACTIVE_LOW>; /* gpio_57 */
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#phy-cells = <0>;
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};
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};
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&davinci_emac {
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@ -203,6 +212,7 @@
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reg = <0x21>;
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gpio-controller;
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#gpio-cells = <2>;
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vcc-supply = <&vdd_io_reg>;
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};
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};
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@ -220,15 +230,21 @@
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cd-gpios = <&gpio4 31 GPIO_ACTIVE_HIGH>; /* gpio_127 */
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};
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&mmc2 {
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status = "disabled";
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};
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&mmc3 {
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status = "disabled";
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};
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&usbhshost {
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port1-mode = "ehci-phy";
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};
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&usbhsehci {
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phys = <&hsusb1_phy>;
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};
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&omap3_pmx_core {
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pinctrl-names = "default";
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pinctrl-0 = <&hsusb1_rst_pins>;
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leds_pins: pinmux_leds_pins {
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pinctrl-single,pins = <
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@ -287,4 +303,32 @@
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OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
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>;
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};
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hsusb1_rst_pins: pinmux_hsusb1_rst_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x20ba, PIN_OUTPUT | MUX_MODE4) /* gpmc_ncs6.gpio_57 */
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>;
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};
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};
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&omap3_pmx_core2 {
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pinctrl-names = "default";
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pinctrl-0 = <&hsusb1_pins>;
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hsusb1_pins: pinmux_hsusb1_pins {
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pinctrl-single,pins = <
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OMAP3430_CORE2_IOPAD(0x25d8, PIN_OUTPUT | MUX_MODE3) /* etk_clk.hsusb1_stp */
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OMAP3430_CORE2_IOPAD(0x25da, PIN_OUTPUT | MUX_MODE3) /* etk_ctl.hsusb1_clk */
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OMAP3430_CORE2_IOPAD(0x25ec, PIN_INPUT | MUX_MODE3) /* etk_d8.hsusb1_dir */
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OMAP3430_CORE2_IOPAD(0x25ee, PIN_INPUT | MUX_MODE3) /* etk_d9.hsusb1_nxt */
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OMAP3430_CORE2_IOPAD(0x25dc, PIN_INPUT | MUX_MODE3) /* etk_d0.hsusb1_data0 */
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OMAP3430_CORE2_IOPAD(0x25de, PIN_INPUT | MUX_MODE3) /* etk_d1.hsusb1_data1 */
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OMAP3430_CORE2_IOPAD(0x25e0, PIN_INPUT | MUX_MODE3) /* etk_d2.hsusb1_data2 */
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OMAP3430_CORE2_IOPAD(0x25ea, PIN_INPUT | MUX_MODE3) /* etk_d7.hsusb1_data3 */
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OMAP3430_CORE2_IOPAD(0x25e4, PIN_INPUT | MUX_MODE3) /* etk_d4.hsusb1_data4 */
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OMAP3430_CORE2_IOPAD(0x25e6, PIN_INPUT | MUX_MODE3) /* etk_d5.hsusb1_data5 */
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OMAP3430_CORE2_IOPAD(0x25e8, PIN_INPUT | MUX_MODE3) /* etk_d6.hsusb1_data6 */
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OMAP3430_CORE2_IOPAD(0x25e2, PIN_INPUT | MUX_MODE3) /* etk_d3.hsusb1_data7 */
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>;
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};
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};
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@ -14,6 +14,32 @@
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cpu0-supply = <&vdd_core_reg>;
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};
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};
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wl12xx_buffer: wl12xx_buf {
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compatible = "regulator-fixed";
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regulator-name = "wl1271_buf";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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pinctrl-names = "default";
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pinctrl-0 = <&wl12xx_buffer_pins>;
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gpio = <&gpio5 1 GPIO_ACTIVE_LOW>; /* gpio 129 */
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regulator-always-on;
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vin-supply = <&vdd_1v8_reg>;
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};
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wl12xx_vmmc2: wl12xx_vmmc2 {
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compatible = "regulator-fixed";
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regulator-name = "vwl1271";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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pinctrl-names = "default";
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pinctrl-0 = <&wl12xx_wkup_pins>;
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gpio = <&gpio1 3 GPIO_ACTIVE_HIGH >; /* gpio 3 */
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startup-delay-us = <70000>;
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enable-active-high;
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regulator-always-on;
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vin-supply = <&wl12xx_buffer>;
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};
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};
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&gpmc {
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@ -64,7 +90,6 @@
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regulators {
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vdd_core_reg: VDCDC1 {
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regulator-name = "vdd_core";
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compatible = "regulator-fixed";
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regulator-always-on;
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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@ -72,7 +97,6 @@
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vdd_io_reg: VDCDC2 {
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regulator-name = "vdd_io";
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compatible = "regulator-fixed";
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regulator-always-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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@ -80,7 +104,6 @@
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vdd_1v8_reg: VDCDC3 {
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regulator-name = "vdd_1v8";
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compatible = "regulator-fixed";
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regulator-always-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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@ -88,7 +111,6 @@
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vdd_usb18_reg: LDO1 {
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regulator-name = "vdd_usb18";
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compatible = "regulator-fixed";
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regulator-always-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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@ -96,7 +118,6 @@
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vdd_usb33_reg: LDO2 {
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regulator-name = "vdd_usb33";
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compatible = "regulator-fixed";
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regulator-always-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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@ -126,8 +147,63 @@
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};
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};
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&mmc2 {
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interrupts-extended = <&intc 86 /* &omap3_pmx_core 0x12c */>;
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&mmc2_pins>;
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vmmc-supply = <&wl12xx_vmmc2>;
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non-removable;
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bus-width = <4>;
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cap-power-off-card;
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#address-cells = <1>;
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#size-cells = <0>;
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wlcore: wlcore@2 {
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compatible = "ti,wl1271";
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reg = <2>;
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interrupt-parent = <&gpio6>;
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interrupts = <10 IRQ_TYPE_LEVEL_HIGH>; /* gpio_170 */
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ref-clock-frequency = <26000000>;
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tcxo-clock-frequency = <26000000>;
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};
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart2_pins>;
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bluetooth {
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compatible = "ti,wl1271-st";
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enable-gpios = <&gpio2 24 GPIO_ACTIVE_HIGH>; /* gpio 56 */
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max-speed = <3000000>;
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};
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};
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&omap3_pmx_core {
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wl12xx_buffer_pins: pinmux_wl12xx_buffer_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x2156, PIN_OUTPUT | MUX_MODE4) /* mmc1_dat7.gpio_129 */
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>;
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};
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mmc2_pins: pinmux_mmc2_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc2_clk.mmc2_clk */
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OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc2_cmd.mmc2_cmd */
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OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc2_dat0.mmc2_dat0 */
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OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc2_dat1.mmc2_dat1 */
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OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc2_dat2.mmc2_dat2 */
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OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc2_dat3.mmc2_dat3 */
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OMAP3_CORE1_IOPAD(0x2164, PIN_OUTPUT | MUX_MODE1) /* mmc2_dat4.mmc2_dir_dat0 */
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OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE1) /* mmc2_dat5.mmc2_dir_dat1 */
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OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT | MUX_MODE1) /* mmc2_dat6.mmc2_dir_cmd */
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OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT | MUX_MODE1) /* mmc2_dat7.mmc2_clkin */
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OMAP3_CORE1_IOPAD(0x21c6, PIN_INPUT_PULLUP | MUX_MODE4) /* hdq_sio.gpio_170 */
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>;
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};
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rtc_pins: pinmux_rtc_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x20b6, PIN_INPUT_PULLUP | MUX_MODE4) /* gpmc_ncs4.gpio_55 */
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@ -139,4 +215,23 @@
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OMAP3_CORE1_IOPAD(0x20d2, PIN_INPUT | MUX_MODE4) /* gpmc_wait3.gpio_65 */
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>;
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};
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uart2_pins: pinmux_uart2_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts */
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OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT_PULLUP | MUX_MODE0) /* uart2_rts */
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OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx */
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OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx */
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OMAP3_CORE1_IOPAD(0x20b8, PIN_INPUT | MUX_MODE0) /* gpio_56 */
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>;
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};
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};
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&omap3_pmx_wkup {
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wl12xx_wkup_pins: pinmux_wl12xx_wkup_pins {
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pinctrl-single,pins = <
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OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE4) /* sys_boot1.gpio_3 */
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>;
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};
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};
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@ -91,6 +91,11 @@
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};
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};
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/* Table Table 5-79 of the TRM shows 480ab000 is reserved */
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&usb_otg_hs {
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status = "disabled";
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};
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&iva {
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status = "disabled";
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};
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