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rockchip: rk322x: add tpl support

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Move original spl to tpl, and add spl to load next stage firmware,
adapt all the address and option for them.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
Kever Yang 2019-04-02 20:41:24 +08:00
parent 5793e8c271
commit c34643e0db
6 changed files with 113 additions and 33 deletions
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26
arch/arm/mach-rockchip/Kconfig
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@ -47,14 +47,40 @@ config ROCKCHIP_RK322X
bool "Support Rockchip RK3228/RK3229"
select CPU_V7A
select SUPPORT_SPL
select SUPPORT_TPL
select SPL
select SPL_DM
select SPL_OF_LIBFDT
select TPL
select TPL_DM
select TPL_OF_LIBFDT
select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
select TPL_NEEDS_SEPARATE_STACK if TPL
select SPL_DRIVERS_MISC_SUPPORT
imply SPL_SERIAL_SUPPORT
imply TPL_SERIAL_SUPPORT
select ROCKCHIP_BROM_HELPER
select TPL_LIBCOMMON_SUPPORT
select TPL_LIBGENERIC_SUPPORT
help
The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
including NEON and GPU, Mali-400 graphics, several DDR3 options
and video codec support. Peripherals include Gigabit Ethernet,
USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
if ROCKCHIP_RK322X
config TPL_TEXT_BASE
default 0x10081000
config TPL_MAX_SIZE
default 28672
config TPL_STACK
default 0x10088000
endif
config ROCKCHIP_RK3288
bool "Support Rockchip RK3288"
select CPU_V7A

3
arch/arm/mach-rockchip/Makefile
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@ -11,10 +11,11 @@ obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o
obj-tpl-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-tpl.o
obj-tpl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-tpl.o
obj-tpl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-tpl.o
obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o
obj-spl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-spl.o
obj-spl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-spl.o
obj-spl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-spl.o spl-boot-order.o
obj-spl-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-spl.o
obj-spl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-spl.o spl-boot-order.o
obj-spl-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o spl-boot-order.o

46
arch/arm/mach-rockchip/rk322x-board-spl.c
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@ -4,55 +4,43 @@
*/
#include <common.h>
#include <debug_uart.h>
#include <dm.h>
#include <ram.h>
#include <spl.h>
#include <asm/io.h>
#include <asm/arch-rockchip/bootrom.h>
#include <asm/arch-rockchip/hardware.h>
#include <asm/arch-rockchip/timer.h>
u32 spl_boot_device(void)
{
return BOOT_DEVICE_MMC1;
}
u32 spl_boot_mode(const u32 boot_device)
{
return MMCSD_MODE_RAW;
}
#define SGRF_DDR_CON0 0x10150000
void board_init_f(ulong dummy)
{
struct udevice *dev;
int ret;
#ifdef CONFIG_DEBUG_UART
/*
* Debug UART can be used from here if required:
*
* debug_uart_init();
* printch('a');
* printhex8(0x1234);
* printascii("string");
*/
debug_uart_init();
printascii("SPL Init");
#endif
ret = spl_early_init();
if (ret) {
debug("spl_early_init() failed: %d\n", ret);
printf("spl_early_init() failed: %d\n", ret);
hang();
}
rockchip_timer_init();
printf("timer init done\n");
ret = uclass_get_device(UCLASS_RAM, 0, &dev);
if (ret) {
printf("DRAM init failed: %d\n", ret);
return;
}
preloader_console_init();
/* Disable the ddr secure region setting to make it non-secure */
rk_clrreg(SGRF_DDR_CON0, 0x4000);
#if defined(CONFIG_SPL_ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
back_to_bootrom(BROM_BOOT_NEXTSTAGE);
#endif
}
#ifdef CONFIG_SPL_LOAD_FIT
int board_fit_config_name_match(const char *name)
{
/* Just empty function now - can't decide what to choose */
debug("%s: %s\n", __func__, name);
return 0;
}
#endif

53
arch/arm/mach-rockchip/rk322x-board-tpl.c Normal file
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@ -0,0 +1,53 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2019 Rockchip Electronics Co., Ltd
*/
#include <common.h>
#include <debug_uart.h>
#include <dm.h>
#include <ram.h>
#include <spl.h>
#include <asm/io.h>
#include <asm/arch-rockchip/bootrom.h>
#include <asm/arch-rockchip/timer.h>
u32 spl_boot_device(void)
{
return BOOT_DEVICE_MMC1;
}
void board_init_f(ulong dummy)
{
struct udevice *dev;
int ret;
/*
* Debug UART can be used from here if required:
*
* debug_uart_init();
* printch('a');
* printhex8(0x1234);
* printascii("string");
*/
debug_uart_init();
printascii("TPL Init");
ret = spl_early_init();
if (ret) {
debug("spl_early_init() failed: %d\n", ret);
hang();
}
rockchip_timer_init();
printf("timer init done\n");
ret = uclass_get_device(UCLASS_RAM, 0, &dev);
if (ret) {
printf("DRAM init failed: %d\n", ret);
return;
}
#if defined(CONFIG_TPL_ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_TPL_BOARD_INIT)
back_to_bootrom(BROM_BOOT_NEXTSTAGE);
#endif
}

12
arch/arm/mach-rockchip/u-boot-tpl.lds Normal file
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@ -0,0 +1,12 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2019 Rockchip Electronic Co.,Ltd
*/
#undef CONFIG_SPL_TEXT_BASE
#define CONFIG_SPL_TEXT_BASE CONFIG_TPL_TEXT_BASE
#undef CONFIG_SPL_MAX_SIZE
#define CONFIG_SPL_MAX_SIZE CONFIG_TPL_MAX_SIZE
#include "../cpu/u-boot-spl.lds"

6
include/configs/rk322x_common.h
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@ -17,9 +17,9 @@
#define CONFIG_SYS_TIMER_BASE 0x110c00a0 /* TIMER5 */
#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
#define CONFIG_SYS_INIT_SP_ADDR 0x60100000
#define CONFIG_SYS_LOAD_ADDR 0x60800800
#define CONFIG_SPL_STACK 0x10088000
#define CONFIG_SYS_INIT_SP_ADDR 0x61100000
#define CONFIG_SYS_LOAD_ADDR 0x61800800
#define CONFIG_SPL_MAX_SIZE 0x100000
#define CONFIG_ROCKCHIP_MAX_INIT_SIZE (28 << 10)
#define CONFIG_ROCKCHIP_CHIP_TAG "RK32"