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https://github.com/brain-hackers/u-boot-brain
synced 2024-09-27 23:20:26 +09:00
sunxi: add basic V3s support
Basic U-Boot support is now present for V3s. Some memory addresses are changed specially for V3s, as the original address map cannot fit into a so small DRAM. As the DRAM controller code needs a big refactor, the SPL support is disabled in this version. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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@ -161,6 +161,7 @@ enum sunxi_gpio_number {
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#define SUN8I_GPB_UART2 2
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#define SUN8I_A33_GPB_UART0 3
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#define SUN8I_A83T_GPB_UART0 2
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#define SUN8I_V3S_GPB_UART0 3
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#define SUN50I_GPB_UART0 4
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#define SUNXI_GPC_NAND 2
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@ -114,6 +114,10 @@ static int gpio_init(void)
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sunxi_gpio_set_cfgpin(SUNXI_GPB(9), SUN8I_A83T_GPB_UART0);
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sunxi_gpio_set_cfgpin(SUNXI_GPB(10), SUN8I_A83T_GPB_UART0);
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sunxi_gpio_set_pull(SUNXI_GPB(10), SUNXI_GPIO_PULL_UP);
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#elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_MACH_SUN8I_V3S)
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sunxi_gpio_set_cfgpin(SUNXI_GPB(8), SUN8I_V3S_GPB_UART0);
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sunxi_gpio_set_cfgpin(SUNXI_GPB(9), SUN8I_V3S_GPB_UART0);
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sunxi_gpio_set_pull(SUNXI_GPB(9), SUNXI_GPIO_PULL_UP);
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#elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_MACH_SUN9I)
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sunxi_gpio_set_cfgpin(SUNXI_GPH(12), SUN9I_GPH_UART0);
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sunxi_gpio_set_cfgpin(SUNXI_GPH(13), SUN9I_GPH_UART0);
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@ -89,6 +89,8 @@ int print_cpuinfo(void)
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printf("CPU: Allwinner H3 (SUN8I %04x)\n", sunxi_get_sram_id());
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#elif defined CONFIG_MACH_SUN8I_R40
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printf("CPU: Allwinner R40 (SUN8I %04x)\n", sunxi_get_sram_id());
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#elif defined CONFIG_MACH_SUN8I_V3S
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printf("CPU: Allwinner V3s (SUN8I %04x)\n", sunxi_get_sram_id());
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#elif defined CONFIG_MACH_SUN9I
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puts("CPU: Allwinner A80 (SUN9I)\n");
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#elif defined CONFIG_MACH_SUN50I
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@ -144,6 +144,15 @@ config MACH_SUN8I_R40
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select SUNXI_GEN_SUN6I
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select SUPPORT_SPL
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config MACH_SUN8I_V3S
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bool "sun8i (Allwinner V3s)"
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select CPU_V7
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select CPU_V7_HAS_NONSEC
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select CPU_V7_HAS_VIRT
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select ARCH_SUPPORT_PSCI
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select SUNXI_GEN_SUN6I
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select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
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config MACH_SUN9I
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bool "sun9i (Allwinner A80)"
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select CPU_V7
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@ -175,6 +184,7 @@ config MACH_SUN8I
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default y if MACH_SUN8I_A83T
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default y if MACH_SUNXI_H3_H5
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default y if MACH_SUN8I_R40
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default y if MACH_SUN8I_V3S
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config RESERVE_ALLWINNER_BOOT0_HEADER
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bool "reserve space for Allwinner boot0 header"
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@ -544,6 +554,7 @@ config VIDEO
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depends on !MACH_SUN8I_A83T
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depends on !MACH_SUNXI_H3_H5
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depends on !MACH_SUN8I_R40
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depends on !MACH_SUN8I_V3S
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depends on !MACH_SUN9I
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depends on !MACH_SUN50I
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default y
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@ -21,6 +21,8 @@
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#define CONFIG_SUNXI_USB_PHYS 4
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#elif defined CONFIG_MACH_SUN8I_A83T
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#define CONFIG_SUNXI_USB_PHYS 3
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#elif defined CONFIG_MACH_SUN8I_V3S
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#define CONFIG_SUNXI_USB_PHYS 1
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#else
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#define CONFIG_SUNXI_USB_PHYS 2
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#endif
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@ -69,7 +69,12 @@
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#define SDRAM_OFFSET(x) 0x4##x
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#define CONFIG_SYS_SDRAM_BASE 0x40000000
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#define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */
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/* V3s do not have enough memory to place code at 0x4a000000 */
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#ifndef CONFIG_MACH_SUN8I_V3S
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#define CONFIG_SYS_TEXT_BASE 0x4a000000
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#else
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#define CONFIG_SYS_TEXT_BASE 0x42e00000
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#endif
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/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
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* since it needs to fit in with the other values. By also #defining it
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* we get warnings if the Kconfig value mismatches. */
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@ -146,8 +151,13 @@
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#define CONFIG_ENV_SIZE (128 << 10)
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#endif
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#ifndef CONFIG_MACH_SUN8I_V3S
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/* 64MB of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (64 << 20))
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#else
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/* 2MB of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (2 << 20))
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#endif
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/*
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* Miscellaneous configurable options
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@ -340,6 +350,7 @@ extern int soft_i2c_gpio_scl;
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* Scripts, PXE and DTBs should go afterwards, leaving the rest for the initrd.
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* Align the initrd to a 2MB page.
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*/
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#define BOOTM_SIZE __stringify(0xa000000)
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#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0080000))
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#define FDT_ADDR_R __stringify(SDRAM_OFFSET(FA00000))
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#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(FC00000))
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@ -352,16 +363,30 @@ extern int soft_i2c_gpio_scl;
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* 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
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* 1M script, 1M pxe and the ramdisk at the end.
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*/
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#ifndef CONFIG_MACH_SUN8I_V3S
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#define BOOTM_SIZE __stringify(0xa000000)
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#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000))
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#define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000))
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#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(3100000))
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#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000))
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#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3300000))
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#else
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/*
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* 64M RAM minus 2MB heap + 16MB for u-boot, stack, fb, etc.
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* 16M uncompressed kernel, 8M compressed kernel, 1M fdt,
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* 1M script, 1M pxe and the ramdisk at the end.
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*/
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#define BOOTM_SIZE __stringify(0x2e00000)
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#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(1000000))
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#define FDT_ADDR_R __stringify(SDRAM_OFFSET(1800000))
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#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(1900000))
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#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(1A00000))
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#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(1B00000))
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#endif
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#endif
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#define MEM_LAYOUT_ENV_SETTINGS \
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"bootm_size=0xa000000\0" \
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"bootm_size=" BOOTM_SIZE "\0" \
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"kernel_addr_r=" KERNEL_ADDR_R "\0" \
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"fdt_addr_r=" FDT_ADDR_R "\0" \
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"scriptaddr=" SCRIPT_ADDR_R "\0" \
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