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dm: tegra: Convert USB setup to livetree

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Adjust this code to support a live device tree. This should be implemented
as a PHY driver but that is left as an exercise for the maintainer.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
This commit is contained in:
Simon Glass 2017-07-25 08:29:59 -06:00
parent 66de3eee79
commit be7890927a
7 changed files with 101 additions and 47 deletions
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2
arch/arm/include/asm/arch-tegra/xusb-padctl.h
View File

@ -15,7 +15,7 @@ struct tegra_xusb_phy;
*/
struct tegra_xusb_phy *tegra_xusb_phy_get(unsigned int type);
void tegra_xusb_padctl_init(const void *fdt);
void tegra_xusb_padctl_init(void);
int tegra_xusb_phy_prepare(struct tegra_xusb_phy *phy);
int tegra_xusb_phy_enable(struct tegra_xusb_phy *phy);
int tegra_xusb_phy_disable(struct tegra_xusb_phy *phy);

2
arch/arm/mach-tegra/board2.c
View File

@ -166,7 +166,7 @@ int board_init(void)
pin_mux_nand();
#endif
tegra_xusb_padctl_init(gd->fdt_blob);
tegra_xusb_padctl_init();
#ifdef CONFIG_TEGRA_LP0
/* save Sdram params to PMC 2, 4, and 24 for WB0 */

36
arch/arm/mach-tegra/tegra124/xusb-padctl.c
View File

@ -8,6 +8,8 @@
#include <common.h>
#include <errno.h>
#include <dm/of_access.h>
#include <dm/ofnode.h>
#include "../xusb-padctl-common.h"
@ -317,13 +319,33 @@ static const struct tegra_xusb_padctl_soc tegra124_socdata = {
.num_phys = ARRAY_SIZE(tegra124_phys),
};
void tegra_xusb_padctl_init(const void *fdt)
void tegra_xusb_padctl_init(void)
{
int count, nodes[1];
ofnode nodes[1];
int count = 0;
int ret;
count = fdtdec_find_aliases_for_id(fdt, "padctl",
COMPAT_NVIDIA_TEGRA124_XUSB_PADCTL,
nodes, ARRAY_SIZE(nodes));
if (tegra_xusb_process_nodes(fdt, nodes, count, &tegra124_socdata))
return;
debug("%s: start\n", __func__);
if (of_live_active()) {
struct device_node *np = of_find_compatible_node(NULL, NULL,
"nvidia,tegra124-xusb-padctl");
debug("np=%p\n", np);
if (np) {
nodes[0] = np_to_ofnode(np);
count = 1;
}
} else {
int node_offsets[1];
int i;
count = fdtdec_find_aliases_for_id(gd->fdt_blob, "padctl",
COMPAT_NVIDIA_TEGRA124_XUSB_PADCTL,
node_offsets, ARRAY_SIZE(node_offsets));
for (i = 0; i < count; i++)
nodes[i] = offset_to_ofnode(node_offsets[i]);
}
ret = tegra_xusb_process_nodes(nodes, count, &tegra124_socdata);
debug("%s: done, ret=%d\n", __func__, ret);
}

38
arch/arm/mach-tegra/tegra210/xusb-padctl.c
View File

@ -8,6 +8,8 @@
#include <common.h>
#include <errno.h>
#include <dm/of_access.h>
#include <dm/ofnode.h>
#include "../xusb-padctl-common.h"
@ -15,6 +17,8 @@
#include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
DECLARE_GLOBAL_DATA_PTR;
enum tegra210_function {
TEGRA210_FUNC_SNPS,
TEGRA210_FUNC_XUSB,
@ -421,17 +425,33 @@ static const struct tegra_xusb_padctl_soc tegra210_socdata = {
.num_phys = ARRAY_SIZE(tegra210_phys),
};
void tegra_xusb_padctl_init(const void *fdt)
void tegra_xusb_padctl_init(void)
{
int count, nodes[1];
ofnode nodes[1];
int count = 0;
int ret;
debug("> %s(fdt=%p)\n", __func__, fdt);
debug("%s: start\n", __func__);
if (of_live_active()) {
struct device_node *np = of_find_compatible_node(NULL, NULL,
"nvidia,tegra210-xusb-padctl");
count = fdtdec_find_aliases_for_id(fdt, "padctl",
COMPAT_NVIDIA_TEGRA210_XUSB_PADCTL,
nodes, ARRAY_SIZE(nodes));
if (tegra_xusb_process_nodes(fdt, nodes, count, &tegra210_socdata))
return;
debug("np=%p\n", np);
if (np) {
nodes[0] = np_to_ofnode(np);
count = 1;
}
} else {
int node_offsets[1];
int i;
debug("< %s()\n", __func__);
count = fdtdec_find_aliases_for_id(gd->fdt_blob, "padctl",
COMPAT_NVIDIA_TEGRA210_XUSB_PADCTL,
node_offsets, ARRAY_SIZE(node_offsets));
for (i = 0; i < count; i++)
nodes[i] = offset_to_ofnode(node_offsets[i]);
}
ret = tegra_xusb_process_nodes(nodes, count, &tegra210_socdata);
debug("%s: done, ret=%d\n", __func__, ret);
}

60
arch/arm/mach-tegra/xusb-padctl-common.c
View File

@ -75,14 +75,14 @@ tegra_xusb_padctl_find_lane(struct tegra_xusb_padctl *padctl, const char *name)
static int
tegra_xusb_padctl_group_parse_dt(struct tegra_xusb_padctl *padctl,
struct tegra_xusb_padctl_group *group,
const void *fdt, int node)
ofnode node)
{
unsigned int i;
int len;
int len, ret;
group->name = fdt_get_name(fdt, node, &len);
group->name = ofnode_get_name(node);
len = fdt_stringlist_count(fdt, node, "nvidia,lanes");
len = ofnode_read_string_count(node, "nvidia,lanes");
if (len < 0) {
error("failed to parse \"nvidia,lanes\" property");
return -EINVAL;
@ -91,9 +91,9 @@ tegra_xusb_padctl_group_parse_dt(struct tegra_xusb_padctl *padctl,
group->num_pins = len;
for (i = 0; i < group->num_pins; i++) {
group->pins[i] = fdt_stringlist_get(fdt, node, "nvidia,lanes",
i, NULL);
if (!group->pins[i]) {
ret = ofnode_read_string_index(node, "nvidia,lanes", i,
&group->pins[i]);
if (ret) {
error("failed to read string from \"nvidia,lanes\" property");
return -EINVAL;
}
@ -101,13 +101,14 @@ tegra_xusb_padctl_group_parse_dt(struct tegra_xusb_padctl *padctl,
group->num_pins = len;
group->func = fdt_stringlist_get(fdt, node, "nvidia,function", 0, NULL);
if (!group->func) {
ret = ofnode_read_string_index(node, "nvidia,function", 0,
&group->func);
if (ret) {
error("failed to parse \"nvidia,func\" property");
return -EINVAL;
}
group->iddq = fdtdec_get_int(fdt, node, "nvidia,iddq", -1);
group->iddq = ofnode_read_u32_default(node, "nvidia,iddq", -1);
return 0;
}
@ -217,20 +218,21 @@ tegra_xusb_padctl_config_apply(struct tegra_xusb_padctl *padctl,
static int
tegra_xusb_padctl_config_parse_dt(struct tegra_xusb_padctl *padctl,
struct tegra_xusb_padctl_config *config,
const void *fdt, int node)
ofnode node)
{
int subnode;
ofnode subnode;
config->name = fdt_get_name(fdt, node, NULL);
config->name = ofnode_get_name(node);
fdt_for_each_subnode(subnode, fdt, node) {
for (subnode = ofnode_first_subnode(node);
ofnode_valid(subnode);
subnode = ofnode_next_subnode(subnode)) {
struct tegra_xusb_padctl_group *group;
int err;
group = &config->groups[config->num_groups];
err = tegra_xusb_padctl_group_parse_dt(padctl, group, fdt,
subnode);
err = tegra_xusb_padctl_group_parse_dt(padctl, group, subnode);
if (err < 0) {
error("failed to parse group %s", group->name);
return err;
@ -243,20 +245,24 @@ tegra_xusb_padctl_config_parse_dt(struct tegra_xusb_padctl *padctl,
}
static int tegra_xusb_padctl_parse_dt(struct tegra_xusb_padctl *padctl,
const void *fdt, int node)
ofnode node)
{
int subnode, err;
ofnode subnode;
int err;
err = fdt_get_resource(fdt, node, "reg", 0, &padctl->regs);
err = ofnode_read_resource(node, 0, &padctl->regs);
if (err < 0) {
error("registers not found");
return err;
}
fdt_for_each_subnode(subnode, fdt, node) {
for (subnode = ofnode_first_subnode(node);
ofnode_valid(subnode);
subnode = ofnode_next_subnode(subnode)) {
struct tegra_xusb_padctl_config *config = &padctl->config;
err = tegra_xusb_padctl_config_parse_dt(padctl, config, fdt,
debug("%s: subnode=%s\n", __func__, ofnode_get_name(subnode));
err = tegra_xusb_padctl_config_parse_dt(padctl, config,
subnode);
if (err < 0) {
error("failed to parse entry %s: %d",
@ -264,25 +270,28 @@ static int tegra_xusb_padctl_parse_dt(struct tegra_xusb_padctl *padctl,
continue;
}
}
debug("%s: done\n", __func__);
return 0;
}
struct tegra_xusb_padctl padctl;
int tegra_xusb_process_nodes(const void *fdt, int nodes[], unsigned int count,
const struct tegra_xusb_padctl_soc *socdata)
int tegra_xusb_process_nodes(ofnode nodes[], unsigned int count,
const struct tegra_xusb_padctl_soc *socdata)
{
unsigned int i;
int err;
debug("%s: count=%d\n", __func__, count);
for (i = 0; i < count; i++) {
if (!fdtdec_get_is_enabled(fdt, nodes[i]))
debug("%s: i=%d, node=%p\n", __func__, i, nodes[i].np);
if (!ofnode_is_available(nodes[i]))
continue;
padctl.socdata = socdata;
err = tegra_xusb_padctl_parse_dt(&padctl, fdt, nodes[i]);
err = tegra_xusb_padctl_parse_dt(&padctl, nodes[i]);
if (err < 0) {
error("failed to parse DT: %d", err);
continue;
@ -300,6 +309,7 @@ int tegra_xusb_process_nodes(const void *fdt, int nodes[], unsigned int count,
/* only a single instance is supported */
break;
}
debug("%s: done\n", __func__);
return 0;
}

8
arch/arm/mach-tegra/xusb-padctl-common.h
View File

@ -9,9 +9,11 @@
#include <common.h>
#include <fdtdec.h>
#include <dm/ofnode.h>
#include <asm/io.h>
#include <asm/arch-tegra/xusb-padctl.h>
#include <linux/ioport.h>
struct tegra_xusb_padctl_lane {
const char *name;
@ -77,7 +79,7 @@ struct tegra_xusb_padctl_config {
struct tegra_xusb_padctl {
const struct tegra_xusb_padctl_soc *socdata;
struct tegra_xusb_padctl_config config;
struct fdt_resource regs;
struct resource regs;
unsigned int enable;
};
@ -95,7 +97,7 @@ static inline void padctl_writel(struct tegra_xusb_padctl *padctl,
writel(value, padctl->regs.start + offset);
}
int tegra_xusb_process_nodes(const void *fdt, int nodes[], unsigned int count,
const struct tegra_xusb_padctl_soc *socdata);
int tegra_xusb_process_nodes(ofnode nodes[], unsigned int count,
const struct tegra_xusb_padctl_soc *socdata);
#endif

2
arch/arm/mach-tegra/xusb-padctl-dummy.c
View File

@ -34,6 +34,6 @@ int __weak tegra_xusb_phy_unprepare(struct tegra_xusb_phy *phy)
return -ENOSYS;
}
void __weak tegra_xusb_padctl_init(const void *fdt)
void __weak tegra_xusb_padctl_init(void)
{
}