Merge branch 'master' of git://git.denx.de/u-boot-sh

This commit is contained in:
Tom Rini 2014-11-17 08:43:40 -05:00
commit bdf790fabc
41 changed files with 93 additions and 107 deletions

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@ -1,77 +1,129 @@
menu "SuperH architecture" menu "SuperH architecture"
depends on SH depends on SH
config SYS_ARCH config CPU_SH2
default "sh" bool
config CPU_SH2A
bool
select CPU_SH2
config CPU_SH3
bool
config CPU_SH4
bool
config CPU_SH4A
bool
select CPU_SH4
config SH_32BIT
bool "32bit mode"
depends on CPU_SH4A
default n
help
SH4A has 2 physical memory maps. This use 32bit mode.
And this is board specific. Please check your board if you
want to use this.
choice choice
prompt "Target select" prompt "Target select"
config TARGET_RSK7203 config TARGET_RSK7203
bool "Support rsk7203" bool "RSK+ 7203"
select CPU_SH2A
config TARGET_RSK7264 config TARGET_RSK7264
bool "Support rsk7264" bool "RSK2+SH7264"
select CPU_SH2A
config TARGET_RSK7269 config TARGET_RSK7269
bool "Support rsk7269" bool "RSK2+SH7269"
select CPU_SH2A
config TARGET_MPR2 config TARGET_MPR2
bool "Support mpr2" bool "Magic Panel Release 2 board"
select CPU_SH3
config TARGET_MS7720SE config TARGET_MS7720SE
bool "Support ms7720se" bool "Support ms7720se"
select CPU_SH3
config TARGET_SHMIN config TARGET_SHMIN
bool "Support shmin" bool "SHMIN"
select CPU_SH3
config TARGET_ESPT config TARGET_ESPT
bool "Support espt" bool "Data Technology ESPT-GIGA board"
select CPU_SH4
config TARGET_MS7722SE config TARGET_MS7722SE
bool "Support ms7722se" bool "SolutionEngine 7722"
select CPU_SH4
config TARGET_MS7750SE config TARGET_MS7750SE
bool "Support ms7750se" bool "SolutionEngine 7750"
select CPU_SH4
config TARGET_AP_SH4A_4A config TARGET_AP_SH4A_4A
bool "Support ap_sh4a_4a" bool "ALPHAPROJECT AP-SH4A-4A"
select CPU_SH4A
config TARGET_AP325RXA config TARGET_AP325RXA
bool "Support ap325rxa" bool "Renesas AP-325RXA"
select CPU_SH4
config TARGET_ECOVEC config TARGET_ECOVEC
bool "Support ecovec" bool "EcoVec"
select CPU_SH4A
config TARGET_MIGOR config TARGET_MIGOR
bool "Support MigoR" bool "Migo-R"
select CPU_SH4
config TARGET_R0P7734 config TARGET_R0P7734
bool "Support r0p7734" bool "Support r0p7734"
select CPU_SH4A
config TARGET_R2DPLUS config TARGET_R2DPLUS
bool "Support r2dplus" bool "Renesas R2D-PLUS"
select CPU_SH4
config TARGET_R7780MP config TARGET_R7780MP
bool "Support r7780mp" bool "R7780MP board"
select CPU_SH4A
config TARGET_SH7752EVB config TARGET_SH7752EVB
bool "Support sh7752evb" bool "SH7752EVB"
select CPU_SH4A
config TARGET_SH7753EVB config TARGET_SH7753EVB
bool "Support sh7753evb" bool "SH7753EVB"
select CPU_SH4
config TARGET_SH7757LCR config TARGET_SH7757LCR
bool "Support sh7757lcr" bool "SH7757LCR"
select CPU_SH4A
config TARGET_SH7763RDP config TARGET_SH7763RDP
bool "Support sh7763rdp" bool "SH7763RDP"
select CPU_SH4
config TARGET_SH7785LCR config TARGET_SH7785LCR
bool "Support sh7785lcr" bool "SH7785LCR"
select CPU_SH4A
endchoice endchoice
config SYS_ARCH
default "sh"
config SYS_CPU
default "sh2" if CPU_SH2
default "sh3" if CPU_SH3
default "sh4" if CPU_SH4
source "board/alphaproject/ap_sh4a_4a/Kconfig" source "board/alphaproject/ap_sh4a_4a/Kconfig"
source "board/espt/Kconfig" source "board/espt/Kconfig"
source "board/mpr2/Kconfig" source "board/mpr2/Kconfig"

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@ -7,11 +7,11 @@
# #
ENDIANNESS += -EB ENDIANNESS += -EB
ifdef CONFIG_SH2A ifdef CONFIG_CPU_SH2A
PLATFORM_CPPFLAGS += -m2a -m2a-nofpu -mb PLATFORM_CPPFLAGS += -m2a -m2a-nofpu -mb
else # SH2 else # SH2
PLATFORM_CPPFLAGS += -m3e -mb PLATFORM_CPPFLAGS += -m3e -mb
endif endif
PLATFORM_CPPFLAGS += -DCONFIG_SH2 $(call cc-option,-mno-fdpic) PLATFORM_CPPFLAGS += $(call cc-option,-mno-fdpic)
PLATFORM_LDFLAGS += $(ENDIANNESS) PLATFORM_LDFLAGS += $(ENDIANNESS)

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@ -11,4 +11,4 @@
# SPDX-License-Identifier: GPL-2.0+ # SPDX-License-Identifier: GPL-2.0+
# #
# #
PLATFORM_CPPFLAGS += -DCONFIG_SH3 -m3 PLATFORM_CPPFLAGS += -m3

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@ -8,4 +8,4 @@
# SPDX-License-Identifier: GPL-2.0+ # SPDX-License-Identifier: GPL-2.0+
# #
# #
PLATFORM_CPPFLAGS += -DCONFIG_SH4 -m4-nofpu PLATFORM_CPPFLAGS += -m4-nofpu

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@ -1,7 +1,7 @@
#ifndef __ASM_SH_CACHE_H #ifndef __ASM_SH_CACHE_H
#define __ASM_SH_CACHE_H #define __ASM_SH_CACHE_H
#if defined(CONFIG_SH4) #if defined(CONFIG_CPU_SH4)
int cache_control(unsigned int cmd); int cache_control(unsigned int cmd);
@ -18,7 +18,7 @@ struct __large_struct { unsigned long buf[100]; };
*/ */
#define ARCH_DMA_MINALIGN 32 #define ARCH_DMA_MINALIGN 32
#endif /* CONFIG_SH4 */ #endif /* CONFIG_CPU_SH4 */
/* /*
* Use the L1 data cache line size value for the minimum DMA buffer alignment * Use the L1 data cache line size value for the minimum DMA buffer alignment

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@ -1,10 +1,10 @@
#ifndef _ASM_SH_PROCESSOR_H_ #ifndef _ASM_SH_PROCESSOR_H_
#define _ASM_SH_PROCESSOR_H_ #define _ASM_SH_PROCESSOR_H_
#if defined(CONFIG_SH2) #if defined(CONFIG_CPU_SH2)
# include <asm/cpu_sh2.h> # include <asm/cpu_sh2.h>
#elif defined(CONFIG_SH3) #elif defined(CONFIG_CPU_SH3)
# include <asm/cpu_sh3.h> # include <asm/cpu_sh3.h>
#elif defined(CONFIG_SH4) #elif defined(CONFIG_CPU_SH4)
# include <asm/cpu_sh4.h> # include <asm/cpu_sh4.h>
#endif #endif
#endif #endif

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@ -8,7 +8,7 @@
obj-y += board.o obj-y += board.o
obj-$(CONFIG_CMD_BOOTM) += bootm.o obj-$(CONFIG_CMD_BOOTM) += bootm.o
ifeq ($(CONFIG_SH2),y) ifeq ($(CONFIG_CPU_SH2),y)
obj-y += time_sh2.o obj-y += time_sh2.o
else else
obj-y += time.o obj-y += time.o

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@ -1,8 +1,5 @@
if TARGET_AP_SH4A_4A if TARGET_AP_SH4A_4A
config SYS_CPU
default "sh4"
config SYS_BOARD config SYS_BOARD
default "ap_sh4a_4a" default "ap_sh4a_4a"

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@ -1,8 +1,5 @@
if TARGET_ESPT if TARGET_ESPT
config SYS_CPU
default "sh4"
config SYS_BOARD config SYS_BOARD
default "espt" default "espt"

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@ -1,8 +1,5 @@
if TARGET_MPR2 if TARGET_MPR2
config SYS_CPU
default "sh3"
config SYS_BOARD config SYS_BOARD
default "mpr2" default "mpr2"

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@ -1,8 +1,5 @@
if TARGET_MS7720SE if TARGET_MS7720SE
config SYS_CPU
default "sh3"
config SYS_BOARD config SYS_BOARD
default "ms7720se" default "ms7720se"

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@ -1,8 +1,5 @@
if TARGET_MS7722SE if TARGET_MS7722SE
config SYS_CPU
default "sh4"
config SYS_BOARD config SYS_BOARD
default "ms7722se" default "ms7722se"

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@ -1,8 +1,5 @@
if TARGET_MS7750SE if TARGET_MS7750SE
config SYS_CPU
default "sh4"
config SYS_BOARD config SYS_BOARD
default "ms7750se" default "ms7750se"

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@ -1,8 +1,5 @@
if TARGET_MIGOR if TARGET_MIGOR
config SYS_CPU
default "sh4"
config SYS_BOARD config SYS_BOARD
default "MigoR" default "MigoR"

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@ -1,8 +1,5 @@
if TARGET_AP325RXA if TARGET_AP325RXA
config SYS_CPU
default "sh4"
config SYS_BOARD config SYS_BOARD
default "ap325rxa" default "ap325rxa"

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@ -1,8 +1,5 @@
if TARGET_ECOVEC if TARGET_ECOVEC
config SYS_CPU
default "sh4"
config SYS_BOARD config SYS_BOARD
default "ecovec" default "ecovec"

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@ -41,7 +41,7 @@ static void debug_led(u8 led)
int board_late_init(void) int board_late_init(void)
{ {
u8 mac[6]; u8 mac[6];
char env_mac[17]; char env_mac[18];
udelay(1000); udelay(1000);

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@ -1,8 +1,5 @@
if TARGET_R0P7734 if TARGET_R0P7734
config SYS_CPU
default "sh4"
config SYS_BOARD config SYS_BOARD
default "r0p7734" default "r0p7734"

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@ -1,8 +1,5 @@
if TARGET_R2DPLUS if TARGET_R2DPLUS
config SYS_CPU
default "sh4"
config SYS_BOARD config SYS_BOARD
default "r2dplus" default "r2dplus"

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@ -1,8 +1,5 @@
if TARGET_R7780MP if TARGET_R7780MP
config SYS_CPU
default "sh4"
config SYS_BOARD config SYS_BOARD
default "r7780mp" default "r7780mp"

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@ -1,8 +1,5 @@
if TARGET_RSK7203 if TARGET_RSK7203
config SYS_CPU
default "sh2"
config SYS_BOARD config SYS_BOARD
default "rsk7203" default "rsk7203"

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@ -1,8 +1,5 @@
if TARGET_RSK7264 if TARGET_RSK7264
config SYS_CPU
default "sh2"
config SYS_BOARD config SYS_BOARD
default "rsk7264" default "rsk7264"

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@ -1,8 +1,5 @@
if TARGET_RSK7269 if TARGET_RSK7269
config SYS_CPU
default "sh2"
config SYS_BOARD config SYS_BOARD
default "rsk7269" default "rsk7269"

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@ -1,8 +1,5 @@
if TARGET_SH7752EVB if TARGET_SH7752EVB
config SYS_CPU
default "sh4"
config SYS_BOARD config SYS_BOARD
default "sh7752evb" default "sh7752evb"

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@ -1,8 +1,5 @@
if TARGET_SH7753EVB if TARGET_SH7753EVB
config SYS_CPU
default "sh4"
config SYS_BOARD config SYS_BOARD
default "sh7753evb" default "sh7753evb"

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@ -1,8 +1,5 @@
if TARGET_SH7757LCR if TARGET_SH7757LCR
config SYS_CPU
default "sh4"
config SYS_BOARD config SYS_BOARD
default "sh7757lcr" default "sh7757lcr"

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@ -1,8 +1,5 @@
if TARGET_SH7763RDP if TARGET_SH7763RDP
config SYS_CPU
default "sh4"
config SYS_BOARD config SYS_BOARD
default "sh7763rdp" default "sh7763rdp"

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@ -1,8 +1,5 @@
if TARGET_SH7785LCR if TARGET_SH7785LCR
config SYS_CPU
default "sh4"
config SYS_BOARD config SYS_BOARD
default "sh7785lcr" default "sh7785lcr"

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@ -1,8 +1,5 @@
if TARGET_SHMIN if TARGET_SHMIN
config SYS_CPU
default "sh3"
config SYS_BOARD config SYS_BOARD
default "shmin" default "shmin"

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@ -1,2 +1,3 @@
CONFIG_SH=y CONFIG_SH=y
CONFIG_SH_32BIT=y
CONFIG_TARGET_SH7752EVB=y CONFIG_TARGET_SH7752EVB=y

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@ -1,2 +1,3 @@
CONFIG_SH=y CONFIG_SH=y
CONFIG_SH_32BIT=y
CONFIG_TARGET_SH7753EVB=y CONFIG_TARGET_SH7753EVB=y

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@ -1,2 +1,3 @@
CONFIG_SH=y CONFIG_SH=y
CONFIG_SH_32BIT=y
CONFIG_TARGET_SH7757LCR=y CONFIG_TARGET_SH7757LCR=y

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@ -1,3 +1,3 @@
CONFIG_SYS_EXTRA_OPTIONS="SH_32BIT=1"
CONFIG_SH=y CONFIG_SH=y
CONFIG_SH_32BIT=y
CONFIG_TARGET_SH7785LCR=y CONFIG_TARGET_SH7785LCR=y

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@ -433,7 +433,7 @@ static inline void sci_##name##_out(struct uart_port *port,\
SCI_OUT(sci_size, sci_offset, value);\ SCI_OUT(sci_size, sci_offset, value);\
} }
#if defined(CONFIG_SH3) || \ #if defined(CONFIG_CPU_SH3) || \
defined(CONFIG_ARCH_SH7367) || \ defined(CONFIG_ARCH_SH7367) || \
defined(CONFIG_ARCH_SH7377) || \ defined(CONFIG_ARCH_SH7377) || \
defined(CONFIG_ARCH_SH7372) || \ defined(CONFIG_ARCH_SH7372) || \

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@ -11,7 +11,6 @@
#define __RSK7203_H #define __RSK7203_H
#undef DEBUG #undef DEBUG
#define CONFIG_SH2A 1
#define CONFIG_CPU_SH7203 1 #define CONFIG_CPU_SH7203 1
#define CONFIG_RSK7203 1 #define CONFIG_RSK7203 1

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@ -12,7 +12,6 @@
#define __RSK7264_H #define __RSK7264_H
#undef DEBUG #undef DEBUG
#define CONFIG_SH2A 1
#define CONFIG_CPU_SH7264 1 #define CONFIG_CPU_SH7264 1
#define CONFIG_RSK7264 1 #define CONFIG_RSK7264 1

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@ -11,7 +11,6 @@
#define __RSK7269_H #define __RSK7269_H
#undef DEBUG #undef DEBUG
#define CONFIG_SH2A 1
#define CONFIG_CPU_SH7269 1 #define CONFIG_CPU_SH7269 1
#define CONFIG_RSK7269 1 #define CONFIG_RSK7269 1

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@ -10,7 +10,6 @@
#define __SH7752EVB_H #define __SH7752EVB_H
#undef DEBUG #undef DEBUG
#define CONFIG_SH_32BIT 1
#define CONFIG_CPU_SH7752 1 #define CONFIG_CPU_SH7752 1
#define CONFIG_SH7752EVB 1 #define CONFIG_SH7752EVB 1

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@ -10,7 +10,6 @@
#define __SH7753EVB_H #define __SH7753EVB_H
#undef DEBUG #undef DEBUG
#define CONFIG_SH_32BIT 1
#define CONFIG_CPU_SH7753 1 #define CONFIG_CPU_SH7753 1
#define CONFIG_SH7753EVB 1 #define CONFIG_SH7753EVB 1

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@ -10,7 +10,6 @@
#define __SH7757LCR_H #define __SH7757LCR_H
#undef DEBUG #undef DEBUG
#define CONFIG_SH_32BIT 1
#define CONFIG_CPU_SH7757 1 #define CONFIG_CPU_SH7757 1
#define CONFIG_SH7757LCR 1 #define CONFIG_SH7757LCR 1
#define CONFIG_SH7757LCR_DDR_ECC 1 #define CONFIG_SH7757LCR_DDR_ECC 1

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@ -25,7 +25,7 @@
#include <asm/types.h> #include <asm/types.h>
#if defined(CONFIG_SH3) #if defined(CONFIG_CPU_SH3)
struct tmu_regs { struct tmu_regs {
u8 tocr; u8 tocr;
u8 reserved0; u8 reserved0;
@ -45,9 +45,9 @@ struct tmu_regs {
u16 reserved4; u16 reserved4;
u32 tcpr2; u32 tcpr2;
}; };
#endif /* CONFIG_SH3 */ #endif /* CONFIG_CPU_SH3 */
#if defined(CONFIG_SH4) || defined(CONFIG_RMOBILE) #if defined(CONFIG_CPU_SH4) || defined(CONFIG_RMOBILE)
struct tmu_regs { struct tmu_regs {
u32 reserved; u32 reserved;
u8 tstr; u8 tstr;
@ -65,7 +65,7 @@ struct tmu_regs {
u16 tcr2; u16 tcr2;
u16 reserved5; u16 reserved5;
}; };
#endif /* CONFIG_SH4 */ #endif /* CONFIG_CPU_SH4 */
static inline unsigned long get_tmu0_clk_rate(void) static inline unsigned long get_tmu0_clk_rate(void)
{ {