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https://github.com/brain-hackers/u-boot-brain
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ppc4xx: Fix compilation warnings and coding style issues in HCU4/HCU5
Signed-off-by: Stefan Roese <sr@denx.de>
This commit is contained in:
parent
055606bd25
commit
ba52be3d0e
@ -27,11 +27,11 @@ vpath hcu_flash.c ../common
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vpath nm_bsp.c ../common
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vpath nm_bsp.c ../common
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# NOBJS : Netstal common objects
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# NOBJS : Netstal common objects
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NOBJS = fixed_sdram.o hcu_flash.o nm_bsp.o
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NOBJS = ../common/fixed_sdram.o ../common/hcu_flash.o ../common/nm_bsp.o
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COBJS = $(BOARD).o
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COBJS = $(BOARD).o
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SOBJS =
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SOBJS =
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) ../common/$(NOBJS:.o=.c)
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) $(NOBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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OBJS := $(addprefix $(obj),$(COBJS))
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NOBJS := $(addprefix $(obj),$(NOBJS))
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NOBJS := $(addprefix $(obj),$(NOBJS))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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@ -37,6 +37,7 @@ DECLARE_GLOBAL_DATA_PTR;
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#if defined(DEBUG)
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#if defined(DEBUG)
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void show_sdram_registers(void);
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void show_sdram_registers(void);
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#endif
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#endif
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long int fixed_hcu4_sdram (unsigned int dram_size);
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/*
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/*
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* This function is run very early, out of flash, and before devices are
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* This function is run very early, out of flash, and before devices are
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@ -26,11 +26,11 @@ vpath hcu_flash.c ../common
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vpath nm_bsp.c ../common
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vpath nm_bsp.c ../common
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# NOBJS : Netstal common objects
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# NOBJS : Netstal common objects
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NOBJS = hcu_flash.o nm_bsp.o
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NOBJS = ../common/hcu_flash.o ../common/nm_bsp.o
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COBJS = $(BOARD).o sdram.o
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COBJS = $(BOARD).o sdram.o
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SOBJS = init.o
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SOBJS = init.o
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) ../common/$(NOBJS:.o=.c)
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) $(NOBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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OBJS := $(addprefix $(obj),$(COBJS))
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NOBJS := $(addprefix $(obj),$(NOBJS))
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NOBJS := $(addprefix $(obj),$(NOBJS))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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@ -497,9 +497,6 @@ int post_hotkeys_pressed(void)
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#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
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#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
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void ft_board_setup(void *blob, bd_t *bd)
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void ft_board_setup(void *blob, bd_t *bd)
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{
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{
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u32 val[4];
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int rc;
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ft_cpu_setup(blob, bd);
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ft_cpu_setup(blob, bd);
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}
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}
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@ -62,6 +62,11 @@ void dflush(void);
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#define DDR0_22_CTRL_RAW_ECC_ENABLE 0x03000000 /* ECC correcting on */
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#define DDR0_22_CTRL_RAW_ECC_ENABLE 0x03000000 /* ECC correcting on */
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#define DDR0_03_CASLAT_DECODE(n) ((((unsigned long)(n))>>16)&0x7)
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#define DDR0_03_CASLAT_DECODE(n) ((((unsigned long)(n))>>16)&0x7)
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#define ECC_RAM 0x03267F0B
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#define NO_ECC_RAM 0x00267F0B
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#define HCU_HW_SDRAM_CONFIG_MASK 0x7
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#define MY_TLB_WORD2_I_ENABLE TLB_WORD2_I_ENABLE
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#define MY_TLB_WORD2_I_ENABLE TLB_WORD2_I_ENABLE
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/* disable caching on DDR2 */
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/* disable caching on DDR2 */
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@ -71,6 +76,7 @@ void board_add_ram_info(int use_default)
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{
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{
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PPC4xx_SYS_INFO board_cfg;
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PPC4xx_SYS_INFO board_cfg;
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u32 val;
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u32 val;
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mfsdram(DDR0_22, val);
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mfsdram(DDR0_22, val);
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val &= DDR0_22_CTRL_RAW_MASK;
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val &= DDR0_22_CTRL_RAW_MASK;
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switch (val) {
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switch (val) {
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@ -163,18 +169,17 @@ static void program_ecc(unsigned long start_address, unsigned long num_bytes)
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/* Check whether vxWorks is using EDR logging, if yes zero */
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/* Check whether vxWorks is using EDR logging, if yes zero */
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/* also PostMortem and user reserved memory */
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/* also PostMortem and user reserved memory */
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magic= in_be32(start_address + num_bytes -
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magic = (u32 *)in_be32((u32 *)(start_address + num_bytes -
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(CONFIG_PRAM*1024) + sizeof(u32));
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(CONFIG_PRAM*1024) + sizeof(u32)));
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debug("\n%s: CONFIG_PRAM %d kB magic 0x%x 0x%p -> 0x%x\n", __FUNCTION__,
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debug("\n%s: CONFIG_PRAM %d kB magic 0x%x 0x%p -> 0x%x\n", __FUNCTION__,
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CONFIG_PRAM,
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CONFIG_PRAM,
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start_address + num_bytes - (CONFIG_PRAM*1024) + sizeof(u32),
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start_address + num_bytes - (CONFIG_PRAM*1024) + sizeof(u32),
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magic, in_be32(magic));
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magic, in_be32(magic));
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if (in_be32(magic) == 0xbeefbabe)
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if (in_be32(magic) == 0xbeefbabe)
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num_bytes -= (CONFIG_PRAM*1024) - PM_RESERVED_MEM;
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num_bytes -= (CONFIG_PRAM*1024) - PM_RESERVED_MEM;
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#endif
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#endif
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sync();
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sync();
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eieio();
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eieio();
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@ -204,7 +209,6 @@ static void program_ecc(unsigned long start_address, unsigned long num_bytes)
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return;
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return;
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}
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}
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#endif
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#endif
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@ -215,9 +219,6 @@ static void program_ecc(unsigned long start_address, unsigned long num_bytes)
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************************************************************************/
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************************************************************************/
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long int initdram (int board_type)
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long int initdram (int board_type)
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{
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{
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#define HCU_HW_SDRAM_CONFIG_MASK 0x7
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#define INVALID_HW_CONFIG "Invalid HW-Config"
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u16 *hwVersReg = (u16 *) HCU_HW_VERSION_REGISTER;
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unsigned int dram_size = 0;
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unsigned int dram_size = 0;
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mtsdram(DDR0_02, 0x00000000);
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mtsdram(DDR0_02, 0x00000000);
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@ -228,7 +229,7 @@ long int initdram (int board_type)
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mtsdram(DDR0_03, 0x02030602);
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mtsdram(DDR0_03, 0x02030602);
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mtsdram(DDR0_04, 0x0A020200);
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mtsdram(DDR0_04, 0x0A020200);
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mtsdram(DDR0_05, 0x02020307);
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mtsdram(DDR0_05, 0x02020307);
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switch (*hwVersReg & HCU_HW_SDRAM_CONFIG_MASK) {
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switch (in_be16((u16 *)HCU_HW_VERSION_REGISTER) & HCU_HW_SDRAM_CONFIG_MASK) {
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case 1:
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case 1:
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dram_size = 256 * 1024 * 1024 ;
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dram_size = 256 * 1024 * 1024 ;
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mtsdram(DDR0_06, 0x0102C812); /* 256MB RAM */
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mtsdram(DDR0_06, 0x0102C812); /* 256MB RAM */
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@ -259,8 +260,6 @@ long int initdram (int board_type)
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mtsdram(DDR0_19, 0x1D1D1D1D);
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mtsdram(DDR0_19, 0x1D1D1D1D);
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mtsdram(DDR0_20, 0x0B0B0B0B);
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mtsdram(DDR0_20, 0x0B0B0B0B);
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mtsdram(DDR0_21, 0x0B0B0B0B);
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mtsdram(DDR0_21, 0x0B0B0B0B);
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#define ECC_RAM 0x03267F0B
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#define NO_ECC_RAM 0x00267F0B
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#ifdef CONFIG_DDR_ECC
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#ifdef CONFIG_DDR_ECC
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mtsdram(DDR0_22, ECC_RAM);
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mtsdram(DDR0_22, ECC_RAM);
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#else
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#else
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