mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
Merge branch 'master' of git://git.denx.de/u-boot-arm
This commit is contained in:
Wolfgang Denk
commit
b97a31165a
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@ -27,8 +27,8 @@
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static u32 mx31_decode_pll(u32 reg, u32 infreq)
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{
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u32 mfi = (reg >> 10) & 0xf;
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u32 mfn = reg & 0x3f;
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u32 mfd = (reg >> 16) & 0x3f;
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u32 mfn = reg & 0x3ff;
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u32 mfd = (reg >> 16) & 0x3ff;
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u32 pd = (reg >> 26) & 0xf;
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mfi = mfi <= 5 ? 5 : mfi;
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@ -90,7 +90,6 @@ static void nand_davinci_select_chip(struct mtd_info *mtd, int chip)
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#ifdef CFG_NAND_HW_ECC
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#ifdef CFG_NAND_LARGEPAGE
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static struct nand_ecclayout davinci_nand_ecclayout = {
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.useecc = MTD_NANDECC_AUTOPLACE,
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.eccbytes = 12,
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.eccpos = {8, 9, 10, 24, 25, 26, 40, 41, 42, 56, 57, 58},
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.oobfree = {
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@ -103,7 +102,6 @@ static struct nand_ecclayout davinci_nand_ecclayout = {
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};
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#elif defined(CFG_NAND_SMALLPAGE)
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static struct nand_ecclayout davinci_nand_ecclayout = {
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.useecc = MTD_NANDECC_AUTOPLACE,
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.eccbytes = 3,
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.eccpos = {0, 1, 2},
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.oobfree = {
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@ -371,12 +369,11 @@ int board_nand_init(struct nand_chip *nand)
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nand->options = NAND_USE_FLASH_BBT;
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#endif
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#ifdef CFG_NAND_HW_ECC
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#ifdef CFG_NAND_LARGEPAGE
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nand->ecc.mode = NAND_ECC_HW;
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#ifdef CFG_NAND_LARGEPAGE
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nand->ecc.size = 2048;
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nand->ecc.bytes = 12;
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#elif defined(CFG_NAND_SMALLPAGE)
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nand->ecc.mode = NAND_ECC_HW;
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nand->ecc.size = 512;
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nand->ecc.bytes = 3;
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#else
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39
cpu/arm926ejs/versatile/timer.c
Normal file → Executable file
39
cpu/arm926ejs/versatile/timer.c
Normal file → Executable file
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@ -46,12 +46,43 @@
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static ulong timestamp;
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static ulong lastdec;
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/* nothing really to do with interrupts, just starts up a counter. */
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#define TIMER_ENABLE (1 << 7)
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#define TIMER_MODE_MSK (1 << 6)
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#define TIMER_MODE_FR (0 << 6)
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#define TIMER_MODE_PD (1 << 6)
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#define TIMER_INT_EN (1 << 5)
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#define TIMER_PRS_MSK (3 << 2)
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#define TIMER_PRS_8S (1 << 3)
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#define TIMER_SIZE_MSK (1 << 2)
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#define TIMER_ONE_SHT (1 << 0)
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int timer_init (void)
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{
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*(volatile ulong *)(CFG_TIMERBASE + 0) = CFG_TIMER_RELOAD; /* TimerLoad */
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*(volatile ulong *)(CFG_TIMERBASE + 4) = CFG_TIMER_RELOAD; /* TimerValue */
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*(volatile ulong *)(CFG_TIMERBASE + 8) = 0x8C;
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ulong tmr_ctrl_val;
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/* 1st disable the Timer */
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tmr_ctrl_val = *(volatile ulong *)(CFG_TIMERBASE + 8);
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tmr_ctrl_val &= ~TIMER_ENABLE;
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*(volatile ulong *)(CFG_TIMERBASE + 8) = tmr_ctrl_val;
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/*
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* The Timer Control Register has one Undefined/Shouldn't Use Bit
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* So we should do read/modify/write Operation
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*/
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/*
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* Timer Mode : Free Running
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* Interrupt : Disabled
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* Prescale : 8 Stage, Clk/256
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* Tmr Siz : 16 Bit Counter
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* Tmr in Wrapping Mode
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*/
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tmr_ctrl_val = *(volatile ulong *)(CFG_TIMERBASE + 8);
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tmr_ctrl_val &= ~(TIMER_MODE_MSK | TIMER_INT_EN | TIMER_PRS_MSK | TIMER_SIZE_MSK | TIMER_ONE_SHT );
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tmr_ctrl_val |= (TIMER_ENABLE | TIMER_PRS_8S);
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*(volatile ulong *)(CFG_TIMERBASE + 8) = tmr_ctrl_val;
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/* init the timestamp and lastdec value */
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reset_timer_masked();
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@ -53,6 +53,7 @@ COBJS-$(CONFIG_RTC_MK48T59) += mk48t59.o
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COBJS-$(CONFIG_RTC_MPC5200) += mpc5xxx.o
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COBJS-$(CONFIG_RTC_MPC8xx) += mpc8xx.o
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COBJS-$(CONFIG_RTC_PCF8563) += pcf8563.o
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COBJS-$(CONFIG_RTC_PL031) += pl031.o
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COBJS-$(CONFIG_RTC_RS5C372A) += rs5c372.o
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COBJS-$(CONFIG_RTC_RX8025) += rx8025.o
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COBJS-$(CONFIG_RTC_S3C24X0) += s3c24x0_rtc.o
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123
drivers/rtc/pl031.c
Executable file
123
drivers/rtc/pl031.c
Executable file
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@ -0,0 +1,123 @@
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/*
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* (C) Copyright 2008
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* Gururaja Hebbar gururajakr@sanyo.co.in
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*
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* reference linux-2.6.20.6/drivers/rtc/rtc-pl031.c
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <command.h>
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#include <rtc.h>
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#if defined(CONFIG_CMD_DATE)
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#ifndef CFG_RTC_PL031_BASE
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#error CFG_RTC_PL031_BASE is not defined!
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#endif
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/*
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* Register definitions
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*/
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#define RTC_DR 0x00 /* Data read register */
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#define RTC_MR 0x04 /* Match register */
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#define RTC_LR 0x08 /* Data load register */
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#define RTC_CR 0x0c /* Control register */
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#define RTC_IMSC 0x10 /* Interrupt mask and set register */
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#define RTC_RIS 0x14 /* Raw interrupt status register */
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#define RTC_MIS 0x18 /* Masked interrupt status register */
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#define RTC_ICR 0x1c /* Interrupt clear register */
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#define RTC_CR_START (1 << 0)
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#define RTC_WRITE_REG(addr, val) \
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(*(volatile unsigned int *)(CFG_RTC_PL031_BASE + (addr)) = (val))
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#define RTC_READ_REG(addr) \
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(*(volatile unsigned int *)(CFG_RTC_PL031_BASE + (addr)))
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static int pl031_initted = 0;
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/* Enable RTC Start in Control register*/
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void rtc_init(void)
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{
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RTC_WRITE_REG(RTC_CR, RTC_CR_START);
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pl031_initted = 1;
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}
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/*
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* Reset the RTC. We set the date back to 1970-01-01.
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*/
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void rtc_reset(void)
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{
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RTC_WRITE_REG(RTC_LR, 0x00);
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if(!pl031_initted)
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rtc_init();
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}
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/*
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* Set the RTC
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*/
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void rtc_set(struct rtc_time *tmp)
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{
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unsigned long tim;
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if(!pl031_initted)
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rtc_init();
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if (tmp == NULL) {
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puts("Error setting the date/time\n");
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return;
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}
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/* Calculate number of seconds this incoming time represents */
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tim = mktime(tmp->tm_year, tmp->tm_mon, tmp->tm_mday,
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tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
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RTC_WRITE_REG(RTC_LR, tim);
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}
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/*
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* Get the current time from the RTC
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*/
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int rtc_get(struct rtc_time *tmp)
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{
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ulong tim;
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if(!pl031_initted)
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rtc_init();
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if (tmp == NULL) {
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puts("Error getting the date/time\n");
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return -1;
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}
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tim = RTC_READ_REG(RTC_DR);
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to_tm (tim, tmp);
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debug ( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
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tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
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tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
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return 0;
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}
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#endif
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