mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-29 16:10:24 +09:00
CLK: HSDK: Check for PLL bypass firstly
Pll bypass has priority over enable/disable. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
This commit is contained in:
parent
95f7103f94
commit
b8f3ce0137
@ -377,14 +377,14 @@ static ulong pll_get(struct clk *sclk)
|
|||||||
|
|
||||||
pr_debug("current configurarion: %#x\n", val);
|
pr_debug("current configurarion: %#x\n", val);
|
||||||
|
|
||||||
/* Check if PLL is disabled */
|
|
||||||
if (val & CGU_PLL_CTRL_PD)
|
|
||||||
return 0;
|
|
||||||
|
|
||||||
/* Check if PLL is bypassed */
|
/* Check if PLL is bypassed */
|
||||||
if (val & CGU_PLL_CTRL_BYPASS)
|
if (val & CGU_PLL_CTRL_BYPASS)
|
||||||
return PARENT_RATE;
|
return PARENT_RATE;
|
||||||
|
|
||||||
|
/* Check if PLL is disabled */
|
||||||
|
if (val & CGU_PLL_CTRL_PD)
|
||||||
|
return 0;
|
||||||
|
|
||||||
/* input divider = reg.idiv + 1 */
|
/* input divider = reg.idiv + 1 */
|
||||||
idiv = 1 + ((val & CGU_PLL_CTRL_IDIV_MASK) >> CGU_PLL_CTRL_IDIV_SHIFT);
|
idiv = 1 + ((val & CGU_PLL_CTRL_IDIV_MASK) >> CGU_PLL_CTRL_IDIV_SHIFT);
|
||||||
/* fb divider = 2*(reg.fbdiv + 1) */
|
/* fb divider = 2*(reg.fbdiv + 1) */
|
||||||
|
Loading…
Reference in New Issue
Block a user