From b8d6aa0428e20ef5bd36d21d2428f3045e564862 Mon Sep 17 00:00:00 2001 From: Koen Vandeputte Date: Thu, 4 Jan 2018 14:54:34 +0100 Subject: [PATCH] drivers: pci: imx: fix enumeration logic error By default, the subordinate is set equally to the secondary bus (1) when the RC boots, and does not alter afterwards. This means that theoretically, the highest bus reachable downstream is bus 1. Force the PCIe RC subordinate to 0xff, otherwise no downstream devices will be detected behind bus 1 if the booting OS does not allow enumerating a higher busnr than the subordinate value of the primary bus. Signed-off-by: Koen Vandeputte (cherry picked from commit f57263ee9bb8b5d9f39b48d09d21114c9dbb6a02) --- drivers/pci/pcie_imx.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/pci/pcie_imx.c b/drivers/pci/pcie_imx.c index 90a34063b0..ef66a1d3f4 100644 --- a/drivers/pci/pcie_imx.c +++ b/drivers/pci/pcie_imx.c @@ -615,6 +615,17 @@ static int imx_pcie_link_up(void) imx_pcie_regions_setup(); + /* + * By default, the subordinate is set equally to the secondary + * bus (0x01) when the RC boots. + * This means that theoretically, only bus 1 is reachable from the RC. + * Force the PCIe RC subordinate to 0xff, otherwise no downstream + * devices will be detected if the enumeration is applied strictly. + */ + tmp = readl(MX6_DBI_ADDR + 0x18); + tmp |= (0xff << 16); + writel(tmp, MX6_DBI_ADDR + 0x18); + /* * FIXME: Force the PCIe RC to Gen1 operation * The RC must be forced into Gen1 mode before bringing the link