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https://github.com/brain-hackers/u-boot-brain
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rockchip: add support for enter to bootrom download mode
Rockchip bootrom will enter download mode if it returns from spl/tpl with a non-zero value and couldn't find a valid image in the backup partition. This patch provide a method to instruct the system to back to bootrom download mode by checking the BROM_DOWNLOAD_FLAG register. As the bootrom download function relys on some modules such as interrupts, so we need to back to bootrom as early as possbile before the tpl/spl code override the interrupt configurations. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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@ -15,7 +15,11 @@
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#define BOOT_CHARGING (REBOOT_FLAG + 11)
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#define BOOT_CHARGING (REBOOT_FLAG + 11)
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/* enter usb mass storage mode */
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/* enter usb mass storage mode */
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#define BOOT_UMS (REBOOT_FLAG + 12)
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#define BOOT_UMS (REBOOT_FLAG + 12)
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/* enter bootrom download mode */
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#define BOOT_BROM_DOWNLOAD 0xEF08A53C
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#ifndef __ASSEMBLY__
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int setup_boot_mode(void);
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int setup_boot_mode(void);
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#endif
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#endif
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#endif
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@ -118,6 +118,7 @@ config ROCKCHIP_RK3399
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select SPL_DRIVERS_MISC_SUPPORT
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select SPL_DRIVERS_MISC_SUPPORT
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select DEBUG_UART_BOARD_INIT
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select DEBUG_UART_BOARD_INIT
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select BOARD_LATE_INIT
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select BOARD_LATE_INIT
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select ROCKCHIP_BROM_HELPER
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help
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help
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The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
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The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
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and quad-core Cortex-A53.
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and quad-core Cortex-A53.
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@ -6,6 +6,8 @@
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#include <common.h>
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#include <common.h>
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#include <asm/arch/bootrom.h>
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#include <asm/arch/bootrom.h>
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#include <asm/arch/boot_mode.h>
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#include <asm/io.h>
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#include <asm/setjmp.h>
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#include <asm/setjmp.h>
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#include <asm/system.h>
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#include <asm/system.h>
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@ -15,12 +17,45 @@
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*/
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*/
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static jmp_buf brom_ctx __section(".data");
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static jmp_buf brom_ctx __section(".data");
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static void _back_to_bootrom(enum rockchip_bootrom_cmd brom_cmd)
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{
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longjmp(brom_ctx, brom_cmd);
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}
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void back_to_bootrom(enum rockchip_bootrom_cmd brom_cmd)
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void back_to_bootrom(enum rockchip_bootrom_cmd brom_cmd)
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{
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{
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#if CONFIG_IS_ENABLED(LIBCOMMON_SUPPORT)
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#if CONFIG_IS_ENABLED(LIBCOMMON_SUPPORT)
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puts("Returning to boot ROM...\n");
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puts("Returning to boot ROM...\n");
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#endif
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#endif
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longjmp(brom_ctx, brom_cmd);
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_back_to_bootrom(brom_cmd);
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}
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/*
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* we back to bootrom download mode if get a
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* BOOT_BROM_DOWNLOAD flag in boot mode register
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*
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* note: the boot mode register is configured by
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* application(next stage bootloader, kernel, etc),
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* and the bootrom never check this register, so we need
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* to check it and back to bootrom at very early bootstage(before
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* some basic configurations(such as interrupts) been
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* changed by TPL/SPL, as the bootrom download operation
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* relys on many default settings(such as interrupts) by
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* it's self.
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*/
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static bool check_back_to_brom_dnl_flag(void)
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{
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u32 boot_mode;
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if (CONFIG_ROCKCHIP_BOOT_MODE_REG) {
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boot_mode = readl(CONFIG_ROCKCHIP_BOOT_MODE_REG);
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if (boot_mode == BOOT_BROM_DOWNLOAD) {
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writel(0, CONFIG_ROCKCHIP_BOOT_MODE_REG);
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return true;
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}
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}
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return false;
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}
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}
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/*
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/*
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@ -34,6 +69,8 @@ int save_boot_params(void)
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switch (ret) {
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switch (ret) {
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case 0:
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case 0:
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if (check_back_to_brom_dnl_flag())
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_back_to_bootrom(BROM_BOOT_ENTER_DNL);
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/*
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/*
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* This is the initial pass through this function
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* This is the initial pass through this function
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* (i.e. saving the context), setjmp just setup up the
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* (i.e. saving the context), setjmp just setup up the
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@ -54,7 +91,13 @@ int save_boot_params(void)
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*/
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*/
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ret = 0;
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ret = 0;
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break;
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break;
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case BROM_BOOT_ENTER_DNL:
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/*
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* A non-zero return value will instruct the BROM enter
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* download mode.
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*/
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ret = 1;
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break;
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default:
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default:
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#if CONFIG_IS_ENABLED(LIBCOMMON_SUPPORT)
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#if CONFIG_IS_ENABLED(LIBCOMMON_SUPPORT)
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puts("FATAL: unexpected command to back_to_bootrom()\n");
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puts("FATAL: unexpected command to back_to_bootrom()\n");
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