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armv8: cache_v8: fix mmu_set_region_dcache_behaviour
The enum dcache_optoion contains a shift left 2 bits in the armv8 case already. The PMD_ATTRINDX(option) macro will perform a left shift of 2 bits. Perform a right shift so that in the end we get the correct value. [trini: Reword the commit message] Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
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@ -557,7 +557,7 @@ static u64 set_one_region(u64 start, u64 size, u64 attrs, bool flag, int level)
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void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size,
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enum dcache_option option)
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{
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u64 attrs = PMD_ATTRINDX(option);
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u64 attrs = PMD_ATTRINDX(option >> 2);
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u64 real_start = start;
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u64 real_size = size;
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