arm: mach-k3: am642: Unlock all applicable control MMR registers

To access various control MMR functionality the registers need to
be unlocked. Do that for all control MMR regions in the MAIN domain.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
This commit is contained in:
Dave Gerlach 2021-04-23 11:27:34 -05:00 committed by Lokesh Vutla
parent 57dba04afb
commit b4a8c3b242
2 changed files with 22 additions and 4 deletions

View File

@ -15,12 +15,28 @@
#if defined(CONFIG_SPL_BUILD) #if defined(CONFIG_SPL_BUILD)
static void ctrl_mmr_unlock(void)
{
/* Unlock all PADCFG_MMR1 module registers */
mmr_unlock(PADCFG_MMR1_BASE, 1);
/* Unlock all CTRL_MMR0 module registers */
mmr_unlock(CTRL_MMR0_BASE, 0);
mmr_unlock(CTRL_MMR0_BASE, 1);
mmr_unlock(CTRL_MMR0_BASE, 2);
mmr_unlock(CTRL_MMR0_BASE, 3);
mmr_unlock(CTRL_MMR0_BASE, 5);
mmr_unlock(CTRL_MMR0_BASE, 6);
}
void board_init_f(ulong dummy) void board_init_f(ulong dummy)
{ {
#if defined(CONFIG_CPU_V7R) #if defined(CONFIG_CPU_V7R)
setup_k3_mpu_regions(); setup_k3_mpu_regions();
#endif #endif
ctrl_mmr_unlock();
/* Init DM early */ /* Init DM early */
spl_early_init(); spl_early_init();

View File

@ -12,6 +12,8 @@
#define CTRL_MMR0_BASE 0x43000000 #define CTRL_MMR0_BASE 0x43000000
#define CTRLMMR_MAIN_DEVSTAT (CTRL_MMR0_BASE + 0x30) #define CTRLMMR_MAIN_DEVSTAT (CTRL_MMR0_BASE + 0x30)
#define PADCFG_MMR1_BASE 0xf0000
#define MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK 0x00000078 #define MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK 0x00000078
#define MAIN_DEVSTAT_PRIMARY_BOOTMODE_SHIFT 3 #define MAIN_DEVSTAT_PRIMARY_BOOTMODE_SHIFT 3
@ -29,14 +31,14 @@
#define MAIN_DEVSTAT_PRIMARY_MMC_PORT_MASK 0x04 #define MAIN_DEVSTAT_PRIMARY_MMC_PORT_MASK 0x04
/* /*
* The CTRL_MMR memory space is divided into several equally-spaced * The CTRL_MMR and PADCFG_MMR memory space is divided into several
* partitions, so defining the partition size allows us to determine * equally-spaced partitions, so defining the partition size allows us to
* register addresses common to those partitions. * determine register addresses common to those partitions.
*/ */
#define CTRL_MMR0_PARTITION_SIZE 0x4000 #define CTRL_MMR0_PARTITION_SIZE 0x4000
/* /*
* CTRL_MMR lock/kick-mechanism shared register definitions. * CTRL_MMR and PADCFG_MMR lock/kick-mechanism shared register definitions.
*/ */
#define CTRLMMR_LOCK_KICK0 0x01008 #define CTRLMMR_LOCK_KICK0 0x01008
#define CTRLMMR_LOCK_KICK0_UNLOCK_VAL 0x68ef3490 #define CTRLMMR_LOCK_KICK0_UNLOCK_VAL 0x68ef3490