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arm: mach-k3: am642: Unlock all applicable control MMR registers
To access various control MMR functionality the registers need to be unlocked. Do that for all control MMR regions in the MAIN domain. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
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@ -15,12 +15,28 @@
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#if defined(CONFIG_SPL_BUILD)
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#if defined(CONFIG_SPL_BUILD)
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static void ctrl_mmr_unlock(void)
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{
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/* Unlock all PADCFG_MMR1 module registers */
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mmr_unlock(PADCFG_MMR1_BASE, 1);
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/* Unlock all CTRL_MMR0 module registers */
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mmr_unlock(CTRL_MMR0_BASE, 0);
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mmr_unlock(CTRL_MMR0_BASE, 1);
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mmr_unlock(CTRL_MMR0_BASE, 2);
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mmr_unlock(CTRL_MMR0_BASE, 3);
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mmr_unlock(CTRL_MMR0_BASE, 5);
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mmr_unlock(CTRL_MMR0_BASE, 6);
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}
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void board_init_f(ulong dummy)
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void board_init_f(ulong dummy)
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{
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{
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#if defined(CONFIG_CPU_V7R)
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#if defined(CONFIG_CPU_V7R)
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setup_k3_mpu_regions();
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setup_k3_mpu_regions();
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#endif
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#endif
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ctrl_mmr_unlock();
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/* Init DM early */
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/* Init DM early */
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spl_early_init();
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spl_early_init();
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@ -12,6 +12,8 @@
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#define CTRL_MMR0_BASE 0x43000000
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#define CTRL_MMR0_BASE 0x43000000
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#define CTRLMMR_MAIN_DEVSTAT (CTRL_MMR0_BASE + 0x30)
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#define CTRLMMR_MAIN_DEVSTAT (CTRL_MMR0_BASE + 0x30)
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#define PADCFG_MMR1_BASE 0xf0000
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#define MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK 0x00000078
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#define MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK 0x00000078
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#define MAIN_DEVSTAT_PRIMARY_BOOTMODE_SHIFT 3
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#define MAIN_DEVSTAT_PRIMARY_BOOTMODE_SHIFT 3
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@ -29,14 +31,14 @@
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#define MAIN_DEVSTAT_PRIMARY_MMC_PORT_MASK 0x04
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#define MAIN_DEVSTAT_PRIMARY_MMC_PORT_MASK 0x04
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/*
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/*
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* The CTRL_MMR memory space is divided into several equally-spaced
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* The CTRL_MMR and PADCFG_MMR memory space is divided into several
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* partitions, so defining the partition size allows us to determine
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* equally-spaced partitions, so defining the partition size allows us to
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* register addresses common to those partitions.
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* determine register addresses common to those partitions.
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*/
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*/
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#define CTRL_MMR0_PARTITION_SIZE 0x4000
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#define CTRL_MMR0_PARTITION_SIZE 0x4000
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/*
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/*
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* CTRL_MMR lock/kick-mechanism shared register definitions.
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* CTRL_MMR and PADCFG_MMR lock/kick-mechanism shared register definitions.
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*/
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*/
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#define CTRLMMR_LOCK_KICK0 0x01008
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#define CTRLMMR_LOCK_KICK0 0x01008
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#define CTRLMMR_LOCK_KICK0_UNLOCK_VAL 0x68ef3490
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#define CTRLMMR_LOCK_KICK0_UNLOCK_VAL 0x68ef3490
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