bootm: Simplying cache flush code

The cache flush of the kernel load area needs to be aligned outward to
the DMA cache alignment.  The operations are simpler if we think of this
as aligning the start down, ALIGN_DOWN(load, ARCH_DMA_MINALIGN), and
aligning the end up, ALIGN(load_end, ARCH_DMA_MINALIGN), and then find
the length of the flushed region by subtracting the former from the
latter.

Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Trent Piepho 2019-03-27 23:50:09 +00:00 committed by Tom Rini
parent 4c6be01c27
commit b4353b3713
1 changed files with 1 additions and 6 deletions

View File

@ -450,7 +450,6 @@ static int bootm_load_os(bootm_headers_t *images, int boot_progress)
ulong image_start = os.image_start;
ulong image_len = os.image_len;
ulong flush_start = ALIGN_DOWN(load, ARCH_DMA_MINALIGN);
ulong flush_len;
bool no_overlap;
void *load_buf, *image_buf;
int err;
@ -465,11 +464,7 @@ static int bootm_load_os(bootm_headers_t *images, int boot_progress)
return err;
}
flush_len = load_end - load;
if (flush_start < load)
flush_len += load - flush_start;
flush_cache(flush_start, ALIGN(flush_len, ARCH_DMA_MINALIGN));
flush_cache(flush_start, ALIGN(load_end, ARCH_DMA_MINALIGN) - flush_start);
debug(" kernel loaded at 0x%08lx, end = 0x%08lx\n", load, load_end);
bootstage_mark(BOOTSTAGE_ID_KERNEL_LOADED);