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ARM: renesas: Update Gen3 PCIe dma-ranges before boot
Update "dma-ranges" DT property of all PCIe controllers in the system with the up-to-date DRAM layout. This allows the PCIe controller take full advantage of all the available DRAM. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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@ -21,6 +21,7 @@ config RCAR_GEN3
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imply CMD_GPT
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imply CMD_UUID
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imply CMD_MMC_SWRITE if MMC
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imply OF_BOARD_SETUP if PCI
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imply SUPPORT_EMMC_RPMB if MMC
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imply SPL
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imply SPL_BOARD_INIT
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@ -8,6 +8,8 @@
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*/
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#include <common.h>
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#include <dm.h>
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#include <dm/uclass-internal.h>
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#include <asm/arch/rmobile.h>
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#ifdef CONFIG_RCAR_GEN3
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@ -46,4 +48,51 @@ int dram_init_banksize(void)
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return 0;
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}
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#if CONFIG_IS_ENABLED(OF_BOARD_SETUP) && CONFIG_IS_ENABLED(PCI)
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int ft_board_setup(void *blob, bd_t *bd)
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{
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struct udevice *dev;
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struct uclass *uc;
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fdt_addr_t regs_addr;
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int i, off, ret;
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ret = uclass_get(UCLASS_PCI, &uc);
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if (ret)
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return ret;
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uclass_foreach_dev(dev, uc) {
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struct pci_controller hose = { 0 };
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for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
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if (hose.region_count == MAX_PCI_REGIONS) {
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printf("maximum number of regions parsed, aborting\n");
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break;
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}
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if (bd->bi_dram[i].size) {
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pci_set_region(&hose.regions[hose.region_count++],
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bd->bi_dram[i].start,
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bd->bi_dram[i].start,
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bd->bi_dram[i].size,
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PCI_REGION_MEM |
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PCI_REGION_PREFETCH |
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PCI_REGION_SYS_MEMORY);
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}
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}
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regs_addr = devfdt_get_addr_index(dev, 0);
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off = fdt_node_offset_by_compat_reg(blob,
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"renesas,pcie-rcar-gen3", regs_addr);
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if (off < 0) {
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printf("Failed to find PCIe node@%llx\n", regs_addr);
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return off;
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}
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fdt_pci_dma_ranges(blob, off, &hose);
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}
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return 0;
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}
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#endif
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#endif
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