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Tegra114: pinmux: Fix bad CAM_MCLK func 3 table entry
This caused CAM_MCLK's pinmux reg to be locked out, since the table parsing code couldn't find a matching entry for VI_ALT3 and wrote garbage to the register. Signed-off-by: Tom Warren <twarren@nvidia.com>
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@ -226,7 +226,7 @@ const struct tegra_pingroup_desc tegra_soc_pingroups[PINGRP_COUNT] = {
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PINI(SDMMC4_DAT6, SDMMC4, SDMMC4, SPI3, GMI, RSVD4),
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PINI(SDMMC4_DAT6, SDMMC4, SDMMC4, SPI3, GMI, RSVD4),
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PINI(SDMMC4_DAT7, SDMMC4, SDMMC4, RSVD2, GMI, RSVD4),
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PINI(SDMMC4_DAT7, SDMMC4, SDMMC4, RSVD2, GMI, RSVD4),
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PIN_RESERVED, /* Reserved by t114: 0x3280 */
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PIN_RESERVED, /* Reserved by t114: 0x3280 */
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PINI(CAM_MCLK, CAM, VI, VI_ALT1, VI_ALT2, RSVD4),
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PINI(CAM_MCLK, CAM, VI, VI_ALT1, VI_ALT3, RSVD4),
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PINI(GPIO_PCC1, CAM, I2S4, RSVD2, RSVD3, RSVD4),
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PINI(GPIO_PCC1, CAM, I2S4, RSVD2, RSVD3, RSVD4),
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PINI(GPIO_PBB0, CAM, I2S4, VI, VI_ALT1, VI_ALT3),
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PINI(GPIO_PBB0, CAM, I2S4, VI, VI_ALT1, VI_ALT3),
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PINI(CAM_I2C_SCL, CAM, VGP1, I2C3, RSVD3, RSVD4),
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PINI(CAM_I2C_SCL, CAM, VGP1, I2C3, RSVD3, RSVD4),
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