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https://github.com/brain-hackers/u-boot-brain
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x86: cpu: Report address width from cpu_get_info()
Add support for this new field in the common code used by most x86 CPU drivers. Signed-off-by: Simon Glass <sjg@chromium.org>
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@ -34,6 +34,10 @@
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DECLARE_GLOBAL_DATA_PTR;
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#define CPUID_FEATURE_PAE BIT(6)
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#define CPUID_FEATURE_PSE36 BIT(17)
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#define CPUID_FEAURE_HTT BIT(28)
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/*
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* Constructor for a conventional segment GDT (or LDT) entry
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* This is a macro so it can be used in initialisers
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@ -388,6 +392,25 @@ static void setup_identity(void)
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}
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}
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static uint cpu_cpuid_extended_level(void)
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{
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return cpuid_eax(0x80000000);
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}
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int cpu_phys_address_size(void)
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{
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if (!has_cpuid())
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return 32;
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if (cpu_cpuid_extended_level() >= 0x80000008)
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return cpuid_eax(0x80000008) & 0xff;
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if (cpuid_edx(1) & (CPUID_FEATURE_PAE | CPUID_FEATURE_PSE36))
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return 36;
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return 32;
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}
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/* Don't allow PCI region 3 to use memory in the 2-4GB memory hole */
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static void setup_pci_ram_top(void)
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{
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@ -127,6 +127,7 @@ int cpu_intel_get_info(struct cpu_info *info, int bclk)
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info->cpu_freq = ((msr.lo >> 8) & 0xff) * bclk * 1000000;
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info->features = 1 << CPU_FEAT_L1_CACHE | 1 << CPU_FEAT_MMU |
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1 << CPU_FEAT_UCODE | 1 << CPU_FEAT_DEVICE_ID;
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info->address_width = cpu_phys_address_size();
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return 0;
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}
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@ -70,3 +70,8 @@ int x86_cpu_reinit_f(void)
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{
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return 0;
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}
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int cpu_phys_address_size(void)
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{
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return CONFIG_CPU_ADDR_BITS;
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}
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@ -288,4 +288,13 @@ u32 cpu_get_family_model(void);
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*/
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u32 cpu_get_stepping(void);
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/**
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* cpu_phys_address_size() - Get the physical address size in bits
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*
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* This is 32 for older CPUs but newer ones may support 36.
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*
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* @return address size (typically 32 or 36)
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*/
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int cpu_phys_address_size(void);
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#endif
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