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https://github.com/brain-hackers/u-boot-brain
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board: amlogic: vim3: add support for dynamic PCIe enable
The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between an USB3.0 Type A connector and a M.2 Key M slot. The PHY driving these differential lines is shared between the USB3.0 controller and the PCIe Controller, thus only a single controller can use it. This adds this dynamic switching right before booting Linux and the configuration steps in the boards documentation. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Kevin Hilman <khilman@baylibre.com> [narmstrong: fixed warning by replacing min() by min_t()]
This commit is contained in:
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81
board/amlogic/vim3/khadas-mcu.h
Normal file
81
board/amlogic/vim3/khadas-mcu.h
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@ -0,0 +1,81 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Khadas System control Microcontroller Register map
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*
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* Copyright (C) 2020 BayLibre SAS
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*
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* Author(s): Neil Armstrong <narmstrong@baylibre.com>
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*/
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#ifndef MFD_KHADAS_MCU_H
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#define MFD_KHADAS_MCU_H
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#define KHADAS_MCU_PASSWD_VEN_0_REG 0x00 /* RO */
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#define KHADAS_MCU_PASSWD_VEN_1_REG 0x01 /* RO */
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#define KHADAS_MCU_PASSWD_VEN_2_REG 0x02 /* RO */
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#define KHADAS_MCU_PASSWD_VEN_3_REG 0x03 /* RO */
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#define KHADAS_MCU_PASSWD_VEN_4_REG 0x04 /* RO */
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#define KHADAS_MCU_PASSWD_VEN_5_REG 0x05 /* RO */
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#define KHADAS_MCU_MAC_0_REG 0x06 /* RO */
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#define KHADAS_MCU_MAC_1_REG 0x07 /* RO */
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#define KHADAS_MCU_MAC_2_REG 0x08 /* RO */
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#define KHADAS_MCU_MAC_3_REG 0x09 /* RO */
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#define KHADAS_MCU_MAC_4_REG 0x0a /* RO */
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#define KHADAS_MCU_MAC_5_REG 0x0b /* RO */
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#define KHADAS_MCU_USID_0_REG 0x0c /* RO */
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#define KHADAS_MCU_USID_1_REG 0x0d /* RO */
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#define KHADAS_MCU_USID_2_REG 0x0e /* RO */
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#define KHADAS_MCU_USID_3_REG 0x0f /* RO */
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#define KHADAS_MCU_USID_4_REG 0x10 /* RO */
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#define KHADAS_MCU_USID_5_REG 0x11 /* RO */
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#define KHADAS_MCU_VERSION_0_REG 0x12 /* RO */
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#define KHADAS_MCU_VERSION_1_REG 0x13 /* RO */
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#define KHADAS_MCU_DEVICE_NO_0_REG 0x14 /* RO */
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#define KHADAS_MCU_DEVICE_NO_1_REG 0x15 /* RO */
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#define KHADAS_MCU_FACTORY_TEST_REG 0x16 /* R */
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#define KHADAS_MCU_BOOT_MODE_REG 0x20 /* RW */
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#define KHADAS_MCU_BOOT_EN_WOL_REG 0x21 /* RW */
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#define KHADAS_MCU_BOOT_EN_RTC_REG 0x22 /* RW */
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#define KHADAS_MCU_BOOT_EN_EXP_REG 0x23 /* RW */
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#define KHADAS_MCU_BOOT_EN_IR_REG 0x24 /* RW */
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#define KHADAS_MCU_BOOT_EN_DCIN_REG 0x25 /* RW */
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#define KHADAS_MCU_BOOT_EN_KEY_REG 0x26 /* RW */
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#define KHADAS_MCU_KEY_MODE_REG 0x27 /* RW */
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#define KHADAS_MCU_LED_MODE_ON_REG 0x28 /* RW */
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#define KHADAS_MCU_LED_MODE_OFF_REG 0x29 /* RW */
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#define KHADAS_MCU_SHUTDOWN_NORMAL_REG 0x2c /* RW */
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#define KHADAS_MCU_MAC_SWITCH_REG 0x2d /* RW */
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#define KHADAS_MCU_MCU_SLEEP_MODE_REG 0x2e /* RW */
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#define KHADAS_MCU_IR_CODE1_0_REG 0x2f /* RW */
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#define KHADAS_MCU_IR_CODE1_1_REG 0x30 /* RW */
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#define KHADAS_MCU_IR_CODE1_2_REG 0x31 /* RW */
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#define KHADAS_MCU_IR_CODE1_3_REG 0x32 /* RW */
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#define KHADAS_MCU_USB_PCIE_SWITCH_REG 0x33 /* RW */
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#define KHADAS_MCU_IR_CODE2_0_REG 0x34 /* RW */
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#define KHADAS_MCU_IR_CODE2_1_REG 0x35 /* RW */
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#define KHADAS_MCU_IR_CODE2_2_REG 0x36 /* RW */
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#define KHADAS_MCU_IR_CODE2_3_REG 0x37 /* RW */
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#define KHADAS_MCU_PASSWD_USER_0_REG 0x40 /* RW */
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#define KHADAS_MCU_PASSWD_USER_1_REG 0x41 /* RW */
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#define KHADAS_MCU_PASSWD_USER_2_REG 0x42 /* RW */
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#define KHADAS_MCU_PASSWD_USER_3_REG 0x43 /* RW */
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#define KHADAS_MCU_PASSWD_USER_4_REG 0x44 /* RW */
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#define KHADAS_MCU_PASSWD_USER_5_REG 0x45 /* RW */
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#define KHADAS_MCU_USER_DATA_0_REG 0x46 /* RW 56 bytes */
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#define KHADAS_MCU_PWR_OFF_CMD_REG 0x80 /* WO */
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#define KHADAS_MCU_PASSWD_START_REG 0x81 /* WO */
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#define KHADAS_MCU_CHECK_VEN_PASSWD_REG 0x82 /* WO */
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#define KHADAS_MCU_CHECK_USER_PASSWD_REG 0x83 /* WO */
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#define KHADAS_MCU_SHUTDOWN_NORMAL_STATUS_REG 0x86 /* RO */
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#define KHADAS_MCU_WOL_INIT_START_REG 0x87 /* WO */
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#define KHADAS_MCU_CMD_FAN_STATUS_CTRL_REG 0x88 /* WO */
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enum {
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KHADAS_BOARD_VIM1 = 0x1,
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KHADAS_BOARD_VIM2,
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KHADAS_BOARD_VIM3,
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KHADAS_BOARD_EDGE = 0x11,
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KHADAS_BOARD_EDGE_V,
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};
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#endif /* MFD_KHADAS_MCU_H */
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@ -11,6 +11,123 @@
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#include <net.h>
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#include <net.h>
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#include <asm/io.h>
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#include <asm/io.h>
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#include <asm/arch/eth.h>
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#include <asm/arch/eth.h>
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#include <i2c.h>
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#include "khadas-mcu.h"
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/*
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* The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential
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* lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between
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* an USB3.0 Type A connector and a M.2 Key M slot.
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* The PHY driving these differential lines is shared between
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* the USB3.0 controller and the PCIe Controller, thus only
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* a single controller can use it.
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*/
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int meson_ft_board_setup(void *blob, struct bd_info *bd)
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{
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struct udevice *bus, *dev;
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int node, i2c_node, ret;
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unsigned int i2c_addr;
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u32 *val;
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/* Find I2C device */
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node = fdt_node_offset_by_compatible(gd->fdt_blob, -1, "khadas,mcu");
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if (node < 0) {
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printf("vim3: cannot find khadas,mcu node\n");
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return 0;
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}
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/* Get addr */
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val = (u32 *)fdt_getprop(gd->fdt_blob, node, "reg", NULL);
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if (!val) {
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printf("vim3: cannot find khadas,mcu node i2c addr\n");
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return 0;
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}
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i2c_addr = fdt32_to_cpu(*val);
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/* Get i2c device */
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i2c_node = fdt_parent_offset(gd->fdt_blob, node);
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if (node < 0) {
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printf("vim3: cannot find khadas,mcu i2c node\n");
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return 0;
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}
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ret = uclass_get_device_by_of_offset(UCLASS_I2C, i2c_node, &bus);
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if (ret < 0) {
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printf("vim3: cannot find i2c bus (%d)\n", ret);
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return 0;
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}
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ret = i2c_get_chip(bus, i2c_addr, 1, &dev);
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if (ret < 0) {
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printf("vim3: cannot find i2c chip (%d)\n", ret);
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return 0;
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}
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/* Read USB_PCIE_SWITCH_REG */
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ret = dm_i2c_reg_read(dev, KHADAS_MCU_USB_PCIE_SWITCH_REG);
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if (ret < 0) {
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printf("vim3: failed to read i2c reg (%d)\n", ret);
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return 0;
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}
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debug("MCU_USB_PCIE_SWITCH_REG: %d\n", ret);
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/*
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* If in PCIe mode, alter DT
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* 0:Enable USB3.0,Disable PCIE, 1:Disable USB3.0, Enable PCIE
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*/
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if (ret > 0) {
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static char data[32] __aligned(4);
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const void *ptmp;
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int len;
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/* Find USB node */
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node = fdt_node_offset_by_compatible(blob, -1, "amlogic,meson-g12a-usb-ctrl");
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if (node < 0) {
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printf("vim3: cannot find amlogic,meson-g12a-usb-ctrl node\n");
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return 0;
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}
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/* Update PHY names (mandatory to disable USB3.0) */
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len = strlcpy(data, "usb2-phy0", 32) + 1;
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len += strlcpy(&data[len], "usb2-phy1", 32 - len) + 1;
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ret = fdt_setprop(blob, node, "phy-names", data, len);
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if (ret < 0) {
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printf("vim3: failed to update usb phy names property (%d)\n", ret);
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return 0;
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}
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/* Update PHY list, by keeping the 2 first entries (optional) */
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ptmp = fdt_getprop(blob, node, "phys", &len);
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if (ptmp) {
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memcpy(data, ptmp, min_t(unsigned int, 2 * sizeof(u32), len));
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ret = fdt_setprop(blob, node, "phys", data,
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min_t(unsigned int, 2 * sizeof(u32), len));
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if (ret < 0)
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printf("vim3: failed to update usb phys property (%d)\n", ret);
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} else
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printf("vim3: cannot find usb node phys property\n");
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/* Find PCIe node */
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node = fdt_node_offset_by_compatible(blob, -1, "amlogic,g12a-pcie");
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if (node < 0) {
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printf("vim3: cannot find amlogic,g12a-pcie node\n");
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return 0;
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}
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/* Enable PCIe */
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len = strlcpy(data, "okay", 32);
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ret = fdt_setprop(blob, node, "status", data, len);
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if (ret < 0) {
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printf("vim3: failed to enable pcie node (%d)\n", ret);
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return 0;
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}
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printf("vim3: successfully enabled PCIe\n");
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}
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return 0;
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}
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int misc_init_r(void)
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int misc_init_r(void)
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{
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{
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@ -17,6 +17,7 @@ CONFIG_MISC_INIT_R=y
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# CONFIG_CMD_BDI is not set
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# CONFIG_CMD_BDI is not set
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# CONFIG_CMD_IMI is not set
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# CONFIG_CMD_IMI is not set
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_I2C=y
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# CONFIG_CMD_LOADS is not set
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# CONFIG_CMD_LOADS is not set
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CONFIG_CMD_MMC=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_SF_TEST=y
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CONFIG_CMD_SF_TEST=y
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@ -28,6 +29,8 @@ CONFIG_CMD_REGULATOR=y
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CONFIG_OF_CONTROL=y
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CONFIG_OF_CONTROL=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_DM_I2C=y
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CONFIG_SYS_I2C_MESON=y
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CONFIG_DM_MMC=y
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CONFIG_DM_MMC=y
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CONFIG_MMC_MESON_GX=y
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CONFIG_MMC_MESON_GX=y
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CONFIG_MTD=y
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CONFIG_MTD=y
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# CONFIG_CMD_BDI is not set
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# CONFIG_CMD_BDI is not set
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# CONFIG_CMD_IMI is not set
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# CONFIG_CMD_IMI is not set
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_I2C=y
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# CONFIG_CMD_LOADS is not set
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# CONFIG_CMD_LOADS is not set
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CONFIG_CMD_MMC=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_SF_TEST=y
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CONFIG_CMD_SF_TEST=y
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CONFIG_OF_CONTROL=y
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CONFIG_OF_CONTROL=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_DM_I2C=y
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CONFIG_SYS_I2C_MESON=y
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CONFIG_DM_MMC=y
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CONFIG_DM_MMC=y
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CONFIG_MMC_MESON_GX=y
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CONFIG_MMC_MESON_GX=y
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CONFIG_MTD=y
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CONFIG_MTD=y
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@ -18,6 +18,33 @@ Technology Co., Ltd. with the following specifications:
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Schematics are available on the manufacturer website.
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Schematics are available on the manufacturer website.
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PCIe Setup
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----------
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The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential
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lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between
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an USB3.0 Type A connector and a M.2 Key M slot.
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The PHY driving these differential lines is shared between
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the USB3.0 controller and the PCIe Controller, thus only
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a single controller can use it.
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To setup for PCIe, run the following commands from U-Boot:
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.. code-block:: none
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i2c dev i2c@5000
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i2c mw 0x18 0x33 1
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Then power-cycle the board.
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To set back to USB3.0, run the following commands from U-Boot:
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.. code-block:: none
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i2c dev i2c@5000
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i2c mw 0x18 0x33 0
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Then power-cycle the board.
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U-Boot compilation
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U-Boot compilation
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------------------
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------------------
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@ -18,6 +18,33 @@ Technology Co., Ltd. with the following specifications:
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Schematics are available on the manufacturer website.
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Schematics are available on the manufacturer website.
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PCIe Setup
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----------
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The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential
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lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between
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an USB3.0 Type A connector and a M.2 Key M slot.
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The PHY driving these differential lines is shared between
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the USB3.0 controller and the PCIe Controller, thus only
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a single controller can use it.
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To setup for PCIe, run the following commands from U-Boot:
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.. code-block:: none
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i2c dev i2c@5000
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i2c mw 0x18 0x33 1
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Then power-cycle the board.
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To set back to USB3.0, run the following commands from U-Boot:
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.. code-block:: none
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i2c dev i2c@5000
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i2c mw 0x18 0x33 0
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Then power-cycle the board.
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U-Boot compilation
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U-Boot compilation
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------------------
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------------------
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