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arm: dt: imx6qdl: add tqma6[qdl] som on mba6 mainboard

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The device trees for TQMa6x SOM support variations in
- CPU type: imx6dl- or imx6q-
- MBa6 I2C bus access: -mba6a (i2c1) or -mba6b (i2c3)
  (plus the respective common/module include trees)

- USBH1 is directly connected to a hub
- USBOTG is connected to a separate connector
  and can act as host/device or full OTG port.

Signed-off-by: Michael Krummsdorf <michael.krummsdorf@ew.tq-group.com>
This commit is contained in:
Michael Krummsdorf 2020-04-09 15:21:37 +02:00 committed by Stefano Babic
parent ac1f2b4987
commit acdbe52674
17 changed files with 716 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/arm/dts/Makefile
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@ -620,6 +620,8 @@ dtb-y += \
imx6dl-icore.dtb \
imx6dl-icore-mipi.dtb \
imx6dl-icore-rqs.dtb \
imx6dl-mba6a.dtb \
imx6dl-mba6b.dtb \
imx6dl-mamoj.dtb \
imx6dl-nitrogen6x.dtb \
imx6dl-pico.dtb \
@ -649,6 +651,8 @@ dtb-y += \
imx6q-icore-rqs.dtb \
imx6q-kp.dtb \
imx6q-logicpd.dtb \
imx6q-mba6a.dtb \
imx6q-mba6b.dtb \
imx6q-mccmon6.dtb\
imx6q-nitrogen6x.dtb \
imx6q-novena.dtb \

18
arch/arm/dts/imx6dl-mba6.dtsi Normal file
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@ -0,0 +1,18 @@
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright (C) 2020 TQ-Systems GmbH
&ethphy {
rxdv-skew-ps = <180>;
txen-skew-ps = <0>;
rxd3-skew-ps = <180>;
rxd2-skew-ps = <180>;
rxd1-skew-ps = <180>;
rxd0-skew-ps = <180>;
txd3-skew-ps = <120>;
txd2-skew-ps = <0>;
txd1-skew-ps = <300>;
txd0-skew-ps = <120>;
txc-skew-ps = <1860>;
rxc-skew-ps = <1860>;
};

16
arch/arm/dts/imx6dl-mba6a.dts Normal file
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@ -0,0 +1,16 @@
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright (C) 2020 TQ-Systems GmbH
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include "imx6dl-tqma6a.dtsi"
#include "imx6qdl-mba6.dtsi"
#include "imx6qdl-mba6a.dtsi"
#include "imx6dl-mba6.dtsi"
/ {
model = "TQ TQMa6S on MBa6x";
compatible = "tq,mba6a", "tq,tqma6dl", "fsl,imx6dl";
};

16
arch/arm/dts/imx6dl-mba6b.dts Normal file
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@ -0,0 +1,16 @@
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright (C) 2020 TQ-Systems GmbH
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include "imx6dl-tqma6b.dtsi"
#include "imx6qdl-mba6.dtsi"
#include "imx6qdl-mba6b.dtsi"
#include "imx6dl-mba6.dtsi"
/ {
model = "TQ TQMa6S on MBa6x";
compatible = "tq,mba6b", "tq,tqma6dl", "fsl,imx6dl";
};

14
arch/arm/dts/imx6dl-tqma6a.dtsi Normal file
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@ -0,0 +1,14 @@
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright (C) 2020 TQ-Systems GmbH
#include "imx6dl.dtsi"
#include "imx6qdl-tqma6a.dtsi"
#include "imx6qdl-tqma6.dtsi"
/ {
memory {
reg = <0x10000000 0x20000000>;
};
};

14
arch/arm/dts/imx6dl-tqma6b.dtsi Normal file
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@ -0,0 +1,14 @@
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright (C) 2020 TQ-Systems GmbH
#include "imx6dl.dtsi"
#include "imx6qdl-tqma6b.dtsi"
#include "imx6qdl-tqma6.dtsi"
/ {
memory {
reg = <0x10000000 0x20000000>;
};
};

18
arch/arm/dts/imx6q-mba6.dtsi Normal file
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@ -0,0 +1,18 @@
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright (C) 2020 TQ-Systems GmbH
&ethphy {
rxdv-skew-ps = <180>;
txen-skew-ps = <120>;
rxd3-skew-ps = <180>;
rxd2-skew-ps = <180>;
rxd1-skew-ps = <180>;
rxd0-skew-ps = <180>;
txd3-skew-ps = <120>;
txd2-skew-ps = <0>;
txd1-skew-ps = <180>;
txd0-skew-ps = <360>;
txc-skew-ps = <1860>;
rxc-skew-ps = <1860>;
};

16
arch/arm/dts/imx6q-mba6a.dts Normal file
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@ -0,0 +1,16 @@
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright (C) 2020 TQ-Systems GmbH
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include "imx6q-tqma6a.dtsi"
#include "imx6qdl-mba6.dtsi"
#include "imx6qdl-mba6a.dtsi"
#include "imx6q-mba6.dtsi"
/ {
model = "TQ TQMa6Q on MBa6x";
compatible = "tq,mba6a", "fsl,imx6q";
};

16
arch/arm/dts/imx6q-mba6b.dts Normal file
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@ -0,0 +1,16 @@
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright (C) 2020 TQ-Systems GmbH
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include "imx6q-tqma6b.dtsi"
#include "imx6qdl-mba6.dtsi"
#include "imx6qdl-mba6b.dtsi"
#include "imx6q-mba6.dtsi"
/ {
model = "TQ TQMa6Q on MBa6x";
compatible = "tq,mba6b", "fsl,imx6q";
};

14
arch/arm/dts/imx6q-tqma6a.dtsi Normal file
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@ -0,0 +1,14 @@
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright (C) 2020 TQ-Systems GmbH
#include "imx6q.dtsi"
#include "imx6qdl-tqma6a.dtsi"
#include "imx6qdl-tqma6.dtsi"
/ {
memory {
reg = <0x10000000 0x40000000>;
};
};

14
arch/arm/dts/imx6q-tqma6b.dtsi Normal file
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@ -0,0 +1,14 @@
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright (C) 2020 TQ-Systems GmbH
#include "imx6q.dtsi"
#include "imx6qdl-tqma6b.dtsi"
#include "imx6qdl-tqma6.dtsi"
/ {
memory {
reg = <0x10000000 0x40000000>;
};
};

207
arch/arm/dts/imx6qdl-mba6.dtsi Normal file
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@ -0,0 +1,207 @@
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright (C) 2020 TQ-Systems GmbH
/ {
aliases {
mmc1 = &usdhc2;
};
chosen {
linux,stdout-path = &uart2;
stdout-path = &uart2;
};
regulators {
reg_mba6_3p3v: regulator@1 {
compatible = "regulator-fixed";
regulator-name = "supply-mba6-3p3v";
reg = <1>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_otgvbus: regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_reg_otgpwr>;
regulator-name = "otg-vbus-supply";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin_supply = <&reg_3p3v>;
};
};
};
&fec {
phy-mode = "rgmii-id";
phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
phy-reset-duration = <1>;
phy-reset-post-delay = <100>;
phy-handle = <&ethphy>;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
ethphy: ethernet-phy@3 {
compatible = "ethernet-phy-id0022.1622",
"ethernet-phy-ieee802.3-c22";
reg = <3>;
force-master;
max-speed = <1000>;
interrupt-parent = <&gpio1>;
interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
};
};
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
mba6 {
pinctrl_enet: enetgrp {
fsl,pins = <
/* FEC phy IRQ */
MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x00011008
/* FEC phy reset */
MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b099
/* DSE = 100, 100k up, SPEED = MED */
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0xb0a0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0xb0a0
/* DSE = 111, pull 100k up */
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0xb038
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0xb038
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0xb038
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0xb038
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0xb038
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0xb038
/* DSE = 111, pull external */
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x0038
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x0038
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x0038
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x0038
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x0038
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x0038
/* HYS = 1, DSE = 111, 100k up, SPEED = HIGH */
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0f0
>;
};
pinctrl_hog: hoggrp {
fsl,pins = <
MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x0001b099 /* LCD.PWR_EN */
MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x0001b099 /* LCD.RESET */
/* LCD.CONTRAST -> Rev 0100 only, not used on Rev.0200*/
MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x0001b099
MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x0001b099
MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x0001b099
MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x0001b099
MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x0001b099
MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x0001b099
MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x0001b099
MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x0001b099
MX6QDL_PAD_EIM_CS0__GPIO2_IO23 0x0001b099
MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x0001b099
MX6QDL_PAD_EIM_OE__GPIO2_IO25 0x0001b099
MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x0001b099
MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x0001b099
MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x0001b099
MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x0001b099
MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x0001b099
MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x0001b099
MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x0001b099
MX6QDL_PAD_KEY_COL1__GPIO4_IO08 0x0001b099
MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x0001b099
MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x0001b099
MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x0001b099
MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x0001b099
MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x0001b099
MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x0001b099
>;
};
pinctrl_reg_otgpwr: regotgpwrgrp {
fsl,pins = <
/* OTG_PWR */
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x0001b099
>;
};
pinctrl_uart2: uart2grp {
fsl,pins = <
MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b099
MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b099
>;
};
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
/* CLK: 47k Pup SPD_LOW DSE 40Ohm SRE_FAST HYS */
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x00017071
/* SD2: 47k Pup SPD_LOW DSE 80Ohm SRE_FAST HYS */
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x00017059
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x00017059
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x00017059
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x00017059
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x00017059
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b099 /* usdhc2 CD */
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x0001b099 /* usdhc2 WP */
>;
};
pinctrl_usbotg: usbotggrp {
fsl,pins = <
MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x0001b0b0
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x00017059
>;
};
};
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
status = "okay";
};
&usbh1 {
disable-over-current;
status = "okay";
};
&usbotg {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg>;
dr_mode = "otg";
vbus-supply = <&reg_otgvbus>;
status = "okay";
};
&usdhc2 { /* Baseboard Slot */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc2>;
vmmc-supply = <&reg_mba6_3p3v>;
bus-width = <4>;
no-1-8-v;
cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&wdog1 {
status = "okay";
};

39
arch/arm/dts/imx6qdl-mba6a.dtsi Normal file
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@ -0,0 +1,39 @@
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright (C) 2020 TQ-Systems GmbH
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>, <&pinctrl_enet_fix>;
interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
<&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
};
&i2c1 {
sensor1: lm75@49 {
compatible = "lm75";
reg = <0x49>;
};
eeprom1: m24c64@57 {
compatible = "st,24c64", "at24";
reg = <0x57>;
pagesize = <32>;
};
rtc1: ds1339@68 {
compatible = "ds1339";
reg = <0x68>;
};
};
&iomuxc {
mba6 {
pinctrl_enet_fix: enetfixgrp {
fsl,pins = <
/* ENET ping patch */
MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
>;
};
};
};

45
arch/arm/dts/imx6qdl-mba6b.dtsi Normal file
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@ -0,0 +1,45 @@
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright (C) 2020 TQ-Systems GmbH
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
};
&i2c1 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
};
&i2c3 {
sensor1: lm75@49 {
compatible = "lm75";
reg = <0x49>;
};
eeprom1: m24c64@57 {
compatible = "st,24c64", "at24";
reg = <0x57>;
pagesize = <32>;
};
rtc1: ds1339@68 {
compatible = "ds1339";
reg = <0x68>;
};
};
&iomuxc {
mba6 {
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b899
MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b899
>;
};
};
};

211
arch/arm/dts/imx6qdl-tqma6.dtsi Normal file
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@ -0,0 +1,211 @@
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright (C) 2020 TQ-Systems GmbH
/ {
aliases {
mmc0 = &usdhc3;
/delete-property/ mmc1;
/delete-property/ mmc2;
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
reg_3p3v: regulator@0 {
compatible = "regulator-fixed";
regulator-name = "supply-3p3v";
reg = <0>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
};
&ecspi1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1>;
fsl,spi-num-chipselects = <1>;
cs-gpios = <&gpio3 19 0>;
status = "okay";
flash: m25p80@0 {
status = "okay";
compatible = "micron,n25q128a13", "n25q128a13";
spi-max-frequency = <50000000>;
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
m25p,fast-read;
};
};
&iomuxc {
tqma6 {
pinctrl_ecspi1: ecspi1grp {
fsl,pins = <
/* HYS, SPEED = MED, 100k up, DSE = 011, SRE_FAST */
MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x1b099
MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0xb099
MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0xb099
/* eCSPI1 SS1 */
MX6QDL_PAD_EIM_D19__GPIO3_IO19 0xb099
>;
};
pinctrl_i2c1_tqma6: i2c1-tqma6grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b899
MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b899
>;
};
pinctrl_i2c3_tqma6: i2c3-tqma6grp {
fsl,pins = <
MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b899
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b899
>;
};
pinctrl_pmic: pmicgrp {
fsl,pins = <
MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 0x1b099 /* PMIC irq */
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
>;
};
};
};
&pmic {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pmic>;
interrupt-parent = <&gpio6>;
interrupts = <10 8>;
regulators {
reg_vddcore: sw1ab {
regulator-min-microvolt = <300000>;
regulator-max-microvolt = <1875000>;
regulator-always-on;
};
reg_vddsoc: sw1c {
regulator-min-microvolt = <300000>;
regulator-max-microvolt = <1875000>;
regulator-always-on;
};
reg_gen_3v3: sw2 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_ddr_1v5a: sw3a {
regulator-min-microvolt = <400000>;
regulator-max-microvolt = <1975000>;
regulator-always-on;
};
reg_ddr_1v5b: sw3b {
regulator-min-microvolt = <400000>;
regulator-max-microvolt = <1975000>;
regulator-always-on;
};
sw4_reg: sw4 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_5v_600mA: swbst {
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5150000>;
regulator-always-on;
};
reg_snvs_3v: vsnvs {
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <3000000>;
regulator-always-on;
};
reg_vrefddr: vrefddr {
regulator-boot-on;
regulator-always-on;
};
reg_vgen1_1v5: vgen1 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1550000>;
/* not used */
};
reg_vgen2_1v2_eth: vgen2 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1550000>;
regulator-always-on;
};
reg_vgen3_2v8: vgen3 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_vgen4_1v8: vgen4 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_vgen5_1v8_eth: vgen5 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_vgen6_3v3: vgen6 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
};
/* eMMC */
&usdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3>;
vmmc-supply = <&reg_3p3v>;
non-removable;
disable-wp;
bus-width = <8>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
mmccard: mmccard@0 {
reg = <0>;
compatible = "mmc-card";
broken-hpi;
};
};

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// SPDX-License-Identifier: GPL-2.0+
//
// Copyright (C) 2020 TQ-Systems GmbH
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1_tqma6>;
clock-frequency = <100000>;
status = "okay";
pmic: pf0100@08 {
compatible = "fsl,pfuze100";
reg = <0x08>;
};
sensor0: lm75@48 {
compatible = "lm75";
reg = <0x48>;
};
eeprom0: m24c64@50 {
compatible = "st,24c64", "at24";
reg = <0x50>;
pagesize = <32>;
};
};

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// SPDX-License-Identifier: GPL-2.0+
//
// Copyright (C) 2020 TQ-Systems GmbH
&i2c3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3_tqma6>;
clock-frequency = <100000>;
status = "okay";
pmic: pf0100@08 {
compatible = "fsl,pfuze100";
reg = <0x08>;
};
sensor0: lm75@48 {
compatible = "lm75";
reg = <0x48>;
};
eeprom0: m24c64@50 {
compatible = "st,24c64", "at24";
reg = <0x50>;
pagesize = <32>;
};
};