brain-hackers_pepepper-mirror/u-boot-brain
1
0
Fork 0
mirror of https://github.com/brain-hackers/u-boot-brain synced 2024-07-18 00:57:59 +09:00
Code Issues Projects Releases Wiki Activity

ARM: dts: stm32: add FMC2 EBI support for stm32mp157c

Browse Source 
This patch adds FMC2 External Bus Interface support on stm32mp157c.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
This commit is contained in:
Christophe Kerello 2020-07-31 09:53:44 +02:00 committed by Patrice Chotard
parent de1fb5fb00
commit acdaae6390
2 changed files with 38 additions and 21 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

43
arch/arm/dts/stm32mp151.dtsi
View File

@ -1328,23 +1328,38 @@
dma-requests = <48>; dma-requests = <48>;
}; };
fmc: nand-controller@58002000 { fmc: memory-controller@58002000 {
compatible = "st,stm32mp15-fmc2"; #address-cells = <2>;
reg = <0x58002000 0x1000>, #size-cells = <1>;
<0x80000000 0x1000>, compatible = "st,stm32mp1-fmc2-ebi";
<0x88010000 0x1000>, reg = <0x58002000 0x1000>;
<0x88020000 0x1000>,
<0x81000000 0x1000>,
<0x89010000 0x1000>,
<0x89020000 0x1000>;
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&mdma1 20 0x10 0x12000a02 0x0 0x0>,
<&mdma1 20 0x10 0x12000a08 0x0 0x0>,
<&mdma1 21 0x10 0x12000a0a 0x0 0x0>;
dma-names = "tx", "rx", "ecc";
clocks = <&rcc FMC_K>; clocks = <&rcc FMC_K>;
resets = <&rcc FMC_R>; resets = <&rcc FMC_R>;
status = "disabled"; status = "disabled";
ranges = <0 0 0x60000000 0x04000000>, /* EBI CS 1 */
<1 0 0x64000000 0x04000000>, /* EBI CS 2 */
<2 0 0x68000000 0x04000000>, /* EBI CS 3 */
<3 0 0x6c000000 0x04000000>, /* EBI CS 4 */
<4 0 0x80000000 0x10000000>; /* NAND */
nand-controller@4,0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32mp1-fmc2-nfc";
reg = <4 0x00000000 0x1000>,
<4 0x08010000 0x1000>,
<4 0x08020000 0x1000>,
<4 0x01000000 0x1000>,
<4 0x09010000 0x1000>,
<4 0x09020000 0x1000>;
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&mdma1 20 0x2 0x12000a02 0x0 0x0>,
<&mdma1 20 0x2 0x12000a08 0x0 0x0>,
<&mdma1 21 0x2 0x12000a0a 0x0 0x0>;
dma-names = "tx", "rx", "ecc";
status = "disabled";
};
}; };
qspi: spi@58003000 { qspi: spi@58003000 {

6
arch/arm/dts/stm32mp157c-ev1.dts
View File

@ -157,8 +157,9 @@
pinctrl-0 = <&fmc_pins_a>; pinctrl-0 = <&fmc_pins_a>;
pinctrl-1 = <&fmc_sleep_pins_a>; pinctrl-1 = <&fmc_sleep_pins_a>;
status = "okay"; status = "okay";
#address-cells = <1>;
#size-cells = <0>; nand-controller@4,0 {
status = "okay";
nand@0 { nand@0 {
reg = <0>; reg = <0>;
@ -166,6 +167,7 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
}; };
};
}; };
&i2c2 { &i2c2 {