mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-19 00:18:51 +09:00
arm: socfpga: config: Enable CONFIG_SPI_FLASH_BAR
This is needed to access broken (read: Micron) SPI flashes which are larger than 16 MiB and don't correctly support 4-byte addressing. Signed-off-by: Marek Vasut <marex@denx.de>
This commit is contained in:
parent
cbc9544d27
commit
ab48b19a66
@ -207,6 +207,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
|
||||
#endif
|
||||
#define CONFIG_CQSPI_DECODER 0
|
||||
#define CONFIG_CMD_SF
|
||||
#define CONFIG_SPI_FLASH_BAR
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_OF_CONTROL /* DW SPI is controlled via DT */
|
||||
|
Loading…
Reference in New Issue
Block a user