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net: designware: socfpga: Add ATF support for MAC driver
In non-secure mode (EL2), MAC driver calls the SMC/PSCI services provided by ATF to setup the PHY interface. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
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@ -6,6 +6,8 @@
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*/
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*/
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#include <common.h>
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#include <common.h>
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#include <asm/arch/secure_reg_helper.h>
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#include <asm/arch/system_manager.h>
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#include <asm/io.h>
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#include <asm/io.h>
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#include <dm.h>
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#include <dm.h>
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#include <clk.h>
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#include <clk.h>
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@ -17,8 +19,6 @@
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#include <dm/device_compat.h>
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#include <dm/device_compat.h>
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#include <linux/err.h>
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#include <linux/err.h>
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#include <asm/arch/system_manager.h>
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struct dwmac_socfpga_plat {
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struct dwmac_socfpga_plat {
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struct dw_eth_pdata dw_eth_pdata;
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struct dw_eth_pdata dw_eth_pdata;
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void *phy_intf;
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void *phy_intf;
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@ -64,6 +64,32 @@ static int dwmac_socfpga_of_to_plat(struct udevice *dev)
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return designware_eth_of_to_plat(dev);
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return designware_eth_of_to_plat(dev);
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}
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}
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static int dwmac_socfpga_do_setphy(struct udevice *dev, u32 modereg)
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{
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struct dwmac_socfpga_plat *pdata = dev_get_plat(dev);
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u32 modemask = SYSMGR_EMACGRP_CTRL_PHYSEL_MASK << pdata->reg_shift;
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#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_ATF)
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u32 index = ((u64)pdata->phy_intf - socfpga_get_sysmgr_addr() -
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SYSMGR_SOC64_EMAC0) >> 2;
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u32 id = SOCFPGA_SECURE_REG_SYSMGR_SOC64_EMAC0 + index;
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int ret = socfpga_secure_reg_update32(id,
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modemask,
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modereg << pdata->reg_shift);
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if (ret) {
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dev_err(dev, "Failed to set PHY register via SMC call\n");
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return ret;
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}
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#else
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clrsetbits_le32(pdata->phy_intf, modemask,
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modereg << pdata->reg_shift);
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#endif
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return 0;
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}
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static int dwmac_socfpga_probe(struct udevice *dev)
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static int dwmac_socfpga_probe(struct udevice *dev)
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{
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{
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struct dwmac_socfpga_plat *pdata = dev_get_plat(dev);
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struct dwmac_socfpga_plat *pdata = dev_get_plat(dev);
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@ -71,7 +97,6 @@ static int dwmac_socfpga_probe(struct udevice *dev)
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struct reset_ctl_bulk reset_bulk;
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struct reset_ctl_bulk reset_bulk;
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int ret;
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int ret;
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u32 modereg;
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u32 modereg;
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u32 modemask;
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switch (edata->phy_interface) {
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switch (edata->phy_interface) {
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case PHY_INTERFACE_MODE_MII:
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case PHY_INTERFACE_MODE_MII:
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@ -97,9 +122,9 @@ static int dwmac_socfpga_probe(struct udevice *dev)
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reset_assert_bulk(&reset_bulk);
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reset_assert_bulk(&reset_bulk);
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modemask = SYSMGR_EMACGRP_CTRL_PHYSEL_MASK << pdata->reg_shift;
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ret = dwmac_socfpga_do_setphy(dev, modereg);
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clrsetbits_le32(pdata->phy_intf, modemask,
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if (ret)
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modereg << pdata->reg_shift);
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return ret;
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reset_release_bulk(&reset_bulk);
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reset_release_bulk(&reset_bulk);
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