From c987f4753b0afadb38acd7e61df7ba11e8a0203f Mon Sep 17 00:00:00 2001 From: Felix Radensky Date: Mon, 28 Jun 2010 01:57:39 +0300 Subject: [PATCH 1/7] tsec: Fix eTSEC2 link problem on P2020RDB On P2020RDB eTSEC2 is connected to Vitesse VSC8221 PHY via SGMII. Current TBI PHY settings for SGMII mode cause link problems on this platform, link never comes up. Fix this by making TBI PHY settings configurable and add a working configuration for P2020RDB. Signed-off-by: Felix Radensky Acked-by: Andy Fleming Acked-by: Peter Tyser Tested-by: Peter Tyser --- drivers/net/tsec.c | 6 +++++- include/configs/P1_P2_RDB.h | 9 +++++++++ 2 files changed, 14 insertions(+), 1 deletion(-) diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c index 3e4c3bd31b..5fa6f61008 100644 --- a/drivers/net/tsec.c +++ b/drivers/net/tsec.c @@ -281,12 +281,16 @@ static uint tsec_local_mdio_read(volatile tsec_mdio_t *phyregs, | TBIANA_FULL_DUPLEX \ ) -/* Force the TBI PHY into 1000Mbps full duplex when in SGMII mode */ +/* By default force the TBI PHY into 1000Mbps full duplex when in SGMII mode */ +#ifndef CONFIG_TSEC_TBICR_SETTINGS #define TBICR_SETTINGS ( \ TBICR_PHY_RESET \ | TBICR_FULL_DUPLEX \ | TBICR_SPEED1_SET \ ) +#else +#define TBICR_SETTINGS CONFIG_TSEC_TBICR_SETTINGS +#endif /* CONFIG_TSEC_TBICR_SETTINGS */ /* Configure the TBI for SGMII operation */ static void tsec_configure_serdes(struct tsec_private *priv) diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h index 125911f2f8..b891730789 100644 --- a/include/configs/P1_P2_RDB.h +++ b/include/configs/P1_P2_RDB.h @@ -425,6 +425,15 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_ETHPRIME "eTSEC1" #define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ + +/* TBI PHY configuration for SGMII mode */ +#define CONFIG_TSEC_TBICR_SETTINGS ( \ + TBICR_PHY_RESET \ + | TBICR_ANEG_ENABLE \ + | TBICR_FULL_DUPLEX \ + | TBICR_SPEED1_SET \ + ) + #endif /* CONFIG_TSEC_ENET */ /* From 38c38c344c200ee90cfd243671473c449b6f0815 Mon Sep 17 00:00:00 2001 From: Poonam Aggrwal Date: Tue, 22 Jun 2010 12:50:46 +0530 Subject: [PATCH 2/7] 85xx/p1_p2_rdb: Added RevD board version support - Also modified the code to use io accessors. Signed-off-by: Poonam Aggrwal Signed-off-by: Dipen Dudhat Acked-by: Kumar Gala --- board/freescale/p1_p2_rdb/p1_p2_rdb.c | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/board/freescale/p1_p2_rdb/p1_p2_rdb.c b/board/freescale/p1_p2_rdb/p1_p2_rdb.c index 31cdf9ae4c..fae31f28c0 100644 --- a/board/freescale/p1_p2_rdb/p1_p2_rdb.c +++ b/board/freescale/p1_p2_rdb/p1_p2_rdb.c @@ -54,6 +54,7 @@ DECLARE_GLOBAL_DATA_PTR; #define BOARDREV_MASK 0x10100000 #define BOARDREV_B 0x10100000 #define BOARDREV_C 0x00100000 +#define BOARDREV_D 0x00000000 #define SYSCLK_66 66666666 #define SYSCLK_50 50000000 @@ -64,7 +65,7 @@ unsigned long get_board_sys_clk(ulong dummy) volatile ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR); u32 val_gpdat, sysclk_gpio, board_rev_gpio; - val_gpdat = pgpio->gpdat; + val_gpdat = in_be32(&pgpio->gpdat); sysclk_gpio = val_gpdat & SYSCLK_MASK; board_rev_gpio = val_gpdat & BOARDREV_MASK; if (board_rev_gpio == BOARDREV_C) { @@ -77,6 +78,11 @@ unsigned long get_board_sys_clk(ulong dummy) return SYSCLK_66; else return SYSCLK_50; + } else if (board_rev_gpio == BOARDREV_D) { + if(sysclk_gpio == 0) + return SYSCLK_66; + else + return SYSCLK_100; } return 0; } @@ -100,12 +106,14 @@ int checkboard (void) char board_rev = 0; struct cpu_type *cpu; - val_gpdat = pgpio->gpdat; + val_gpdat = in_be32(&pgpio->gpdat); board_rev_gpio = val_gpdat & BOARDREV_MASK; if (board_rev_gpio == BOARDREV_C) board_rev = 'C'; else if (board_rev_gpio == BOARDREV_B) board_rev = 'B'; + else if (board_rev_gpio == BOARDREV_D) + board_rev = 'D'; else panic ("Unexpected Board REV %x detected!!\n", board_rev_gpio); @@ -159,6 +167,7 @@ int board_eth_init(bd_t *bis) volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); int num = 0; char *tmp; + u32 pordevsr; unsigned int vscfw_addr; #ifdef CONFIG_TSEC1 @@ -171,7 +180,8 @@ int board_eth_init(bd_t *bis) #endif #ifdef CONFIG_TSEC3 SET_STD_TSEC_INFO(tsec_info[num], 3); - if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII3_DIS)) + pordevsr = in_be32(&gur->pordevsr); + if (!(pordevsr & MPC85xx_PORDEVSR_SGMII3_DIS)) tsec_info[num].flags |= TSEC_SGMII; num++; #endif From 0d7f4abcf6bbef06504c82e03f11054468262430 Mon Sep 17 00:00:00 2001 From: Remy Bohmer Date: Thu, 17 Jun 2010 21:17:08 +0200 Subject: [PATCH 3/7] Fix console_buffer size conflict error. The console_buffer size is declared in common/main.c as -- char console_buffer[CONFIG_SYS_CBSIZE + 1]; so this extern definition is wrong. Signed-off-by: Remy Bohmer --- common/hush.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/hush.c b/common/hush.c index 06c5ff8df4..9eea90f428 100644 --- a/common/hush.c +++ b/common/hush.c @@ -1018,7 +1018,7 @@ static void get_user_input(struct in_str *i) fflush(stdout); i->p = the_command; #else - extern char console_buffer[CONFIG_SYS_CBSIZE]; + extern char console_buffer[]; int n; static char the_command[CONFIG_SYS_CBSIZE]; From 9fb3b5085787baad8a133e347ad12c5b3a022e98 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Mon, 28 Jun 2010 22:44:49 +0400 Subject: [PATCH 4/7] EHCI: zero out QH transfer overlay in ehci_submit_async() ehci_submit_async() doesn't really zero out the QH transfer overlay (as the EHCI specification suggests) which leads to the controller seeing the "token" field as the previous call has left it, i.e.: - if a timeout occured on the previous call (Active bit left as 1), controller incorrectly tries to complete a previous transaction on a newly programmed endpoint; - if a halt occured on the previous call (Halted bit set to 1), controller just ignores the newly programmed TD(s) and the function then keeps returning error ad infinitum. This turned out to be caused by the wrong orger of the arguments to the memset() call in ehci_alloc(), so the allocated TDs weren't cleared either. While at it, stop needlessly initializing the alternate next TD pointer in the QH transfer overlay... Signed-off-by: Sergei Shtylyov Acked-by: Remy Bohmer --- drivers/usb/host/ehci-hcd.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index 7784d92b6f..37d056e005 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -275,7 +275,7 @@ static void *ehci_alloc(size_t sz, size_t align) return NULL; } - memset(p, sz, 0); + memset(p, 0, sz); return p; } @@ -350,7 +350,6 @@ ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer, (dev->parent->devnum << 16) | (0 << 8) | (0 << 0); qh->qh_endpt2 = cpu_to_hc32(endpt); qh->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE); - qh->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE); td = NULL; tdp = &qh->qh_overlay.qt_next; From e03b4d296b27790de3b25edd32784d20538240d8 Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Sat, 26 Jun 2010 00:39:28 +0200 Subject: [PATCH 5/7] Fix compiler warnings for EVB64260, P3G4 and ZUMA Fix following warnings: $ ./MAKEALL EVB64260 P3G4 ZUMA Configuring for EVB64260 board... mpsc.c: In function 'mpsc_putchar_early': mpsc.c:121: warning: dereferencing type-punned pointer will break strict-aliasing rules mpsc.c:127: warning: dereferencing type-punned pointer will break strict-aliasing rules ... Signed-off-by: Anatolij Gustschin --- board/evb64260/mpsc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/evb64260/mpsc.c b/board/evb64260/mpsc.c index 8c4a4c8990..3164967fed 100644 --- a/board/evb64260/mpsc.c +++ b/board/evb64260/mpsc.c @@ -88,7 +88,7 @@ static void galsdma_enable_rx(void); /* GT64240A errata: cant read MPSC/BRG registers... so make mirrors in ram for read/modify write */ -#define MIRROR_HACK ((struct _tag_mirror_hack *)&(gd->mirror_hack)) +#define MIRROR_HACK ((struct _tag_mirror_hack *)&(gd->mirror_hack[0])) #define GT_REG_WRITE_MIRROR_G(a,d) {MIRROR_HACK->a ## _M = d; GT_REG_WRITE(a,d);} #define GTREGREAD_MIRROR_G(a) (MIRROR_HACK->a ## _M) From 7030d56b7946c8db2e8082a9b84cd69b9540a0ca Mon Sep 17 00:00:00 2001 From: Becky Bruce Date: Thu, 17 Jun 2010 11:37:27 -0500 Subject: [PATCH 6/7] MAKEALL: Add missing powerpc 36-bit targets We were missing 8641HPCN_36BIT and MPC8536DS_36BIT. Signed-off-by: Becky Bruce --- MAKEALL | 2 ++ 1 file changed, 2 insertions(+) diff --git a/MAKEALL b/MAKEALL index d6d5f5b423..27f8bd166e 100755 --- a/MAKEALL +++ b/MAKEALL @@ -393,6 +393,7 @@ LIST_85xx=" \ MPC8536DS_NAND \ MPC8536DS_SDCARD \ MPC8536DS_SPIFLASH \ + MPC8536DS_36BIT \ MPC8540ADS \ MPC8540EVAL \ MPC8541CDS \ @@ -453,6 +454,7 @@ LIST_85xx=" \ LIST_86xx=" \ MPC8610HPCD \ + MPC8641HPCN_36BIT \ MPC8641HPCN \ sbc8641d \ XPEDITE5170 \ From 161e4ae46046282fde6a69a0f1f80965f2a1b6f4 Mon Sep 17 00:00:00 2001 From: Heiko Schocher Date: Thu, 17 Jun 2010 07:01:40 +0200 Subject: [PATCH 7/7] powerpc: fix wrong comment at GOT definitions r12 is used for accessing the GOT not r14. Fix this in the comment. Signed-off-by: Heiko Schocher --- include/ppc_asm.tmpl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/ppc_asm.tmpl b/include/ppc_asm.tmpl index 84de146e5d..2db4784d3b 100644 --- a/include/ppc_asm.tmpl +++ b/include/ppc_asm.tmpl @@ -35,7 +35,7 @@ * * Stolen from prepboot/bootldr.h, (C) 1998 Gabriel Paubert, paubert@iram.es * - * Uses r14 to access the GOT + * Uses r12 to access the GOT */ #define START_GOT \