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omap_hsmmc: Wait for CMDI to be clear

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Before we can send a command we need both the DATI (command inhibit on
mmc_dat line) bit and CMDI (command inhibit on mmc_cmd line) are clear.
The previous behavior of only checking on DATI was insufficient on some
cards and incorrect behavior in any case.  This makes the code check
for both bits being clear and makes the error print more clear as
to what happened.  DATI_CMDDIS is removed as it was unused elsewhere
in the code and stood for 'DATI is set, cmds are disabled still'.

Fix originally spotted by Peter Bigot.

Tested-by: Peter A. Bigot <bigotp@acm.org>
Tested-by: Robert Nelson <robertcnelson@gmail.com>
Signed-off-by: Tom Rini <trini@ti.com>
Tested-by: Andreas Müller <schnitzeltony@googlemail.com>
This commit is contained in:
Tom Rini 2012-01-30 11:22:25 +00:00 committed by Andy Fleming
parent 9a3aae22ed
commit a7778f8fbe
5 changed files with 7 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/include/asm/arch-am33xx/mmc_host_def.h
View File

@ -97,7 +97,7 @@ typedef struct hsmmc {
#define INDEX_MASK (0x3f << 24)
#define INDEX(i) (i << 24)
#define DATI_MASK (0x1 << 1)
#define DATI_CMDDIS (0x1 << 1)
#define CMDI_MASK (0x1 << 0)
#define DTW_1_BITMODE (0x0 << 1)
#define DTW_4_BITMODE (0x1 << 1)
#define DTW_8_BITMODE (0x1 << 5) /* CON[DW8]*/

2
arch/arm/include/asm/arch-omap3/mmc_host_def.h
View File

@ -129,7 +129,7 @@ struct hsmmc {
#define INDEX_MASK (0x3f << 24)
#define INDEX(i) (i << 24)
#define DATI_MASK (0x1 << 1)
#define DATI_CMDDIS (0x1 << 1)
#define CMDI_MASK (0x1 << 0)
#define DTW_1_BITMODE (0x0 << 1)
#define DTW_4_BITMODE (0x1 << 1)
#define DTW_8_BITMODE (0x1 << 5) /* CON[DW8]*/

2
arch/arm/include/asm/arch-omap4/mmc_host_def.h
View File

@ -107,7 +107,7 @@ struct hsmmc {
#define INDEX_MASK (0x3f << 24)
#define INDEX(i) (i << 24)
#define DATI_MASK (0x1 << 1)
#define DATI_CMDDIS (0x1 << 1)
#define CMDI_MASK (0x1 << 0)
#define DTW_1_BITMODE (0x0 << 1)
#define DTW_4_BITMODE (0x1 << 1)
#define DTW_8_BITMODE (0x1 << 5) /* CON[DW8]*/

2
arch/arm/include/asm/arch-omap5/mmc_host_def.h
View File

@ -107,7 +107,7 @@ struct hsmmc {
#define INDEX_MASK (0x3f << 24)
#define INDEX(i) (i << 24)
#define DATI_MASK (0x1 << 1)
#define DATI_CMDDIS (0x1 << 1)
#define CMDI_MASK (0x1 << 0)
#define DTW_1_BITMODE (0x0 << 1)
#define DTW_4_BITMODE (0x1 << 1)
#define DTW_8_BITMODE (0x1 << 5) /* CON[DW8]*/

5
drivers/mmc/omap_hsmmc.c
View File

@ -198,9 +198,10 @@ static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
ulong start;
start = get_timer(0);
while ((readl(&mmc_base->pstate) & DATI_MASK) == DATI_CMDDIS) {
while ((readl(&mmc_base->pstate) & (DATI_MASK | CMDI_MASK)) != 0) {
if (get_timer(0) - start > MAX_RETRY_MS) {
printf("%s: timedout waiting for cmddis!\n", __func__);
printf("%s: timedout waiting on cmd inhibit to clear\n",
__func__);
return TIMEOUT;
}
}