brain-hackers_pepepper-mirror/u-boot-brain
1
0
Fork 0
mirror of https://github.com/brain-hackers/u-boot-brain synced 2024-06-09 23:36:03 +09:00
Code Issues Projects Releases Wiki Activity

board: ge: bx50v3: use DM for uart

Browse Source 
Remove legacy uart pad and iomux code
Enable DM serial and mxc uart

Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
This commit is contained in:
Robert Beckett 2020-01-31 15:08:01 +02:00 committed by Stefano Babic
parent 2d1ea19b55
commit a707281a00
3 changed files with 5 additions and 32 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

24
board/ge/bx50v3/bx50v3.c
View File

@ -48,10 +48,6 @@ static struct vpd_cache vpd;
PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
PAD_CTL_HYS)
#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
PAD_CTL_SRE_FAST | PAD_CTL_HYS)
#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
PAD_CTL_SPEED_HIGH | PAD_CTL_DSE_48ohm | PAD_CTL_SRE_FAST)
@ -74,24 +70,6 @@ int dram_init(void)
return 0;
}
static iomux_v3_cfg_t const uart3_pads[] = {
MX6_PAD_EIM_D31__UART3_RTS_B | MUX_PAD_CTRL(UART_PAD_CTRL),
MX6_PAD_EIM_D23__UART3_CTS_B | MUX_PAD_CTRL(UART_PAD_CTRL),
MX6_PAD_EIM_D24__UART3_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
MX6_PAD_EIM_D25__UART3_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
};
static iomux_v3_cfg_t const uart4_pads[] = {
MX6_PAD_KEY_COL0__UART4_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
MX6_PAD_KEY_ROW0__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
};
static void setup_iomux_uart(void)
{
imx_iomux_v3_setup_multiple_pads(uart3_pads, ARRAY_SIZE(uart3_pads));
imx_iomux_v3_setup_multiple_pads(uart4_pads, ARRAY_SIZE(uart4_pads));
}
static int mx6_rgmii_rework(struct phy_device *phydev)
{
/* Configure AR8033 to ouput a 125MHz clk from CLK_25M */
@ -425,8 +403,6 @@ int board_early_init_f(void)
imx_iomux_v3_setup_multiple_pads(misc_pads,
ARRAY_SIZE(misc_pads));
setup_iomux_uart();
#if defined(CONFIG_VIDEO_IPUV3)
/* Set LDB clock to Video PLL */
select_ldb_di_clock_source(MXC_PLL5_CLK);

3
configs/ge_bx50v3_defconfig
View File

@ -83,6 +83,9 @@ CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_DA9063=y
CONFIG_DM_RTC=y
CONFIG_RTC_RX8010SJ=y
# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
CONFIG_DM_SERIAL=y
CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_MXC_SPI=y

10
include/configs/ge_bx50v3.h
View File

@ -16,9 +16,6 @@
#define CONFIG_BOARD_NAME "General Electric Bx50v3"
#define CONFIG_MXC_UART_BASE UART3_BASE
#define CONSOLE_DEV "ttymxc2"
#include "mx6_common.h"
#include <linux/sizes.h>
@ -28,8 +25,6 @@
#define CONFIG_REVISION_TAG
#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
#define CONFIG_MXC_UART
/* SATA Configs */
#ifdef CONFIG_CMD_SATA
#define CONFIG_SYS_SATA_MAX_DEVICE 1
@ -64,7 +59,7 @@
"setenv netmask 255.255.255.0; setenv ethaddr ca:fe:de:ca:f0:11; " \
"setenv bootargs root=/dev/nfs nfsroot=${nfsserver}:/srv/nfs/,v3,tcp rw rootwait" \
"setenv bootargs $bootargs ip=${ipaddr}:${nfsserver}:${gatewayip}:${netmask}::eth0:off " \
"setenv bootargs $bootargs cma=128M bootcause=POR console=${console} ${videoargs} " \
"setenv bootargs $bootargs cma=128M bootcause=POR ${videoargs} " \
"setenv bootargs $bootargs systemd.mask=helix-network-defaults.service " \
"setenv bootargs $bootargs watchdog.handle_boot_enabled=1\0" \
"networkboot=" \
@ -89,11 +84,10 @@
"devnum=2\0" \
"rootdev=mmcblk0p\0" \
"quiet=quiet loglevel=0\0" \
"console=" CONSOLE_DEV "\0" \
"setargs=setenv bootargs root=/dev/${rootdev}${partnum} " \
"ro rootwait cma=128M " \
"bootcause=${bootcause} " \
"${quiet} console=${console} " \
"${quiet} " \
"${videoargs}" "\0" \
"doquiet=" \
"if ext2load ${dev} ${devnum}:5 0x7000A000 /boot/console; " \