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arm: dts: socfpga: Increase the spi-max-frequency for QSPI flash

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With a working QSPI calibration, the SCLK can now run up to 100MHz

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Vikas Manocha <vikas.manocha@st.com>
Cc: Jagannadh Teki <jteki@openedev.com>
Cc: Pavel Machek <pavel@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jteki@openedev.com>
This commit is contained in:
Chin Liang See 2015-10-17 08:32:56 -05:00 committed by Marek Vasut
parent 4e609b6cb1
commit a55f28624e
1 changed files with 1 additions and 1 deletions
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2
arch/arm/dts/socfpga_cyclone5_socdk.dts
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@ -89,7 +89,7 @@
#size-cells = <1>;
compatible = "n25q00";
reg = <0>; /* chip select */
spi-max-frequency = <50000000>;
spi-max-frequency = <100000000>;
m25p,fast-read;
page-size = <256>;
block-size = <16>; /* 2^16, 64KB */