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Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xx

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This commit is contained in:
Detlev Zundel 2008-06-30 15:35:34 +02:00
commit a524e112b4
8 changed files with 27 additions and 4 deletions
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1
board/amirix/ap1000/serial.c
View File

@ -19,6 +19,7 @@
*
*/
#include <asm/types.h>
#include <asm/u-boot.h>
#include <asm/processor.h>
#include <common.h>

1
board/exbitgen/exbitgen.c
View File

@ -1,3 +1,4 @@
#include <asm/types.h>
#include <asm/u-boot.h>
#include <asm/processor.h>
#include <common.h>

1
board/exbitgen/flash.c
View File

@ -28,6 +28,7 @@
* Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
*/
#include <asm/types.h>
#include <asm/u-boot.h>
#include <asm/processor.h>
#include <ppc4xx.h>

1
board/ml2/serial.c
View File

@ -19,6 +19,7 @@
*
*/
#include <asm/types.h>
#include <asm/u-boot.h>
#include <asm/processor.h>
#include <common.h>

1
board/xilinx/ml300/serial.c
View File

@ -36,6 +36,7 @@
*
*/
#include <asm/types.h>
#include <asm/u-boot.h>
#include <asm/processor.h>
#include <common.h>

20
cpu/ppc4xx/cpu_init.c
View File

@ -138,8 +138,8 @@ void reconfigure_pll(u32 new_cpu_freq)
void
cpu_init_f (void)
{
#if defined(CONFIG_WATCHDOG)
unsigned long val;
#if defined(CONFIG_WATCHDOG) || defined(CONFIG_460EX)
u32 val;
#endif
reconfigure_pll(CFG_PLL_RECONFIG);
@ -272,6 +272,22 @@ cpu_init_f (void)
reset_4xx_watchdog();
#endif /* CONFIG_WATCHDOG */
#if defined(CONFIG_460EX)
/*
* Set SDR0_AHB_CFG[A2P_INCR4] (bit 24) and
* clear SDR0_AHB_CFG[A2P_PROT2] (bit 25) for a new 460EX errata
* regarding concurrent use of AHB USB OTG, USB 2.0 host and SATA
*/
mfsdr(SDR0_AHB_CFG, val);
val |= 0x80;
val &= ~0x40;
mtsdr(SDR0_AHB_CFG, val);
mfsdr(SDR0_USB2HOST_CFG, val);
val &= ~0xf00;
val |= 0x400;
mtsdr(SDR0_USB2HOST_CFG, val);
#endif /* CONFIG_460EX */
}
/*

4
cpu/ppc4xx/gpio.c
View File

@ -1,5 +1,5 @@
/*
* (C) Copyright 2007
* (C) Copyright 2007-2008
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* See file CREDITS for list of people who contributed to this
@ -52,7 +52,7 @@ void gpio_config(int pin, int in_out, int gpio_alt, int out_val)
}
mask = 0x80000000 >> pin;
mask2 = 0xc0000000 >> (pin2 << 1);
mask2 = 0xc0000000 >> pin2;
/* first set TCR to 0 */
out_be32((void *)GPIO0_TCR + offs, in_be32((void *)GPIO0_TCR + offs) & ~mask);

2
include/ppc440.h
View File

@ -2471,6 +2471,8 @@
#define AHB_TOP 0xA4
#define AHB_BOT 0xA5
#define SDR0_AHB_CFG 0x370
#define SDR0_USB2HOST_CFG 0x371
#endif /* CONFIG_460EX || CONFIG_460GT */
#define SDR0_SDCS_SDD (0x80000000 >> 31)