diff --git a/arch/x86/cpu/apollolake/cpu.c b/arch/x86/cpu/apollolake/cpu.c
index 3d05c82a5c..aa7a3dbd63 100644
--- a/arch/x86/cpu/apollolake/cpu.c
+++ b/arch/x86/cpu/apollolake/cpu.c
@@ -14,15 +14,10 @@ static int apl_get_info(struct udevice *dev, struct cpu_info *info)
 	return cpu_intel_get_info(info, INTEL_BCLK_MHZ);
 }
 
-static int apl_get_count(struct udevice *dev)
-{
-	return 4;
-}
-
 static const struct cpu_ops cpu_x86_apl_ops = {
 	.get_desc	= cpu_x86_get_desc,
 	.get_info	= apl_get_info,
-	.get_count	= apl_get_count,
+	.get_count	= cpu_x86_get_count,
 	.get_vendor	= cpu_x86_get_vendor,
 };
 
diff --git a/arch/x86/cpu/cpu_x86.c b/arch/x86/cpu/cpu_x86.c
index 1aaf851bb4..3f2ba0881e 100644
--- a/arch/x86/cpu/cpu_x86.c
+++ b/arch/x86/cpu/cpu_x86.c
@@ -52,7 +52,7 @@ int cpu_x86_get_desc(struct udevice *dev, char *buf, int size)
 	return 0;
 }
 
-static int cpu_x86_get_count(struct udevice *dev)
+int cpu_x86_get_count(struct udevice *dev)
 {
 	int node, cpu;
 	int num = 0;
diff --git a/arch/x86/cpu/intel_common/p2sb.c b/arch/x86/cpu/intel_common/p2sb.c
index b72f50a627..d5b4846e0a 100644
--- a/arch/x86/cpu/intel_common/p2sb.c
+++ b/arch/x86/cpu/intel_common/p2sb.c
@@ -16,7 +16,7 @@
 
 struct p2sb_platdata {
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
-	struct dtd_intel_apl_p2sb dtplat;
+	struct dtd_intel_p2sb dtplat;
 #endif
 	ulong mmio_base;
 	pci_dev_t bdf;
@@ -43,14 +43,14 @@ struct p2sb_platdata {
 #define P2SB_HPTC_ADDRESS_SELECT_3		(3 << 0)
 
 /*
- * apl_p2sb_early_init() - Enable decoding for HPET range
+ * p2sb_early_init() - Enable decoding for HPET range
  *
  * This is needed by FSP-M which uses the High Precision Event Timer.
  *
  * @dev: P2SB device
  * @return 0 if OK, -ve on error
  */
-static int apl_p2sb_early_init(struct udevice *dev)
+static int p2sb_early_init(struct udevice *dev)
 {
 	struct p2sb_platdata *plat = dev_get_platdata(dev);
 	pci_dev_t pdev = plat->bdf;
@@ -76,7 +76,7 @@ static int apl_p2sb_early_init(struct udevice *dev)
 	return 0;
 }
 
-static int apl_p2sb_spl_init(struct udevice *dev)
+static int p2sb_spl_init(struct udevice *dev)
 {
 	/* Enable decoding for HPET. Needed for FSP global pointer storage */
 	dm_pci_write_config(dev, P2SB_HPTC, P2SB_HPTC_ADDRESS_SELECT_0 |
@@ -85,7 +85,7 @@ static int apl_p2sb_spl_init(struct udevice *dev)
 	return 0;
 }
 
-int apl_p2sb_ofdata_to_platdata(struct udevice *dev)
+int p2sb_ofdata_to_platdata(struct udevice *dev)
 {
 	struct p2sb_uc_priv *upriv = dev_get_uclass_priv(dev);
 	struct p2sb_platdata *plat = dev_get_platdata(dev);
@@ -117,10 +117,10 @@ int apl_p2sb_ofdata_to_platdata(struct udevice *dev)
 	return 0;
 }
 
-static int apl_p2sb_probe(struct udevice *dev)
+static int p2sb_probe(struct udevice *dev)
 {
 	if (spl_phase() == PHASE_TPL) {
-		return apl_p2sb_early_init(dev);
+		return p2sb_early_init(dev);
 	} else {
 		struct p2sb_platdata *plat = dev_get_platdata(dev);
 
@@ -130,7 +130,7 @@ static int apl_p2sb_probe(struct udevice *dev)
 			return -EINVAL;
 
 		if (spl_phase() == PHASE_SPL)
-			return apl_p2sb_spl_init(dev);
+			return p2sb_spl_init(dev);
 	}
 
 	return 0;
@@ -152,17 +152,17 @@ static int p2sb_child_post_bind(struct udevice *dev)
 	return 0;
 }
 
-static const struct udevice_id apl_p2sb_ids[] = {
-	{ .compatible = "intel,apl-p2sb" },
+static const struct udevice_id p2sb_ids[] = {
+	{ .compatible = "intel,p2sb" },
 	{ }
 };
 
-U_BOOT_DRIVER(apl_p2sb_drv) = {
-	.name		= "intel_apl_p2sb",
+U_BOOT_DRIVER(p2sb_drv) = {
+	.name		= "intel_p2sb",
 	.id		= UCLASS_P2SB,
-	.of_match	= apl_p2sb_ids,
-	.probe		= apl_p2sb_probe,
-	.ofdata_to_platdata = apl_p2sb_ofdata_to_platdata,
+	.of_match	= p2sb_ids,
+	.probe		= p2sb_probe,
+	.ofdata_to_platdata = p2sb_ofdata_to_platdata,
 	.platdata_auto_alloc_size = sizeof(struct p2sb_platdata),
 	.per_child_platdata_auto_alloc_size =
 		sizeof(struct p2sb_child_platdata),
diff --git a/arch/x86/cpu/start.S b/arch/x86/cpu/start.S
index 26cf995db2..01524635e9 100644
--- a/arch/x86/cpu/start.S
+++ b/arch/x86/cpu/start.S
@@ -50,7 +50,7 @@ _x86boot_start:
 	movl	%cr0, %eax
 	orl	$(X86_CR0_NW | X86_CR0_CD), %eax
 	movl	%eax, %cr0
-	invd
+	wbinvd
 
 	/*
 	 * Zero the BIST (Built-In Self Test) value since we don't have it.
diff --git a/arch/x86/cpu/start16.S b/arch/x86/cpu/start16.S
index 292e750508..54f4ff6662 100644
--- a/arch/x86/cpu/start16.S
+++ b/arch/x86/cpu/start16.S
@@ -28,7 +28,7 @@ start16:
 	movl	%cr0, %eax
 	orl	$(X86_CR0_NW | X86_CR0_CD), %eax
 	movl	%eax, %cr0
-	invd
+	wbinvd
 
 	/* load the temporary Global Descriptor Table */
 data32 cs	lidt	idt_ptr
diff --git a/arch/x86/dts/chromebook_coral.dts b/arch/x86/dts/chromebook_coral.dts
index 44a4619a66..af52e11c89 100644
--- a/arch/x86/dts/chromebook_coral.dts
+++ b/arch/x86/dts/chromebook_coral.dts
@@ -136,7 +136,7 @@
 		p2sb: p2sb@d,0 {
 			u-boot,dm-pre-reloc;
 			reg = <0x02006810 0 0 0 0>;
-			compatible = "intel,apl-p2sb";
+			compatible = "intel,p2sb";
 			early-regs = <IOMAP_P2SB_BAR 0x100000>;
 
 			n {
diff --git a/arch/x86/include/asm/cpu_x86.h b/arch/x86/include/asm/cpu_x86.h
index 19223f2c3b..ae8f4dcd5d 100644
--- a/arch/x86/include/asm/cpu_x86.h
+++ b/arch/x86/include/asm/cpu_x86.h
@@ -30,6 +30,18 @@ int cpu_x86_bind(struct udevice *dev);
  */
 int cpu_x86_get_desc(struct udevice *dev, char *buf, int size);
 
+/**
+ * cpu_x86_get_count() - Get the number of cores for an x86 CPU
+ *
+ * This function is suitable to use as the get_count() method for
+ * the CPU uclass.
+ *
+ * @dev:	Device to check (UCLASS_CPU)
+ * @return:	Number of cores if successful,
+ *		-ENOENT if not "/cpus" entry is found in the device tree
+ */
+int cpu_x86_get_count(struct udevice *dev);
+
 /**
  * cpu_x86_get_vendor() - Get a vendor string for an x86 CPU
  *
diff --git a/arch/x86/lib/mrccache.c b/arch/x86/lib/mrccache.c
index 8914960226..d1c44f290c 100644
--- a/arch/x86/lib/mrccache.c
+++ b/arch/x86/lib/mrccache.c
@@ -241,6 +241,8 @@ int mrccache_get_region(enum mrc_type_t type, struct udevice **devp,
 	 * memory map cannot be read.
 	 */
 	ret = uclass_find_first_device(UCLASS_SPI_FLASH, &dev);
+	if (!ret && !dev)
+		ret = -ENODEV;
 	if (ret)
 		return log_msg_ret("Cannot find SPI flash\n", ret);
 	ret = dm_spi_get_mmap(dev, &map_base, &map_size, &offset);
diff --git a/board/toradex/apalis-imx8/MAINTAINERS b/board/toradex/apalis-imx8/MAINTAINERS
index c9ac58b47b..feacf7eded 100644
--- a/board/toradex/apalis-imx8/MAINTAINERS
+++ b/board/toradex/apalis-imx8/MAINTAINERS
@@ -6,4 +6,5 @@ F:	arch/arm/dts/fsl-imx8-apalis.dts
 F:	arch/arm/dts/fsl-imx8-apalis-u-boot.dtsi
 F:	board/toradex/apalis-imx8/
 F:	configs/apalis-imx8qm_defconfig
+F:	doc/board/toradex/apalix-imx8.rst
 F:	include/configs/apalis-imx8.h
diff --git a/board/toradex/apalis-imx8/README b/board/toradex/apalis-imx8/README
deleted file mode 100644
index e6e3dcb367..0000000000
--- a/board/toradex/apalis-imx8/README
+++ /dev/null
@@ -1,66 +0,0 @@
-U-Boot for the Toradex Apalis iMX8QM V1.0B Module
-
-Quick Start
-===========
-
-- Build the ARM trusted firmware binary
-- Get scfw_tcm.bin and ahab-container.img
-- Build U-Boot
-- Load U-Boot binary using uuu
-- Flash U-Boot binary into the eMMC
-- Boot
-
-Get and Build the ARM Trusted Firmware
-======================================
-
-$ git clone -b imx_4.14.78_1.0.0_ga https://source.codeaurora.org/external/imx/imx-atf
-$ cd imx-atf/
-$ make PLAT=imx8qm bl31
-
-Get scfw_tcm.bin and ahab-container.img
-=======================================
-
-$ wget https://github.com/toradex/meta-fsl-bsp-release/blob/toradex-sumo-4.14.78-1.0.0_ga-bringup/imx/meta-bsp/recipes-bsp/imx-sc-firmware/files/mx8qm-apalis-scfw-tcm.bin?raw=true
-$ mv mx8qm-apalis-scfw-tcm.bin\?raw\=true mx8qm-apalis-scfw-tcm.bin
-$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.0.bin
-$ chmod +x firmware-imx-8.0.bin
-$ ./firmware-imx-8.0.bin
-
-Copy the following binaries to the U-Boot folder:
-
-$ cp imx-atf/build/imx8qm/release/bl31.bin .
-$ cp u-boot/u-boot.bin .
-
-Copy the following firmware to the U-Boot folder:
-
-$ cp firmware-imx-8.0/firmware/seco/ahab-container.img .
-
-Build U-Boot
-============
-
-$ make apalis-imx8qm_defconfig
-$ make u-boot-dtb.imx
-
-Load the U-Boot Binary Using UUU
-================================
-
-Get the latest version of the universal update utility (uuu) aka mfgtools 3.0:
-
-https://community.nxp.com/external-link.jspa?url=https%3A%2F%2Fgithub.com%2FNXPmicro%2Fmfgtools%2Freleases
-
-Put the module into USB recovery aka serial downloader mode, connect USB device
-to your host and execute uuu:
-
-sudo ./uuu u-boot/u-boot-dtb.imx
-
-Flash the U-Boot Binary into the eMMC
-=====================================
-
-Burn the u-boot-dtb.imx binary to the primary eMMC hardware boot area partition:
-
-load mmc 1:1 $loadaddr u-boot-dtb.imx
-setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt ${blkcnt} / 0x200
-mmc dev 0 1
-mmc write ${loadaddr} 0x0 ${blkcnt}
-
-Boot
diff --git a/board/toradex/colibri-imx8x/MAINTAINERS b/board/toradex/colibri-imx8x/MAINTAINERS
index e91b9975c2..f6853586c8 100644
--- a/board/toradex/colibri-imx8x/MAINTAINERS
+++ b/board/toradex/colibri-imx8x/MAINTAINERS
@@ -6,4 +6,5 @@ F:	arch/arm/dts/fsl-imx8x-colibri.dts
 F:	arch/arm/dts/fsl-imx8x-colibri-u-boot.dtsi
 F:	board/toradex/colibri-imx8x/
 F:	configs/colibri-imx8qxp_defconfig
+F:	doc/board/toradex/colibri-imx8x.rst
 F:	include/configs/colibri-imx8x.h
diff --git a/board/toradex/colibri-imx8x/README b/board/toradex/colibri-imx8x/README
deleted file mode 100644
index 708bb3e51c..0000000000
--- a/board/toradex/colibri-imx8x/README
+++ /dev/null
@@ -1,66 +0,0 @@
-U-Boot for the Toradex Colibri iMX8QXP V1.0B Module
-
-Quick Start
-===========
-
-- Build the ARM trusted firmware binary
-- Get scfw_tcm.bin and ahab-container.img
-- Build U-Boot
-- Load U-Boot binary using uuu
-- Flash U-Boot binary into the eMMC
-- Boot
-
-Get and Build the ARM Trusted Firmware
-======================================
-
-$ git clone -b imx_4.14.78_1.0.0_ga https://source.codeaurora.org/external/imx/imx-atf
-$ cd imx-atf/
-$ make PLAT=imx8qxp bl31
-
-Get scfw_tcm.bin and ahab-container.img
-=======================================
-
-$ wget https://github.com/toradex/meta-fsl-bsp-release/blob/toradex-sumo-4.14.78-1.0.0_ga-bringup/imx/meta-bsp/recipes-bsp/imx-sc-firmware/files/mx8qx-colibri-scfw-tcm.bin?raw=true
-$ mv mx8qx-colibri-scfw-tcm.bin\?raw\=true mx8qx-colibri-scfw-tcm.bin
-$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.0.bin
-$ chmod +x firmware-imx-8.0.bin
-$ ./firmware-imx-8.0.bin
-
-Copy the following binaries to the U-Boot folder:
-
-$ cp imx-atf/build/imx8qxp/release/bl31.bin .
-$ cp u-boot/u-boot.bin .
-
-Copy the following firmware to the U-Boot folder:
-
-$ cp firmware-imx-8.0/firmware/seco/ahab-container.img .
-
-Build U-Boot
-============
-
-$ make colibri-imx8qxp_defconfig
-$ make u-boot-dtb.imx
-
-Load the U-Boot Binary Using UUU
-================================
-
-Get the latest version of the universal update utility (uuu) aka mfgtools 3.0:
-
-https://community.nxp.com/external-link.jspa?url=https%3A%2F%2Fgithub.com%2FNXPmicro%2Fmfgtools%2Freleases
-
-Put the module into USB recovery aka serial downloader mode, connect USB device
-to your host and execute uuu:
-
-sudo ./uuu u-boot/u-boot-dtb.imx
-
-Flash the U-Boot Binary into the eMMC
-=====================================
-
-Burn the u-boot-dtb.imx binary to the primary eMMC hardware boot area partition:
-
-load mmc 1:1 $loadaddr u-boot-dtb.imx
-setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt ${blkcnt} / 0x200
-mmc dev 0 1
-mmc write ${loadaddr} 0x0 ${blkcnt}
-
-Boot
diff --git a/board/toradex/colibri_imx7/MAINTAINERS b/board/toradex/colibri_imx7/MAINTAINERS
index 178dece797..82246be160 100644
--- a/board/toradex/colibri_imx7/MAINTAINERS
+++ b/board/toradex/colibri_imx7/MAINTAINERS
@@ -4,6 +4,7 @@ W:	http://developer.toradex.com/software/linux/linux-software
 W:	https://www.toradex.com/community
 S:	Maintained
 F:	board/toradex/colibri_imx7/
+F:	doc/board/toradex/colibri_imx7.rst
 F:	include/configs/colibri_imx7.h
 F:	configs/colibri_imx7_defconfig
 F:	configs/colibri_imx7_emmc_defconfig
diff --git a/board/toradex/verdin-imx8mm/MAINTAINERS b/board/toradex/verdin-imx8mm/MAINTAINERS
index 3b4fae5c66..2495696e9d 100644
--- a/board/toradex/verdin-imx8mm/MAINTAINERS
+++ b/board/toradex/verdin-imx8mm/MAINTAINERS
@@ -6,4 +6,5 @@ F:	arch/arm/dts/imx8mm-verdin.dts
 F:	arch/arm/dts/imx8mm-verdin-u-boot.dtsi
 F:	board/toradex/verdin-imx8mm/
 F:	configs/verdin-imx8mm_defconfig
+F:	doc/board/toradex/verdin-imx8mm.rst
 F:	include/configs/verdin-imx8mm.h
diff --git a/board/toradex/verdin-imx8mm/README b/board/toradex/verdin-imx8mm/README
deleted file mode 100644
index 1dac969476..0000000000
--- a/board/toradex/verdin-imx8mm/README
+++ /dev/null
@@ -1,88 +0,0 @@
-U-Boot for the Toradex Verdin iMX8M Mini Module
-
-Quick Start
-===========
-
-- Build the ARM trusted firmware binary
-- Get the DDR firmware
-- Build U-Boot
-- Flash to eMMC
-- Boot
-
-Get and Build the ARM Trusted Firmware (Trusted Firmware A)
-===========================================================
-
-$ echo "Downloading and building TF-A..."
-$ git clone -b imx_4.14.98_2.3.0 https://source.codeaurora.org/external/imx/imx-atf
-$ cd imx-atf
-
-Please edit `plat/imx/imx8mm/include/platform_def.h` so it contains proper
-values for UART configuration and BL31 base address (correct values listed
-below):
-#define BL31_BASE		0x910000
-#define IMX_BOOT_UART_BASE	0x30860000
-#define DEBUG_CONSOLE		1
-
-Then build ATF (TF-A):
-$ make PLAT=imx8mm bl31
-
-Get the DDR Firmware
-====================
-
-$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.4.1.bin
-$ chmod +x firmware-imx-8.4.1.bin
-$ ./firmware-imx-8.4.1.bin
-$ cp firmware-imx-8.4.1/firmware/ddr/synopsys/lpddr4*.bin ./
-
-Build U-Boot
-============
-
-$ export CROSS_COMPILE=aarch64-linux-gnu-
-$ make verdin-imx8mm_defconfig
-$ make flash.bin
-
-Flash to eMMC
-=============
-
-> tftpboot ${loadaddr} flash.bin
-> setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt ${blkcnt} / 0x200
-> mmc dev 0 1 && mmc write ${loadaddr} 0x2 ${blkcnt}
-
-As a convenience, instead of the last two commands one may also use the update
-U-Boot wrapper:
-> run update_uboot
-
-Boot
-====
-
-ATF, U-boot proper and u-boot.dtb images are packed into FIT image,
-which is loaded and parsed by SPL.
-
-Boot sequence is:
-SPL ---> ATF (TF-A) ---> U-boot proper
-
-Output:
-U-Boot SPL 2020.01-00187-gd411d164e5 (Jan 26 2020 - 04:47:26 +0100)
-Normal Boot
-Trying to boot from MMC1
-NOTICE:  Configuring TZASC380
-NOTICE:  RDC off
-NOTICE:  BL31: v2.0(release):rel_imx_4.14.98_2.3.0-0-g09c5cc994-dirty
-NOTICE:  BL31: Built : 01:11:41, Jan 25 2020
-NOTICE:  sip svc init
-
-
-U-Boot 2020.01-00187-gd411d164e5 (Jan 26 2020 - 04:47:26 +0100)
-
-CPU:   Freescale i.MX8MMQ rev1.0 at 0 MHz
-Reset cause: POR
-DRAM:  2 GiB
-MMC:   FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
-Loading Environment from MMC... OK
-In:    serial
-Out:   serial
-Err:   serial
-Model: Toradex Verdin iMX8M Mini Quad 2GB Wi-Fi / BT IT V1.0A, Serial# 06535149
-Net:   eth0: ethernet@30be0000
-Hit any key to stop autoboot:  0
-Verdin iMX8MM #
diff --git a/doc/board/google/chromebook_coral.rst b/doc/board/google/chromebook_coral.rst
index d10e0c4954..40bd9397d4 100644
--- a/doc/board/google/chromebook_coral.rst
+++ b/doc/board/google/chromebook_coral.rst
@@ -179,7 +179,7 @@ Partial memory map
     ffffffff       Top of ROM (and last byte of 32-bit address space)
     ffff8000       TPL loaded here (from IFWI)
     ff000000       Bottom of ROM
-     fefc000       Top of CAR region
+    fefc0000       Top of CAR region
     fef96000       Stack for FSP-M
     fef40000 59000 FSP-M
     fef11000       SPL loaded here
diff --git a/doc/board/index.rst b/doc/board/index.rst
index d43e536ca3..51a2ae6f28 100644
--- a/doc/board/index.rst
+++ b/doc/board/index.rst
@@ -17,4 +17,5 @@ Board-specific doc
    rockchip/index
    sifive/index
    st/index
+   toradex/index
    xilinx/index
diff --git a/doc/board/toradex/apalix-imx8.rst b/doc/board/toradex/apalix-imx8.rst
new file mode 100644
index 0000000000..4b7ea65d31
--- /dev/null
+++ b/doc/board/toradex/apalix-imx8.rst
@@ -0,0 +1,82 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Apalis iMX8QM V1.0B Module
+==========================
+
+Quick Start
+-----------
+
+- Build the ARM trusted firmware binary
+- Get scfw_tcm.bin and ahab-container.img
+- Build U-Boot
+- Load U-Boot binary using uuu
+- Flash U-Boot binary into the eMMC
+- Boot
+
+Get and Build the ARM Trusted Firmware
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone -b imx_4.14.78_1.0.0_ga https://source.codeaurora.org/external/imx/imx-atf
+    $ cd imx-atf/
+    $ make PLAT=imx8qm bl31
+
+Get scfw_tcm.bin and ahab-container.img
+---------------------------------------
+
+.. code-block:: bash
+
+    $ wget https://github.com/toradex/meta-fsl-bsp-release/blob/toradex-sumo-4.14.78-1.0.0_ga-bringup/imx/meta-bsp/recipes-
+      bsp/imx-sc-firmware/files/mx8qm-apalis-scfw-tcm.bin?raw=true
+    $ mv mx8qm-apalis-scfw-tcm.bin\?raw\=true mx8qm-apalis-scfw-tcm.bin
+    $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.0.bin
+    $ chmod +x firmware-imx-8.0.bin
+    $ ./firmware-imx-8.0.bin
+
+Copy the following binaries to the U-Boot folder:
+
+.. code-block:: bash
+
+    $ cp imx-atf/build/imx8qm/release/bl31.bin .
+    $ cp u-boot/u-boot.bin .
+
+Copy the following firmware to the U-Boot folder:
+
+.. code-block:: bash
+
+    $ cp firmware-imx-8.0/firmware/seco/ahab-container.img .
+
+Build U-Boot
+------------
+.. code-block:: bash
+
+    $ make apalis-imx8qm_defconfig
+    $ make u-boot-dtb.imx
+
+Load the U-Boot Binary Using UUU
+--------------------------------
+
+Get the latest version of the universal update utility (uuu) aka ``mfgtools 3.0``:
+
+https://community.nxp.com/external-link.jspa?url=https%3A%2F%2Fgithub.com%2FNXPmicro%2Fmfgtools%2Freleases
+
+Put the module into USB recovery aka serial downloader mode, connect USB device
+to your host and execute uuu:
+
+.. code-block:: bash
+
+    sudo ./uuu u-boot/u-boot-dtb.imx
+
+Flash the U-Boot Binary into the eMMC
+-------------------------------------
+
+Burn the ``u-boot-dtb.imx`` binary to the primary eMMC hardware boot area
+partition and boot:
+
+.. code-block:: bash
+
+    load mmc 1:1 $loadaddr u-boot-dtb.imx
+    setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt ${blkcnt} / 0x200
+    mmc dev 0 1
+    mmc write ${loadaddr} 0x0 ${blkcnt}
diff --git a/doc/board/toradex/colibri-imx8x.rst b/doc/board/toradex/colibri-imx8x.rst
new file mode 100644
index 0000000000..244e5a4c04
--- /dev/null
+++ b/doc/board/toradex/colibri-imx8x.rst
@@ -0,0 +1,82 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Colibri iMX8QXP V1.0B Module
+============================
+
+Quick Start
+-----------
+
+- Build the ARM trusted firmware binary
+- Get scfw_tcm.bin and ahab-container.img
+- Build U-Boot
+- Load U-Boot binary using uuu
+- Flash U-Boot binary into the eMMC
+- Boot
+
+Get and Build the ARM Trusted Firmware
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone -b imx_4.14.78_1.0.0_ga https://source.codeaurora.org/external/imx/imx-atf
+    $ cd imx-atf/
+    $ make PLAT=imx8qxp bl31
+
+Get scfw_tcm.bin and ahab-container.img
+---------------------------------------
+.. code-block:: bash
+
+    $ wget https://github.com/toradex/meta-fsl-bsp-release/blob/
+           toradex-sumo-4.14.78-1.0.0_ga-bringup/imx/meta-bsp/recipes-
+           bsp/imx-sc-firmware/files/mx8qx-colibri-scfw-tcm.bin?raw=true
+    $ mv mx8qx-colibri-scfw-tcm.bin\?raw\=true mx8qx-colibri-scfw-tcm.bin
+    $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.0.bin
+    $ chmod +x firmware-imx-8.0.bin
+    $ ./firmware-imx-8.0.bin
+
+Copy the following binaries to the U-Boot folder:
+
+.. code-block:: bash
+
+    $ cp imx-atf/build/imx8qxp/release/bl31.bin .
+    $ cp u-boot/u-boot.bin .
+
+Copy the following firmware to the U-Boot folder:
+
+.. code-block:: bash
+
+    $ cp firmware-imx-8.0/firmware/seco/ahab-container.img .
+
+Build U-Boot
+------------
+
+.. code-block:: bash
+
+   $ make colibri-imx8qxp_defconfig
+   $ make u-boot-dtb.imx
+
+Load the U-Boot Binary Using UUU
+--------------------------------
+
+Get the latest version of the universal update utility (uuu) aka ``mfgtools 3.0``:
+
+https://community.nxp.com/external-link.jspa?url=https%3A%2F%2Fgithub.com%2FNXPmicro%2Fmfgtools%2Freleases
+
+Put the module into USB recovery aka serial downloader mode, connect USB device
+to your host and execute ``uuu``:
+
+.. code-block:: bash
+
+    sudo ./uuu u-boot/u-boot-dtb.imx
+
+Flash the U-Boot Binary into the eMMC
+-------------------------------------
+
+Burn the ``u-boot-dtb.imx`` binary to the primary eMMC hardware boot area partition:
+
+.. code-block:: bash
+
+    load mmc 1:1 $loadaddr u-boot-dtb.imx
+    setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt ${blkcnt} / 0x200
+    mmc dev 0 1
+    mmc write ${loadaddr} 0x0 ${blkcnt}
diff --git a/doc/board/toradex/colibri_imx7.rst b/doc/board/toradex/colibri_imx7.rst
new file mode 100644
index 0000000000..6fb9526666
--- /dev/null
+++ b/doc/board/toradex/colibri_imx7.rst
@@ -0,0 +1,127 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Colibri iMX7
+============
+
+Quick Start
+-----------
+
+- Build U-Boot
+- NAND IMX image adjustments before flashing
+- Flashing manually U-Boot to eMMC
+- Flashing manually U-Boot to NAND
+- Using ``update_uboot`` script
+
+Build U-Boot
+------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=arm-linux-gnueabi-
+    $ export ARCH=arm
+    $ make colibri_imx7_emmc_defconfig # For NAND: colibri_imx7_defconfig
+    $ make
+
+After build succeeds, you will obtain final ``u-boot-dtb.imx`` IMX specific
+image, ready for flashing (but check next section for additional
+adjustments).
+
+Final IMX program image includes (section ``6.6.7`` from `IMX7DRM
+<https://www.nxp.com/webapp/Download?colCode=IMX7DRM>`_):
+
+* **Image vector table** (IVT) for BootROM
+* **Boot data** -indicates the program image location, program image size
+  in bytes, and the plugin flag.
+* **Device configuration data**
+* **User image**: U-Boot image (``u-boot-dtb.bin``)
+
+
+IMX image adjustments prior to flashing
+---------------------------------------
+
+1. U-Boot for both Colibri iMX7 NAND and eMMC versions
+is built with HABv4 support (`AN4581.pdf
+<https://www.nxp.com/docs/en/application-note/AN4581.pdf>`_)
+enabled by default, which requires to generate a proper
+Command Sequence File (CSF) by srktool from NXP (not included in the
+U-Boot tree, check additional details in introduction_habv4.txt)
+and concatenate it to the final ``u-boot-dtb.imx``.
+
+2. In case if you don't want to generate a proper ``CSF`` (for any reason),
+you still need to pad the IMX image so i has the same size as specified in
+in **Boot Data** section of IMX image.
+To obtain this value, run:
+
+.. code-block:: bash
+
+    $ od -X -N 0x30 u-boot-dtb.imx
+    0000000    402000d1 87800000 00000000 877ff42c
+    0000020    877ff420 877ff400 878a5000 00000000
+                        ^^^^^^^^
+    0000040    877ff000 000a8060 00000000 40b401d2
+               ^^^^^^^^ ^^^^^^^^
+
+Where:
+
+* ``877ff400`` - IVT self address
+* ``877ff000`` - Program image address
+* ``000a8060`` - Program image size
+
+To calculate the padding:
+
+* IVT offset = ``0x877ff400`` - ``0x877ff000`` = ``0x400``
+* Program image size = ``0xa8060`` - ``0x400`` = ``0xa7c60``
+
+and then pad the image:
+
+.. code-block:: bash
+
+    $ objcopy -I binary -O binary --pad-to 0xa7c60 --gap-fill=0x00 \
+        u-boot-dtb.imx u-boot-dtb.imx.zero-padded
+
+3. Also, according to requirement from ``6.6.7.1``, the final image
+should have ``0x400`` offset for initial IVT table.
+
+For eMMC setup we handle this by flashing it to ``0x400``, howewer
+for NAND setup we adjust the image prior to flashing, adding padding in the
+beginning of the image.
+
+.. code-block:: bash
+
+    $ dd if=u-boot-dtb.imx.zero-padded of=u-boot-dtb.imx.ready bs=1024 seek=1
+
+Flash U-Boot IMX image to eMMC
+------------------------------
+
+Flash the ``u-boot-dtb.imx.zero-padded`` binary to the primary eMMC hardware
+boot area partition:
+
+.. code-block:: bash
+
+
+    => load mmc 1:1 $loadaddr u-boot-dtb.imx.zero-padded
+    => setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt ${blkcnt} / 0x200
+    => mmc dev 0 1
+    => mmc write ${loadaddr} 0x2 ${blkcnt}
+
+Flash U-Boot IMX image to NAND
+------------------------------
+
+.. code-block:: bash
+
+    => load mmc 1:1 $loadaddr u-boot-dtb.imx.ready
+    => nand erase.part u-boot1
+    => nand write ${loadaddr} u-boot1 ${filesize}
+    => nand erase.part u-boot2
+    => nand write ${loadaddr} u-boot2 ${filesize}
+
+Using update_uboot script
+-------------------------
+
+You can also usb U-Boot env update_uboot script,
+which wraps all eMMC/NAND specific command invocation:
+
+.. code-block:: bash
+
+    => load mmc 1:1 $loadaddr u-boot-dtb.imx.ready
+    => run update_uboot
diff --git a/doc/board/toradex/index.rst b/doc/board/toradex/index.rst
new file mode 100644
index 0000000000..16b5a0770d
--- /dev/null
+++ b/doc/board/toradex/index.rst
@@ -0,0 +1,12 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Toradex
+=======
+
+.. toctree::
+   :maxdepth: 2
+
+   apalix-imx8
+   colibri_imx7
+   colibri-imx8x
+   verdin-imx8mm
diff --git a/doc/board/toradex/verdin-imx8mm.rst b/doc/board/toradex/verdin-imx8mm.rst
new file mode 100644
index 0000000000..b2ae4fabea
--- /dev/null
+++ b/doc/board/toradex/verdin-imx8mm.rst
@@ -0,0 +1,112 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Verdin iMX8M Mini Module
+========================
+
+Quick Start
+-----------
+
+- Build the ARM trusted firmware binary
+- Get the DDR firmware
+- Build U-Boot
+- Flash to eMMC
+- Boot
+
+Get and Build the ARM Trusted Firmware (Trusted Firmware A)
+-----------------------------------------------------------
+
+.. code-block:: bash
+
+    $ echo "Downloading and building TF-A..."
+    $ git clone -b imx_4.14.98_2.3.0 \
+      https://source.codeaurora.org/external/imx/imx-atf
+    $ cd imx-atf
+
+Please edit ``plat/imx/imx8mm/include/platform_def.h`` so it contains proper
+values for UART configuration and BL31 base address (correct values listed
+below):
+
+.. code-block:: bash
+
+    #define BL31_BASE                   0x910000
+    #define IMX_BOOT_UART_BASE          0x30860000
+    #define DEBUG_CONSOLE               1
+
+Then build ATF (TF-A):
+
+.. code-block:: bash
+
+    $ make PLAT=imx8mm bl31
+
+Get the DDR Firmware
+--------------------
+
+.. code-block:: bash
+
+    $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.4.1.bin
+    $ chmod +x firmware-imx-8.4.1.bin
+    $ ./firmware-imx-8.4.1.bin
+    $ cp firmware-imx-8.4.1/firmware/ddr/synopsys/lpddr4*.bin ./
+
+Build U-Boot
+------------
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-linux-gnu-
+    $ make verdin-imx8mm_defconfig
+    $ make flash.bin
+
+Flash to eMMC
+-------------
+
+.. code-block:: bash
+
+    > tftpboot ${loadaddr} flash.bin
+    > setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt ${blkcnt} / 0x200
+    > mmc dev 0 1 && mmc write ${loadaddr} 0x2 ${blkcnt}
+
+As a convenience, instead of the last two commands one may also use the update
+U-Boot wrapper:
+
+.. code-block:: bash
+
+    > run update_uboot
+
+Boot
+----
+
+ATF, U-Boot proper and u-boot.dtb images are packed into FIT image,
+which is loaded and parsed by SPL.
+
+Boot sequence is:
+
+* SPL ---> ATF (TF-A) ---> U-Boot proper
+
+Output:
+
+.. code-block:: bash
+
+    U-Boot SPL 2020.01-00187-gd411d164e5 (Jan 26 2020 - 04:47:26 +0100)
+    Normal Boot
+    Trying to boot from MMC1
+    NOTICE:  Configuring TZASC380
+    NOTICE:  RDC off
+    NOTICE:  BL31: v2.0(release):rel_imx_4.14.98_2.3.0-0-g09c5cc994-dirty
+    NOTICE:  BL31: Built : 01:11:41, Jan 25 2020
+    NOTICE:  sip svc init
+
+
+    U-Boot 2020.01-00187-gd411d164e5 (Jan 26 2020 - 04:47:26 +0100)
+
+    CPU:   Freescale i.MX8MMQ rev1.0 at 0 MHz
+    Reset cause: POR
+    DRAM:  2 GiB
+    MMC:   FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
+    Loading Environment from MMC... OK
+    In:    serial
+    Out:   serial
+    Err:   serial
+    Model: Toradex Verdin iMX8M Mini Quad 2GB Wi-Fi / BT IT V1.0A, Serial:
+    Net:   eth0: ethernet@30be0000
+    Hit any key to stop autoboot:  0
+    Verdin iMX8MM #
diff --git a/doc/device-tree-bindings/gpio/intel,apl-gpio.txt b/doc/device-tree-bindings/gpio/intel,apl-gpio.txt
index e27a40b437..cf0659b70e 100644
--- a/doc/device-tree-bindings/gpio/intel,apl-gpio.txt
+++ b/doc/device-tree-bindings/gpio/intel,apl-gpio.txt
@@ -23,7 +23,7 @@ Example:
 {
 	p2sb: p2sb@d,0 {
 		reg = <0x02006810 0 0 0 0>;
-		compatible = "intel,apl-p2sb";
+		compatible = "intel,p2sb";
 		early-regs = <IOMAP_P2SB_BAR 0x100000>;
 
 		north {
diff --git a/doc/device-tree-bindings/pinctrl/intel,apl-pinctrl.txt b/doc/device-tree-bindings/pinctrl/intel,apl-pinctrl.txt
index cd7f8a0ca3..12ec846107 100644
--- a/doc/device-tree-bindings/pinctrl/intel,apl-pinctrl.txt
+++ b/doc/device-tree-bindings/pinctrl/intel,apl-pinctrl.txt
@@ -23,7 +23,7 @@ Example:
 {
 	p2sb: p2sb@d,0 {
 		reg = <0x02006810 0 0 0 0>;
-		compatible = "intel,apl-p2sb";
+		compatible = "intel,p2sb";
 		early-regs = <IOMAP_P2SB_BAR 0x100000>;
 
 		n {
diff --git a/drivers/clk/intel/clk_intel.c b/drivers/clk/intel/clk_intel.c
index d2e15491a3..b633934d90 100644
--- a/drivers/clk/intel/clk_intel.c
+++ b/drivers/clk/intel/clk_intel.c
@@ -11,8 +11,6 @@
 
 static ulong intel_clk_get_rate(struct clk *clk)
 {
-	ulong rate;
-
 	switch (clk->id) {
 	case CLK_I2C:
 		/* Hard-coded to 133MHz on current platforms */
@@ -20,8 +18,6 @@ static ulong intel_clk_get_rate(struct clk *clk)
 	default:
 		return -ENODEV;
 	}
-
-	return rate;
 }
 
 static struct clk_ops intel_clk_ops = {
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 1fcbc35015..c1b303ffcb 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -479,12 +479,40 @@ static int ns16550_serial_getinfo(struct udevice *dev,
 	return 0;
 }
 
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+static int ns1655_serial_set_base_addr(struct udevice *dev)
+{
+	fdt_addr_t addr;
+	struct ns16550_platdata *plat;
+
+	plat = dev_get_platdata(dev);
+
+	addr = dev_read_addr_pci(dev);
+	if (addr == FDT_ADDR_T_NONE)
+		return -EINVAL;
+
+#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
+	plat->base = addr;
+#else
+	plat->base = (unsigned long)map_physmem(addr, 0, MAP_NOCACHE);
+#endif
+
+	return 0;
+}
+#endif
+
 int ns16550_serial_probe(struct udevice *dev)
 {
 	struct NS16550 *const com_port = dev_get_priv(dev);
 	struct reset_ctl_bulk reset_bulk;
 	int ret;
 
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+	ret = ns1655_serial_set_base_addr(dev);
+	if (ret)
+		return ret;
+#endif
+
 	ret = reset_get_bulk(dev, &reset_bulk);
 	if (!ret)
 		reset_deassert_bulk(&reset_bulk);
@@ -507,21 +535,9 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
 {
 	struct ns16550_platdata *plat = dev->platdata;
 	const u32 port_type = dev_get_driver_data(dev);
-	fdt_addr_t addr;
 	struct clk clk;
 	int err;
 
-	/* try Processor Local Bus device first */
-	addr = dev_read_addr_pci(dev);
-	if (addr == FDT_ADDR_T_NONE)
-		return -EINVAL;
-
-#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
-	plat->base = addr;
-#else
-	plat->base = (unsigned long)map_physmem(addr, 0, MAP_NOCACHE);
-#endif
-
 	plat->reg_offset = dev_read_u32_default(dev, "reg-offset", 0);
 	plat->reg_shift = dev_read_u32_default(dev, "reg-shift", 0);
 	plat->reg_width = dev_read_u32_default(dev, "reg-io-width", 1);