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sf: Divide flash register ops from QEB code

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QEB code comprises of couple of flash register read/write operations,
this patch moved flash register operations on to sf_op

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
This commit is contained in:
Jagannadha Sutradharudu Teki 2013-12-30 22:16:23 +05:30
parent 5bb30f1a40
commit 9f4322fd22
3 changed files with 77 additions and 53 deletions
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11
drivers/mtd/spi/sf_internal.h
View File

@ -101,14 +101,17 @@ int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
/* Flash erase(sectors) operation, support all possible erase commands */ /* Flash erase(sectors) operation, support all possible erase commands */
int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len); int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len);
/* Read the status register */
int spi_flash_cmd_read_status(struct spi_flash *flash, u8 *rs);
/* Program the status register */ /* Program the status register */
int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr); int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr);
/* Set quad enbale bit for macronix flashes */ /* Read the config register */
int spi_flash_set_qeb_mxic(struct spi_flash *flash); int spi_flash_cmd_read_config(struct spi_flash *flash, u8 *rc);
/* Set quad enbale bit for winbond and spansion flashes */ /* Program the config register */
int spi_flash_set_qeb_winspan(struct spi_flash *flash); int spi_flash_cmd_write_config(struct spi_flash *flash, u8 wc);
/* Enable writing on the SPI flash */ /* Enable writing on the SPI flash */
static inline int spi_flash_cmd_write_enable(struct spi_flash *flash) static inline int spi_flash_cmd_write_enable(struct spi_flash *flash)

75
drivers/mtd/spi/sf_ops.c
View File

@ -24,6 +24,21 @@ static void spi_flash_addr(u32 addr, u8 *cmd)
cmd[3] = addr >> 0; cmd[3] = addr >> 0;
} }
int spi_flash_cmd_read_status(struct spi_flash *flash, u8 *rs)
{
int ret;
u8 cmd;
cmd = CMD_READ_STATUS;
ret = spi_flash_read_common(flash, &cmd, 1, rs, 1);
if (ret < 0) {
debug("SF: fail to read status register\n");
return ret;
}
return 0;
}
int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr) int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr)
{ {
u8 cmd; u8 cmd;
@ -39,48 +54,34 @@ int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr)
return 0; return 0;
} }
#ifdef CONFIG_SPI_FLASH_MACRONIX #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
int spi_flash_set_qeb_mxic(struct spi_flash *flash) int spi_flash_cmd_read_config(struct spi_flash *flash, u8 *rc)
{ {
u8 qeb_status;
u8 cmd;
int ret; int ret;
u8 cmd;
cmd = CMD_READ_STATUS; cmd = CMD_READ_CONFIG;
ret = spi_flash_read_common(flash, &cmd, 1, &qeb_status, 1); ret = spi_flash_read_common(flash, &cmd, 1, rc, 1);
if (ret < 0) { if (ret < 0) {
debug("SF: fail to read status register\n"); debug("SF: fail to read config register\n");
return ret; return ret;
} }
if (qeb_status & STATUS_QEB_MXIC) { return 0;
debug("SF: Quad enable bit is already set\n");
} else {
ret = spi_flash_cmd_write_status(flash, STATUS_QEB_MXIC);
if (ret < 0)
return ret;
}
return ret;
} }
#endif
#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) int spi_flash_cmd_write_config(struct spi_flash *flash, u8 wc)
static int spi_flash_cmd_write_config(struct spi_flash *flash, u8 cr)
{ {
u8 data[2]; u8 data[2];
u8 cmd; u8 cmd;
int ret; int ret;
cmd = CMD_READ_STATUS; ret = spi_flash_cmd_read_status(flash, &data[0]);
ret = spi_flash_read_common(flash, &cmd, 1, &data[0], 1); if (ret < 0)
if (ret < 0) {
debug("SF: fail to read status register\n");
return ret; return ret;
}
cmd = CMD_WRITE_STATUS; cmd = CMD_WRITE_STATUS;
data[1] = cr; data[1] = wc;
ret = spi_flash_write_common(flash, &cmd, 1, &data, 2); ret = spi_flash_write_common(flash, &cmd, 1, &data, 2);
if (ret) { if (ret) {
debug("SF: fail to write config register\n"); debug("SF: fail to write config register\n");
@ -89,30 +90,6 @@ static int spi_flash_cmd_write_config(struct spi_flash *flash, u8 cr)
return 0; return 0;
} }
int spi_flash_set_qeb_winspan(struct spi_flash *flash)
{
u8 qeb_status;
u8 cmd;
int ret;
cmd = CMD_READ_CONFIG;
ret = spi_flash_read_common(flash, &cmd, 1, &qeb_status, 1);
if (ret < 0) {
debug("SF: fail to read config register\n");
return ret;
}
if (qeb_status & STATUS_QEB_WINSPAN) {
debug("SF: Quad enable bit is already set\n");
} else {
ret = spi_flash_cmd_write_config(flash, STATUS_QEB_WINSPAN);
if (ret < 0)
return ret;
}
return ret;
}
#endif #endif
#ifdef CONFIG_SPI_FLASH_BAR #ifdef CONFIG_SPI_FLASH_BAR

44
drivers/mtd/spi/sf_probe.c
View File

@ -28,6 +28,50 @@ static u8 spi_read_cmds_array[] = {
CMD_READ_QUAD_IO_FAST, CMD_READ_QUAD_IO_FAST,
}; };
#ifdef CONFIG_SPI_FLASH_MACRONIX
static int spi_flash_set_qeb_mxic(struct spi_flash *flash)
{
u8 qeb_status;
int ret;
ret = spi_flash_cmd_read_status(flash, &qeb_status);
if (ret < 0)
return ret;
if (qeb_status & STATUS_QEB_MXIC) {
debug("SF: mxic: QEB is already set\n");
} else {
ret = spi_flash_cmd_write_status(flash, STATUS_QEB_MXIC);
if (ret < 0)
return ret;
}
return ret;
}
#endif
#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
static int spi_flash_set_qeb_winspan(struct spi_flash *flash)
{
u8 qeb_status;
int ret;
ret = spi_flash_cmd_read_config(flash, &qeb_status);
if (ret < 0)
return ret;
if (qeb_status & STATUS_QEB_WINSPAN) {
debug("SF: winspan: QEB is already set\n");
} else {
ret = spi_flash_cmd_write_config(flash, STATUS_QEB_WINSPAN);
if (ret < 0)
return ret;
}
return ret;
}
#endif
static int spi_flash_set_qeb(struct spi_flash *flash, u8 idcode0) static int spi_flash_set_qeb(struct spi_flash *flash, u8 idcode0)
{ {
switch (idcode0) { switch (idcode0) {