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ppc4xx: lwmon5: Support for 128 MByte NOR FLASH added
The used Intel NOR FLASH chips have internally two dies, and are now treated as two seperate chips. Signed-off-by: Stefan Roese <sr@denx.de>
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@ -158,13 +158,13 @@ int misc_init_r(void)
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(void)flash_protect(FLAG_PROTECT_SET,
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(void)flash_protect(FLAG_PROTECT_SET,
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-CFG_MONITOR_LEN,
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-CFG_MONITOR_LEN,
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0xffffffff,
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0xffffffff,
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&flash_info[0]);
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&flash_info[1]);
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/* Env protection ON by default */
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/* Env protection ON by default */
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(void)flash_protect(FLAG_PROTECT_SET,
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(void)flash_protect(FLAG_PROTECT_SET,
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CFG_ENV_ADDR_REDUND,
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CFG_ENV_ADDR_REDUND,
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CFG_ENV_ADDR_REDUND + 2*CFG_ENV_SECT_SIZE - 1,
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CFG_ENV_ADDR_REDUND + 2*CFG_ENV_SECT_SIZE - 1,
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&flash_info[0]);
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&flash_info[1]);
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/*
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/*
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* USB suff...
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* USB suff...
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@ -46,7 +46,7 @@
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#define CFG_BOOT_BASE_ADDR 0xf0000000
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#define CFG_BOOT_BASE_ADDR 0xf0000000
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#define CFG_SDRAM_BASE 0x00000000 /* _must_ be 0 */
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#define CFG_SDRAM_BASE 0x00000000 /* _must_ be 0 */
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#define CFG_FLASH_BASE 0xfc000000 /* start of FLASH */
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#define CFG_FLASH_BASE 0xf8000000 /* start of FLASH */
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#define CFG_MONITOR_BASE TEXT_BASE
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#define CFG_MONITOR_BASE TEXT_BASE
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#define CFG_LIME_BASE_0 0xc0000000
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#define CFG_LIME_BASE_0 0xc0000000
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#define CFG_LIME_BASE_1 0xc1000000
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#define CFG_LIME_BASE_1 0xc1000000
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@ -105,9 +105,11 @@
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#define CFG_FLASH_CFI /* The flash is CFI compatible */
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#define CFG_FLASH_CFI /* The flash is CFI compatible */
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#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */
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#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */
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#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
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#define CFG_FLASH0 0xFC000000
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#define CFG_FLASH1 0xF8000000
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#define CFG_FLASH_BANKS_LIST { CFG_FLASH1, CFG_FLASH0 }
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#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
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#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
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#define CFG_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
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#define CFG_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
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#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
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#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
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@ -319,7 +321,7 @@
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/* Memory Bank 0 (NOR-FLASH) initialization */
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/* Memory Bank 0 (NOR-FLASH) initialization */
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#define CFG_EBC_PB0AP 0x03050200
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#define CFG_EBC_PB0AP 0x03050200
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#define CFG_EBC_PB0CR (CFG_FLASH | 0xdc000)
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#define CFG_EBC_PB0CR (CFG_FLASH | 0xfc000)
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/* Memory Bank 1 (Lime) initialization */
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/* Memory Bank 1 (Lime) initialization */
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#define CFG_EBC_PB1AP 0x01004380
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#define CFG_EBC_PB1AP 0x01004380
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