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82xx, mgcoge: updates for 2009.03

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- activate CS4 for accessing the FPGA
- activate Rx buf len > 1 on SMC
- pram activated
- MTDPARTS_DEFAULT defined
- update the size of the flashes in the DTS
  before booting Linux
- MONITOR_LEN updated to 384k
- added CONFIG_HOSTNAME
- added CONFIG_ENV_BUFFER_PRINT
- Environment size reduced to 16k

Signed-off-by: Heiko Schocher <hs@denx.de>
This commit is contained in:
Heiko Schocher 2009-02-19 17:23:58 +01:00 committed by Wolfgang Denk
parent df909554e2
commit 9e80bb2162
2 changed files with 35 additions and 4 deletions
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7
board/keymile/mgcoge/mgcoge.c
View File

@ -325,6 +325,7 @@ void ft_blob_update (void *blob, bd_t *bd)
{
ulong memory_data[2] = {0};
ulong flash_data[8] = {0};
flash_info_t *info;
memory_data[0] = cpu_to_be32 (bd->bi_memstart);
memory_data[1] = cpu_to_be32 (bd->bi_memsize);
@ -332,12 +333,14 @@ void ft_blob_update (void *blob, bd_t *bd)
sizeof (memory_data));
/* update Flash addr, size */
info = flash_get_info(CONFIG_SYS_FLASH_BASE);
flash_data[2] = cpu_to_be32 (CONFIG_SYS_FLASH_BASE);
flash_data[3] = cpu_to_be32 (CONFIG_SYS_FLASH_SIZE);
flash_data[3] = cpu_to_be32 (info->size);
flash_data[4] = cpu_to_be32 (5);
flash_data[5] = cpu_to_be32 (0);
info = flash_get_info(CONFIG_SYS_FLASH_BASE_1);
flash_data[6] = cpu_to_be32 (CONFIG_SYS_FLASH_BASE_1);
flash_data[7] = cpu_to_be32 (CONFIG_SYS_FLASH_SIZE_1);
flash_data[7] = cpu_to_be32 (info->size);
fdt_set_node_and_value (blob, "/localbus", "ranges", flash_data,
sizeof (flash_data));
/* MAC addr */

32
include/configs/mgcoge.h
View File

@ -32,6 +32,7 @@
#define CONFIG_MPC8247 1
#define CONFIG_MPC8272_FAMILY 1
#define CONFIG_MGCOGE 1
#define CONFIG_HOSTNAME mgcoge
#define CONFIG_CPM2 1 /* Has a CPM2 */
@ -49,6 +50,8 @@
#undef CONFIG_CONS_ON_SCC /* It's not on SCC */
#undef CONFIG_CONS_NONE /* It's not on external UART */
#define CONFIG_CONS_INDEX 2 /* SMC2 is used for console */
#define CONFIG_SYS_SMC_RXBUFLEN 128
#define CONFIG_SYS_MAXIDLE 10
/*
* Select ethernet configuration
@ -75,6 +78,14 @@
#define CONFIG_8260_CLKIN 66000000 /* in Hz */
#endif
#define BOOTFLASH_START FE000000
#define CONFIG_PRAM 512 /* protected RAM [KBytes] */
#define MTDIDS_DEFAULT "nor0=boot,nor1=app"
#define MTDPARTS_DEFAULT \
"mtdparts=boot:384k(u-boot),128k(env),128k(envred),3456k(free);" \
"app:3m(esw0),10m(rootfs0),3m(esw1),10m(rootfs1),1m(var),5m(cfg)"
/*
* Default environment settings
*/
@ -107,6 +118,8 @@
"tftp ${ramdisk_addr} ${ramdisk_file}; " \
"run ramargs addip; " \
"bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
"EEprom_ivm=pca9544a:70:4 \0" \
"mtdparts=" MK_STR(MTDPARTS_DEFAULT) "\0" \
""
#define CONFIG_SYS_SDRAM_BASE 0x00000000
@ -127,12 +140,12 @@
#define CONFIG_SYS_RAMBOOT
#endif
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256KB for Monitor */
#define CONFIG_SYS_MONITOR_LEN (384 << 10) /* Reserve 384KB for Monitor */
#define CONFIG_ENV_IS_IN_FLASH
#ifdef CONFIG_ENV_IS_IN_FLASH
#define CONFIG_ENV_SECT_SIZE 0x20000
#define CONFIG_ENV_SECT_SIZE 0x4000
#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
#define CONFIG_ENV_OFFSET CONFIG_SYS_MONITOR_LEN
@ -140,6 +153,7 @@
#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE)
#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
#endif /* CONFIG_ENV_IS_IN_FLASH */
#define CONFIG_ENV_BUFFER_PRINT 1
/* enable I2C and select the hardware/software driver */
#undef CONFIG_HARD_I2C /* I2C with hardware support */
@ -187,6 +201,8 @@
#define CONFIG_SYS_DTT_HYSTERESIS 3
#define CONFIG_SYS_DTT_BUS_NUM (CONFIG_SYS_MAX_I2C_BUS)
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_IMMR 0xF0000000
#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_IMMR
@ -333,6 +349,18 @@
ORxG_CSNT | ORxG_ACS_DIV2 |\
ORxG_SCY_3_CLK | ORxG_TRLX )
/* Board FPGA on CS4 initialization values
*/
#define CONFIG_SYS_FPGA_BASE 0x40000000
#define CONFIG_SYS_FPGA_SIZE 1 /*1KB*/
#define CONFIG_SYS_BR4_PRELIM ((CONFIG_SYS_FPGA_BASE & BRx_BA_MSK) |\
BRx_PS_8 | BRx_MS_GPCM_P | BRx_V)
#define CONFIG_SYS_OR4_PRELIM (P2SZ_TO_AM(CONFIG_SYS_FPGA_SIZE << 10) |\
ORxG_CSNT | ORxG_ACS_DIV2 |\
ORxG_SCY_3_CLK | ORxG_TRLX )
/* CFG-Flash on CS5 initialization values
*/
#define CONFIG_SYS_BR5_PRELIM ((CONFIG_SYS_FLASH_BASE_1 & BRx_BA_MSK) |\