drivers/net/vsc9953: Add default configuration for VSC9953 L2 Switch
At startup, the default configuration should be: - enable HW learning on all ports (HW default); - all ports are VLAN aware; - all ports are members of VLAN 1; - all ports have Port-based VLAN 1; - on all ports, the switch is allowed to remove maximum one VLAN tag, - on egress, the switch should add a VLAN tag if the frame is classified to a different VLAN than the port's Port-based VLAN; Signed-off-by: Johnson Leung <johnson.leung@freescale.com> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
This commit is contained in:
Codrin Ciubotariu
York Sun
parent
8756de2824
commit
9de059871f
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@ -10,6 +10,7 @@
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#include <asm/fsl_serdes.h>
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#include <fm_eth.h>
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#include <fsl_memac.h>
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#include <bitfield.h>
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#include <errno.h>
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#include <malloc.h>
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#include <vsc9953.h>
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@ -178,6 +179,256 @@ static int vsc9953_port_init(int port_no)
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return 0;
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}
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static int vsc9953_vlan_table_poll_idle(void)
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{
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struct vsc9953_analyzer *l2ana_reg;
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int timeout;
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l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
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VSC9953_ANA_OFFSET);
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timeout = 50000;
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while (((in_le32(&l2ana_reg->ana_tables.vlan_access) &
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VSC9953_VLAN_CMD_MASK) != VSC9953_VLAN_CMD_IDLE) && --timeout)
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udelay(1);
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return timeout ? 0 : -EBUSY;
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}
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/* vlan table set/clear all membership of vid */
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static void vsc9953_vlan_table_membership_all_set(int vid, int set_member)
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{
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uint val;
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struct vsc9953_analyzer *l2ana_reg;
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l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
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VSC9953_ANA_OFFSET);
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if (vsc9953_vlan_table_poll_idle() < 0) {
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debug("VLAN table timeout\n");
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return;
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}
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/* read current vlan configuration */
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val = in_le32(&l2ana_reg->ana_tables.vlan_tidx);
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out_le32(&l2ana_reg->ana_tables.vlan_tidx,
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bitfield_replace_by_mask(val, VSC9953_ANA_TBL_VID_MASK, vid));
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clrsetbits_le32(&l2ana_reg->ana_tables.vlan_access,
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VSC9953_VLAN_CMD_MASK, VSC9953_VLAN_CMD_READ);
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if (vsc9953_vlan_table_poll_idle() < 0) {
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debug("VLAN table timeout\n");
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return;
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}
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val = in_le32(&l2ana_reg->ana_tables.vlan_tidx);
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out_le32(&l2ana_reg->ana_tables.vlan_tidx,
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bitfield_replace_by_mask(val, VSC9953_ANA_TBL_VID_MASK, vid));
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clrsetbits_le32(&l2ana_reg->ana_tables.vlan_access,
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VSC9953_VLAN_PORT_MASK | VSC9953_VLAN_CMD_MASK,
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VSC9953_VLAN_CMD_WRITE |
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(set_member ? VSC9953_VLAN_PORT_MASK : 0));
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}
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/* Set PVID for a VSC9953 port */
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static void vsc9953_port_vlan_pvid_set(int port_no, int pvid)
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{
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uint val;
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struct vsc9953_analyzer *l2ana_reg;
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struct vsc9953_rew_reg *l2rew_reg;
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/* Administrative down */
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if (!vsc9953_l2sw.port[port_no].enabled) {
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printf("Port %d is administrative down\n", port_no);
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return;
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}
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l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
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VSC9953_ANA_OFFSET);
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l2rew_reg = (struct vsc9953_rew_reg *)(VSC9953_OFFSET +
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VSC9953_REW_OFFSET);
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/* Set PVID on ingress */
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val = in_le32(&l2ana_reg->port[port_no].vlan_cfg);
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val = bitfield_replace_by_mask(val, VSC9953_VLAN_CFG_VID_MASK, pvid);
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out_le32(&l2ana_reg->port[port_no].vlan_cfg, val);
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/* Set PVID on egress */
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val = in_le32(&l2rew_reg->port[port_no].port_vlan_cfg);
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val = bitfield_replace_by_mask(val, VSC9953_PORT_VLAN_CFG_VID_MASK,
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pvid);
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out_le32(&l2rew_reg->port[port_no].port_vlan_cfg, val);
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}
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static void vsc9953_port_all_vlan_pvid_set(int pvid)
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{
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int i;
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for (i = 0; i < VSC9953_MAX_PORTS; i++)
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vsc9953_port_vlan_pvid_set(i, pvid);
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}
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/* Enable/disable vlan aware of a VSC9953 port */
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static void vsc9953_port_vlan_aware_set(int port_no, int enabled)
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{
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struct vsc9953_analyzer *l2ana_reg;
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/* Administrative down */
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if (!vsc9953_l2sw.port[port_no].enabled) {
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printf("Port %d is administrative down\n", port_no);
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return;
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}
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l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
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VSC9953_ANA_OFFSET);
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if (enabled)
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setbits_le32(&l2ana_reg->port[port_no].vlan_cfg,
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VSC9953_VLAN_CFG_AWARE_ENA);
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else
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clrbits_le32(&l2ana_reg->port[port_no].vlan_cfg,
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VSC9953_VLAN_CFG_AWARE_ENA);
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}
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/* Set all VSC9953 ports' vlan aware */
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static void vsc9953_port_all_vlan_aware_set(int enabled)
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{
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int i;
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for (i = 0; i < VSC9953_MAX_PORTS; i++)
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vsc9953_port_vlan_aware_set(i, enabled);
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}
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/* Enable/disable vlan pop count of a VSC9953 port */
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static void vsc9953_port_vlan_popcnt_set(int port_no, int popcnt)
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{
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uint val;
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struct vsc9953_analyzer *l2ana_reg;
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/* Administrative down */
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if (!vsc9953_l2sw.port[port_no].enabled) {
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printf("Port %d is administrative down\n", port_no);
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return;
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}
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if (popcnt > 3 || popcnt < 0) {
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printf("Invalid pop count value: %d\n", port_no);
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return;
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}
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l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
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VSC9953_ANA_OFFSET);
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val = in_le32(&l2ana_reg->port[port_no].vlan_cfg);
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val = bitfield_replace_by_mask(val, VSC9953_VLAN_CFG_POP_CNT_MASK,
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popcnt);
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out_le32(&l2ana_reg->port[port_no].vlan_cfg, val);
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}
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/* Set all VSC9953 ports' pop count */
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static void vsc9953_port_all_vlan_poncnt_set(int popcnt)
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{
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int i;
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for (i = 0; i < VSC9953_MAX_PORTS; i++)
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vsc9953_port_vlan_popcnt_set(i, popcnt);
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}
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/* Enable/disable learning for frames dropped due to ingress filtering */
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static void vsc9953_vlan_ingr_fltr_learn_drop(int enable)
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{
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struct vsc9953_analyzer *l2ana_reg;
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l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
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VSC9953_ANA_OFFSET);
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if (enable)
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setbits_le32(&l2ana_reg->ana.adv_learn, VSC9953_VLAN_CHK);
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else
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clrbits_le32(&l2ana_reg->ana.adv_learn, VSC9953_VLAN_CHK);
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}
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/* Egress untag modes of a VSC9953 port */
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enum egress_untag_mode {
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EGRESS_UNTAG_ALL = 0,
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EGRESS_UNTAG_PVID_AND_ZERO,
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EGRESS_UNTAG_ZERO,
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EGRESS_UNTAG_NONE,
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};
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static void vsc9953_port_vlan_egr_untag_set(int port_no,
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enum egress_untag_mode mode)
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{
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struct vsc9953_rew_reg *l2rew_reg;
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/* Administrative down */
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if (!vsc9953_l2sw.port[port_no].enabled) {
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printf("Port %d is administrative down\n", port_no);
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return;
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}
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l2rew_reg = (struct vsc9953_rew_reg *)(VSC9953_OFFSET +
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VSC9953_REW_OFFSET);
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switch (mode) {
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case EGRESS_UNTAG_ALL:
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clrsetbits_le32(&l2rew_reg->port[port_no].port_tag_cfg,
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VSC9953_TAG_CFG_MASK, VSC9953_TAG_CFG_NONE);
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break;
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case EGRESS_UNTAG_PVID_AND_ZERO:
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clrsetbits_le32(&l2rew_reg->port[port_no].port_tag_cfg,
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VSC9953_TAG_CFG_MASK,
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VSC9953_TAG_CFG_ALL_BUT_PVID_ZERO);
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break;
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case EGRESS_UNTAG_ZERO:
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clrsetbits_le32(&l2rew_reg->port[port_no].port_tag_cfg,
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VSC9953_TAG_CFG_MASK,
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VSC9953_TAG_CFG_ALL_BUT_ZERO);
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break;
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case EGRESS_UNTAG_NONE:
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clrsetbits_le32(&l2rew_reg->port[port_no].port_tag_cfg,
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VSC9953_TAG_CFG_MASK, VSC9953_TAG_CFG_ALL);
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break;
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default:
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printf("Unknown untag mode for port %d\n", port_no);
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}
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}
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static void vsc9953_port_all_vlan_egress_untagged_set(
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enum egress_untag_mode mode)
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{
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int i;
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for (i = 0; i < VSC9953_MAX_PORTS; i++)
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vsc9953_port_vlan_egr_untag_set(i, mode);
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}
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/*****************************************************************************
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At startup, the default configuration would be:
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- HW learning enabled on all ports; (HW default)
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- All ports are in VLAN 1;
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- All ports are VLAN aware;
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- All ports have POP_COUNT 1;
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- All ports have PVID 1;
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- All ports have TPID 0x8100; (HW default)
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- All ports tag frames classified to all VLANs that are not PVID;
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*****************************************************************************/
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void vsc9953_default_configuration(void)
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{
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int i;
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for (i = 0; i < VSC9953_MAX_VLAN; i++)
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vsc9953_vlan_table_membership_all_set(i, 0);
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vsc9953_port_all_vlan_aware_set(1);
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vsc9953_port_all_vlan_pvid_set(1);
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vsc9953_port_all_vlan_poncnt_set(1);
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vsc9953_vlan_table_membership_all_set(1, 1);
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vsc9953_vlan_ingr_fltr_learn_drop(1);
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vsc9953_port_all_vlan_egress_untagged_set(EGRESS_UNTAG_PVID_AND_ZERO);
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}
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void vsc9953_init(bd_t *bis)
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{
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u32 i;
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@ -310,6 +561,8 @@ void vsc9953_init(bd_t *bis)
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}
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}
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vsc9953_default_configuration();
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printf("VSC9953 L2 switch initialized\n");
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return;
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}
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@ -21,6 +21,7 @@
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#define VSC9953_OFFSET (CONFIG_SYS_CCSRBAR_DEFAULT + 0x800000)
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#define VSC9953_SYS_OFFSET 0x010000
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#define VSC9953_REW_OFFSET 0x030000
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#define VSC9953_DEV_GMII_OFFSET 0x100000
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#define VSC9953_QSYS_OFFSET 0x200000
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#define VSC9953_ANA_OFFSET 0x280000
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@ -80,9 +81,38 @@
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#define VSC9953_VCAP_MV_CFG 0x0000ffff
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#define VSC9953_VCAP_UPDATE_CTRL 0x01000004
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/* Macros for vsc9953_ana_port.vlan_cfg register */
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#define VSC9953_VLAN_CFG_AWARE_ENA 0x00100000
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#define VSC9953_VLAN_CFG_POP_CNT_MASK 0x000c0000
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#define VSC9953_VLAN_CFG_VID_MASK 0x00000fff
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/* Macros for vsc9953_rew_port.port_vlan_cfg register */
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#define VSC9953_PORT_VLAN_CFG_VID_MASK 0x00000fff
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/* Macros for vsc9953_ana_ana_tables.vlan_tidx register */
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#define VSC9953_ANA_TBL_VID_MASK 0x00000fff
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/* Macros for vsc9953_ana_ana_tables.vlan_access register */
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#define VSC9953_VLAN_PORT_MASK 0x00001ffc
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#define VSC9953_VLAN_CMD_MASK 0x00000003
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#define VSC9953_VLAN_CMD_IDLE 0x00000000
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#define VSC9953_VLAN_CMD_READ 0x00000001
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#define VSC9953_VLAN_CMD_WRITE 0x00000002
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#define VSC9953_VLAN_CMD_INIT 0x00000003
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/* Macros for vsc9953_qsys_sys.switch_port_mode register */
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#define VSC9953_PORT_ENA 0x00002000
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/* Macros for vsc9953_ana_ana.adv_learn register */
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#define VSC9953_VLAN_CHK 0x00000400
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/* Macros for vsc9953_rew_port.port_tag_cfg register */
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#define VSC9953_TAG_CFG_MASK 0x00000180
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#define VSC9953_TAG_CFG_NONE 0x00000000
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#define VSC9953_TAG_CFG_ALL_BUT_PVID_ZERO 0x00000080
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#define VSC9953_TAG_CFG_ALL_BUT_ZERO 0x00000100
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#define VSC9953_TAG_CFG_ALL 0x00000180
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#define VSC9953_MAX_PORTS 10
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#define VSC9953_PORT_CHECK(port) \
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(((port) < 0 || (port) >= VSC9953_MAX_PORTS) ? 0 : 1)
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@ -91,6 +121,9 @@
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(port) < VSC9953_MAX_PORTS - 2 || (port) >= VSC9953_MAX_PORTS \
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) ? 0 : 1 \
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)
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#define VSC9953_MAX_VLAN 4096
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#define VSC9953_VLAN_CHECK(vid) \
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(((vid) < 0 || (vid) >= VSC9953_MAX_VLAN) ? 0 : 1)
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#define DEFAULT_VSC9953_MDIO_NAME "VSC9953_MDIO0"
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@ -338,6 +371,29 @@ struct vsc9953_system_reg {
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/* END VSC9953 SYS structure */
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/* VSC9953 REW structure */
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struct vsc9953_rew_port {
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u32 port_vlan_cfg;
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u32 port_tag_cfg;
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u32 port_port_cfg;
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u32 port_dscp_cfg;
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u32 port_pcp_dei_qos_map_cfg[16];
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u32 reserved[12];
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};
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struct vsc9953_rew_common {
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u32 reserve[4];
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u32 dscp_remap_dp1_cfg[64];
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u32 dscp_remap_cfg[64];
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};
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struct vsc9953_rew_reg {
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struct vsc9953_rew_port port[12];
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struct vsc9953_rew_common common;
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};
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/* END VSC9953 REW structure */
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/* VSC9953 DEVCPU_GCB structure */
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