From cbeedafdc84053047f036910343038475e09e998 Mon Sep 17 00:00:00 2001 From: William Wu Date: Wed, 9 Aug 2017 11:36:27 +0800 Subject: [PATCH 01/41] configs: rockchip: add USB configs for evb-rv1108 board This patch adds USB configs to support the USB OTG port(consist of DWC2 controller) and the USB Host port(consist of EHCI and OHCI controllers) on evb-rv1108 board, and also support fastboot over USB and USB mass storage. Signed-off-by: William Wu Reviewed-by: Simon Glass Acked-by: Philipp Tomsich Reviewed-by: Philipp Tomsich --- configs/evb-rv1108_defconfig | 21 +++++++++++++++++++++ include/configs/rv1108_common.h | 3 +++ 2 files changed, 24 insertions(+) diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig index ab4276ac8c..7036f433ee 100644 --- a/configs/evb-rv1108_defconfig +++ b/configs/evb-rv1108_defconfig @@ -5,8 +5,16 @@ CONFIG_TARGET_EVB_RV1108=y CONFIG_DEFAULT_DEVICE_TREE="rv1108-evb" CONFIG_DEBUG_UART=y # CONFIG_DISPLAY_CPUINFO is not set +CONFIG_FASTBOOT=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_CMD_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x62000000 +CONFIG_FASTBOOT_BUF_SIZE=0x08000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=1 # CONFIG_CMD_IMLS is not set CONFIG_CMD_SF=y +CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y @@ -26,6 +34,7 @@ CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y CONFIG_PINCTRL=y CONFIG_PINCTRL_ROCKCHIP_RV1108=y +CONFIG_DM_REGULATOR_FIXED=y CONFIG_BAUDRATE=1500000 # CONFIG_SPL_SERIAL_PRESENT is not set CONFIG_DEBUG_UART_BASE=0x10210000 @@ -33,4 +42,16 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYSRESET=y CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_GENERIC=y +CONFIG_USB_DWC2=y +CONFIG_USB_STORAGE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_G_DNL_MANUFACTURER="Rockchip" +CONFIG_G_DNL_VENDOR_NUM=0x2207 +CONFIG_G_DNL_PRODUCT_NUM=0x110a CONFIG_ERRNO_STR=y diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h index 04779162d0..5ee45594a3 100644 --- a/include/configs/rv1108_common.h +++ b/include/configs/rv1108_common.h @@ -28,4 +28,7 @@ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x100000) #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x2000000) +/* rockchip ohci host driver */ +#define CONFIG_USB_OHCI_NEW +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 #endif From 809ec9454fb36ae3c02cdee040f8c44ba08cd5ed Mon Sep 17 00:00:00 2001 From: William Wu Date: Wed, 9 Aug 2017 11:36:28 +0800 Subject: [PATCH 02/41] ARM: dts: rockchip: add USB nodes for evb-rv1108 This patch adds USB OTG/EHCI/OHCI nodes for evb-rv1108 USB ports. Signed-off-by: William Wu Reviewed-by: Simon Glass Acked-by: Philipp Tomsich --- arch/arm/dts/rv1108-evb.dts | 22 ++++++++++++++++++++++ arch/arm/dts/rv1108.dtsi | 24 ++++++++++++++++++++++++ 2 files changed, 46 insertions(+) diff --git a/arch/arm/dts/rv1108-evb.dts b/arch/arm/dts/rv1108-evb.dts index 0128dd8b1d..2b221b6d61 100644 --- a/arch/arm/dts/rv1108-evb.dts +++ b/arch/arm/dts/rv1108-evb.dts @@ -20,6 +20,15 @@ chosen { stdout-path = "serial2:1500000n8"; }; + + vcc5v0_otg: vcc5v0-otg-drv { + compatible = "regulator-fixed"; + enable-active-high; + regulator-name = "vcc5v0_otg"; + gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; }; &gmac { @@ -52,3 +61,16 @@ &uart2 { status = "okay"; }; + +&usb20_otg { + vbus-supply = <&vcc5v0_otg>; + status = "okay"; +}; + +&usb_host_ehci { + status = "okay"; +}; + +&usb_host_ohci { + status = "okay"; +}; diff --git a/arch/arm/dts/rv1108.dtsi b/arch/arm/dts/rv1108.dtsi index 77ca24e7f3..3153dfe658 100644 --- a/arch/arm/dts/rv1108.dtsi +++ b/arch/arm/dts/rv1108.dtsi @@ -175,6 +175,30 @@ status = "disabled"; }; + usb_host_ehci: usb@30140000 { + compatible = "generic-ehci"; + reg = <0x30140000 0x20000>; + interrupts = ; + status = "disabled"; + }; + + usb_host_ohci: usb@30160000 { + compatible = "generic-ohci"; + reg = <0x30160000 0x20000>; + interrupts = ; + status = "disabled"; + }; + + usb20_otg: usb@30180000 { + compatible = "rockchip,rv1108-usb", "rockchip,rk3288-usb", + "snps,dwc2"; + reg = <0x30180000 0x40000>; + interrupts = ; + hnp-srp-disable; + dr_mode = "otg"; + status = "disabled"; + }; + sfc: sfc@301c0000 { compatible = "rockchip,sfc"; reg = <0x301c0000 0x200>; From 578ab33eabe8fe8240b2947c4ebedf418202f365 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Wed, 9 Aug 2017 19:10:13 +0800 Subject: [PATCH 03/41] rockchip: enable rk322x sysreset driver The sysreset driver for rk322x is ready but not enabled, add it to Makefile to make sure it's enabled. Signed-off-by: Kever Yang Reviewed-by: Simon Glass Reviewed-by: Philipp Tomsich Acked-by: Philipp Tomsich --- drivers/sysreset/Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile index a5200d377d..476d361297 100644 --- a/drivers/sysreset/Makefile +++ b/drivers/sysreset/Makefile @@ -13,6 +13,7 @@ ifndef CONFIG_SPL_BUILD obj-$(CONFIG_ROCKCHIP_RK3036) += sysreset_rk3036.o endif obj-$(CONFIG_ROCKCHIP_RK3188) += sysreset_rk3188.o +obj-$(CONFIG_ROCKCHIP_RK322X) += sysreset_rk322x.o obj-$(CONFIG_ROCKCHIP_RK3288) += sysreset_rk3288.o obj-$(CONFIG_ROCKCHIP_RK3328) += sysreset_rk3328.o obj-$(CONFIG_ROCKCHIP_RK3368) += sysreset_rk3368.o From c964a0dcae5c4af334881d7286ec0222640b6a17 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Wed, 9 Aug 2017 19:28:03 +0800 Subject: [PATCH 04/41] rockchip: rk322x: enable fastboot to set boot mode tag To support fastboot "fastboot reboot-bootloader" cmd. Signed-off-by: Kever Yang Reviewed-by: Simon Glass Acked-by: Philipp Tomsich --- arch/arm/mach-rockchip/rk322x-board.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c index c0ac2e9b56..63875557ec 100644 --- a/arch/arm/mach-rockchip/rk322x-board.c +++ b/arch/arm/mach-rockchip/rk322x-board.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include @@ -136,3 +137,17 @@ int board_usb_cleanup(int index, enum usb_init_type init) return 0; } #endif + +#if defined(CONFIG_USB_FUNCTION_FASTBOOT) +int fb_set_reboot_flag(void) +{ + struct rk322x_grf *grf; + + printf("Setting reboot to fastboot flag ...\n"); + grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); + /* Set boot mode to fastboot */ + writel(BOOT_FASTBOOT, &grf->os_reg[0]); + + return 0; +} +#endif From 4c94aacd6298c47f0a75bfeff44353ad47252627 Mon Sep 17 00:00:00 2001 From: David Wu Date: Mon, 14 Aug 2017 15:04:28 +0800 Subject: [PATCH 05/41] rockchip: rk322x: Disable integrated macphy for saving power consuming Unfortunately, the integrated macphy default is enabled, which will increase power consuming, if we do not use this PHY. So let's disable it at first, which will save power consuming. If we really use it, then enable it in driver level. Signed-off-by: David Wu Reviewed-by: Kever Yang Reviewed-by: Philipp Tomsich Acked-by: Philipp Tomsich --- .../include/asm/arch-rockchip/grf_rk322x.h | 32 +++++++++++++++++++ arch/arm/mach-rockchip/rk322x-board.c | 8 +++++ 2 files changed, 40 insertions(+) diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk322x.h b/arch/arm/include/asm/arch-rockchip/grf_rk322x.h index 26071c8ec8..c0c0d84cf1 100644 --- a/arch/arm/include/asm/arch-rockchip/grf_rk322x.h +++ b/arch/arm/include/asm/arch-rockchip/grf_rk322x.h @@ -54,6 +54,32 @@ struct rk322x_grf { unsigned int os_reg[8]; unsigned int reserved9[(0x604 - 0x5e4) / 4 - 1]; unsigned int ddrc_stat; + unsigned int reserved10[(0x680 - 0x604) / 4 - 1]; + unsigned int sig_detect_con[2]; + unsigned int reserved11[(0x690 - 0x684) / 4 - 1]; + unsigned int sig_detect_status[2]; + unsigned int reserved12[(0x6a0 - 0x694) / 4 - 1]; + unsigned int sig_detect_clr[2]; + unsigned int reserved13[(0x6b0 - 0x6a4) / 4 - 1]; + unsigned int emmc_det; + unsigned int reserved14[(0x700 - 0x6b0) / 4 - 1]; + unsigned int host0_con[3]; + unsigned int reserved15; + unsigned int host1_con[3]; + unsigned int reserved16; + unsigned int host2_con[3]; + unsigned int reserved17[(0x760 - 0x728) / 4 - 1]; + unsigned int usbphy0_con[27]; + unsigned int reserved18[(0x800 - 0x7c8) / 4 - 1]; + unsigned int usbphy1_con[27]; + unsigned int reserved19[(0x880 - 0x868) / 4 - 1]; + unsigned int otg_con0; + unsigned int uoc_status0; + unsigned int reserved20[(0x900 - 0x884) / 4 - 1]; + unsigned int mac_con[2]; + unsigned int reserved21[(0xb00 - 0x904) / 4 - 1]; + unsigned int macphy_con[4]; + unsigned int macphy_status; }; check_member(rk322x_grf, ddrc_stat, 0x604); @@ -516,4 +542,10 @@ enum { CON_IOMUX_PWM0SEL_SHIFT = 0, CON_IOMUX_PWM0SEL_MASK = 1 << CON_IOMUX_PWM0SEL_SHIFT, }; + +/* GRF_MACPHY_CON0 */ +enum { + MACPHY_CFG_ENABLE_SHIFT = 0, + MACPHY_CFG_ENABLE_MASK = 1 << MACPHY_CFG_ENABLE_SHIFT, +}; #endif diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c index 63875557ec..dcd8cf805f 100644 --- a/arch/arm/mach-rockchip/rk322x-board.c +++ b/arch/arm/mach-rockchip/rk322x-board.c @@ -68,6 +68,14 @@ int board_init(void) CON_IOMUX_UART2SEL_MASK, CON_IOMUX_UART2SEL_21 << CON_IOMUX_UART2SEL_SHIFT); + /* + * The integrated macphy is enabled by default, disable it + * for saving power consuming. + */ + rk_clrsetreg(&grf->macphy_con[0], + MACPHY_CFG_ENABLE_MASK, + 0 << MACPHY_CFG_ENABLE_SHIFT); + return 0; } From cc8fb2f79304963597248ad7cdab6cf2f9b336ef Mon Sep 17 00:00:00 2001 From: Klaus Goger Date: Mon, 11 Sep 2017 21:04:59 +0200 Subject: [PATCH 06/41] rockchip: board: lion_rk3368: update README flash instructions Add a section to the README on how to flash the on-board eMMC with the rkdeveloptool. Signed-off-by: Klaus Goger Signed-off-by: Philipp Tomsich Reviewed-by: Philipp Tomsich Acked-by: Philipp Tomsich --- board/theobroma-systems/lion_rk3368/README | 24 ++++++++++++++++++++-- 1 file changed, 22 insertions(+), 2 deletions(-) diff --git a/board/theobroma-systems/lion_rk3368/README b/board/theobroma-systems/lion_rk3368/README index 47304fcba6..83e4332984 100644 --- a/board/theobroma-systems/lion_rk3368/README +++ b/board/theobroma-systems/lion_rk3368/README @@ -26,12 +26,32 @@ Build the full U-Boot and a FIT image including the ATF > make CROSS_COMPILE=aarch64-unknown-elf- ARCH=arm u-boot.itb -Write to a SD-card -================== +Flash the image +=============== + +Copy the SPL to offset 32k and the FIT image containing the payloads +(U-Boot proper, ATF, devicetree) to offset 256k card. + +SD-Card +------- > dd if=spl-3368.img of=/dev/sdb seek=64 > dd if=u-boot.itb of=/dev/sdb seek=512 +eMMC +---- + +rkdeveloptool allows to flash the on-board eMMC via the USB OTG interface with +help of the Rockchip loader binary. + + > git clone https://github.com/rockchip-linux/rkdeveloptool + > cd rkdeveloptool + > autoreconf -i && && ./configure && make + > git clone https://github.com/rockchip-linux/rkbin.git + > ./rkdeveloptool db rkbin/rk33/rk3368_loader_v2.00.256.bin + > ./rkdeveloptool wl 64 ../spl.img + > ./rkdeveloptool wl 512 ../u-boot.itb + If everything went according to plan, you should see the following output on UART0: From c91403409079e4747f60b79be5816773f6a4c8b3 Mon Sep 17 00:00:00 2001 From: Klaus Goger Date: Mon, 11 Sep 2017 21:05:00 +0200 Subject: [PATCH 07/41] rockchip: board: puma_rk3399: update README flash instructions Puma supports other boot sources then SD-Card. Update README to include the required steps. * how to package a SPI-NOR SPL * how to flash eMMC with rkdeveloptool Signed-off-by: Klaus Goger Signed-off-by: Philipp Tomsich Reviewed-by: Philipp Tomsich Acked-by: Philipp Tomsich --- board/theobroma-systems/puma_rk3399/README | 51 ++++++++++++++++++---- 1 file changed, 43 insertions(+), 8 deletions(-) diff --git a/board/theobroma-systems/puma_rk3399/README b/board/theobroma-systems/puma_rk3399/README index 214281a329..f67dfb451f 100644 --- a/board/theobroma-systems/puma_rk3399/README +++ b/board/theobroma-systems/puma_rk3399/README @@ -55,18 +55,53 @@ Compile the U-Boot Package the image ================= - > tools/mkimage -n rk3399 -T rksd -d spl/u-boot-spl.bin spl.img - > make CROSS_COMPILE=aarch64-linux-gnu- u-boot.itb +Creating a SPL image for SD-Card/eMMC + > tools/mkimage -n rk3399 -T rksd -d spl/u-boot-spl.bin spl_mmc.img +Creating a SPL image for SPI-NOR + > tools/mkimage -n rk3399 -T rkspi -d spl/u-boot-spl.bin spl_nor.img +Create the FIT image containing U-Boot proper, ATF, M0 Firmware, devicetree + > make CROSS_COMPILE=aarch64-linux-gnu- u-boot.itb Flash the image =============== -Copy the SPL to offset 32k and the FIT image containing the payloads -(U-Boot proper, ATF, M0 Firmware, devicetree) to offset 256k on a SD -card. +Copy the SPL to offset 32k for SD/eMMC, offset 0 for NOR-Flash and the FIT +image to offset 256k card. - > dd if=spl.img of=/dev/sdb seek=64 +SD-Card +------- + + > dd if=spl_mmc.img of=/dev/sdb seek=64 > dd if=u-boot.itb of=/dev/sdb seek=512 -After powering up the board (with the inserted SD card), you should see -a U-Boot console on UART0 (115200n8). +eMMC +---- + +rkdeveloptool allows to flash the on-board eMMC via the USB OTG interface with +help of the Rockchip loader binary. + + > git clone https://github.com/rockchip-linux/rkdeveloptool + > cd rkdeveloptool + > autoreconf -i && ./configure && make + > git clone https://github.com/rockchip-linux/rkbin.git + > ./rkdeveloptool db rkbin/rk33/rk3399_loader_v1.08.106.bin + > ./rkdeveloptool wl 64 ../spl_mmc.img + > ./rkdeveloptool wl 512 ../u-boot.itb + +NOR-Flash +--------- + +Writing the SPI NOR Flash requires a running U-Boot. For the sake of simplicity +we assume you have a SD-Card with a partition containing the required files +ready. + + > load mmc 1:1 ${kernel_addr_r} spl_nor.img + > sf probe + > sf erase 0 +$filesize + > sf write $kernel_addr_r 0 ${filesize} + > load mmc 1:1 ${kernel_addr_r} u-boot.itb + > sf erase 0x40000 +$filesize + > sf write $kernel_addr_r 0x40000 ${filesize} + + +Reboot the system and you should see a U-Boot console on UART0 (115200n8). From 148a139d65b7fdb93326d7870b40c618d4601a8a Mon Sep 17 00:00:00 2001 From: Philipp Tomsich Date: Mon, 11 Sep 2017 22:04:09 +0200 Subject: [PATCH 08/41] bootstage: adjust Makefile to allow including bootstage in SPL, but not in TPL For timing our bootstages on the RK3368, which has a minimal TPL (and where we consequently don't want to time the bootstages) and a full-featured SPL (where we can bootstage recording), we need to adjust the Makefile. Use the $(SPL_TPL_) macro in the Makefile for bootstage.o Signed-off-by: Philipp Tomsich Reviewed-by: Simon Glass Acked-by: Philipp Tomsich --- common/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/Makefile b/common/Makefile index 1b56cf9a70..801ea3191f 100644 --- a/common/Makefile +++ b/common/Makefile @@ -63,7 +63,7 @@ obj-$(CONFIG_CMDLINE) += cli_readline.o cli_simple.o endif # !CONFIG_SPL_BUILD -obj-$(CONFIG_$(SPL_)BOOTSTAGE) += bootstage.o +obj-$(CONFIG_$(SPL_TPL_)BOOTSTAGE) += bootstage.o ifdef CONFIG_SPL_BUILD obj-$(CONFIG_SPL_DFU_SUPPORT) += dfu.o From b61e8b0c9e76dacf0b670c3948c3cd738b2379a3 Mon Sep 17 00:00:00 2001 From: Philipp Tomsich Date: Mon, 11 Sep 2017 22:04:10 +0200 Subject: [PATCH 09/41] dm: timer: Convert to livetree This updates dm_timer_init to support a live tree and deals with some fallout (i.e. the need to restructure the code such, that we don't need multiple discontinuous #if CONFIG_IS_ENABLED blocks). Signed-off-by: Philipp Tomsich Reviewed-by: Simon Glass Acked-by: Philipp Tomsich --- drivers/timer/timer-uclass.c | 45 ++++++++++++++++++------------------ 1 file changed, 23 insertions(+), 22 deletions(-) diff --git a/drivers/timer/timer-uclass.c b/drivers/timer/timer-uclass.c index a84755f4c5..62d6f0b29a 100644 --- a/drivers/timer/timer-uclass.c +++ b/drivers/timer/timer-uclass.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include #include @@ -54,9 +55,10 @@ static int timer_pre_probe(struct udevice *dev) if (IS_ERR_VALUE(ret)) return ret; uc_priv->clock_rate = ret; - } else - uc_priv->clock_rate = fdtdec_get_int(gd->fdt_blob, - dev_of_offset(dev), "clock-frequency", 0); + } else { + uc_priv->clock_rate = + dev_read_u32_default(dev, "clock-frequency", 0); + } #endif return 0; @@ -83,9 +85,8 @@ u64 timer_conv_64(u32 count) int notrace dm_timer_init(void) { - __maybe_unused const void *blob = gd->fdt_blob; struct udevice *dev = NULL; - int node = -ENOENT; + __maybe_unused ofnode node; int ret; if (gd->timer) @@ -93,27 +94,27 @@ int notrace dm_timer_init(void) #if !CONFIG_IS_ENABLED(OF_PLATDATA) /* Check for a chosen timer to be used for tick */ - node = fdtdec_get_chosen_node(blob, "tick-timer"); + node = ofnode_get_chosen_node("tick-timer"); + + if (ofnode_valid(node) && + uclass_get_device_by_ofnode(UCLASS_TIMER, node, &dev)) { + /* + * If the timer is not marked to be bound before + * relocation, bind it anyway. + */ + if (!lists_bind_fdt(dm_root(), node, &dev)) { + ret = device_probe(dev); + if (ret) + return ret; + } + } #endif - if (node < 0) { - /* No chosen timer, trying first available timer */ + + if (!dev) { + /* Fall back to the first available timer */ ret = uclass_first_device_err(UCLASS_TIMER, &dev); if (ret) return ret; - } else { - if (uclass_get_device_by_of_offset(UCLASS_TIMER, node, &dev)) { - /* - * If the timer is not marked to be bound before - * relocation, bind it anyway. - */ - if (node > 0 && - !lists_bind_fdt(gd->dm_root, offset_to_ofnode(node), - &dev)) { - ret = device_probe(dev); - if (ret) - return ret; - } - } } if (dev) { From af823151641b1a9a8eae8c3b111f5fa27e6873ac Mon Sep 17 00:00:00 2001 From: Philipp Tomsich Date: Mon, 11 Sep 2017 22:04:11 +0200 Subject: [PATCH 10/41] dm: timer: handle being called before dm_root is ready When used with bootstage recording, dm_timer_init may be called surprisingly early: i.e. before dm_root is ready. To deal with this case, we explicitly check for this condition and return -EAGAIN to the caller (refer to drivers/timer/rockchip_timer.c for a case where this is needed/used). Signed-off-by: Philipp Tomsich Reviewed-by: Simon Glass Acked-by: Philipp Tomsich --- drivers/timer/timer-uclass.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/timer/timer-uclass.c b/drivers/timer/timer-uclass.c index 62d6f0b29a..45397b230f 100644 --- a/drivers/timer/timer-uclass.c +++ b/drivers/timer/timer-uclass.c @@ -92,6 +92,13 @@ int notrace dm_timer_init(void) if (gd->timer) return 0; + /* + * Directly access gd->dm_root to suppress error messages, if the + * virtual root driver does not yet exist. + */ + if (gd->dm_root == NULL) + return -EAGAIN; + #if !CONFIG_IS_ENABLED(OF_PLATDATA) /* Check for a chosen timer to be used for tick */ node = ofnode_get_chosen_node("tick-timer"); From c131c8bca86b428daef7a25c26a96af42658be21 Mon Sep 17 00:00:00 2001 From: Philipp Tomsich Date: Mon, 11 Sep 2017 22:04:12 +0200 Subject: [PATCH 11/41] dm: core: add dev_read_addr_ptr() The dev_read_addr_ptr() mimics the behaviour of the devfdt_get_addr_ptr(), retrieving the first address of the node's reg-property and returning it as a pointer (or NULL on failure). Signed-off-by: Philipp Tomsich Acked-by: Philipp Tomsich Reviewed-by: Simon Glass --- drivers/core/read.c | 7 +++++++ include/dm/read.h | 15 +++++++++++++++ 2 files changed, 22 insertions(+) diff --git a/drivers/core/read.c b/drivers/core/read.c index 6acb33388f..065589a6ab 100644 --- a/drivers/core/read.c +++ b/drivers/core/read.c @@ -57,6 +57,13 @@ fdt_addr_t dev_read_addr(struct udevice *dev) return dev_read_addr_index(dev, 0); } +void *dev_read_addr_ptr(struct udevice *dev) +{ + fdt_addr_t addr = dev_read_addr(dev); + + return (addr == FDT_ADDR_T_NONE) ? NULL : (void *)addr; +} + fdt_addr_t dev_read_addr_size(struct udevice *dev, const char *property, fdt_size_t *sizep) { diff --git a/include/dm/read.h b/include/dm/read.h index 49d69c990f..e7f71256a8 100644 --- a/include/dm/read.h +++ b/include/dm/read.h @@ -112,6 +112,16 @@ fdt_addr_t dev_read_addr_index(struct udevice *dev, int index); */ fdt_addr_t dev_read_addr(struct udevice *dev); +/** + * dev_read_addr_ptr() - Get the reg property of a device + * as a pointer + * + * @dev: Device to read from + * + * @return pointer or NULL if not found + */ +void *dev_read_addr_ptr(struct udevice *dev); + /** * dev_read_addr_size() - get address and size from a device property * @@ -417,6 +427,11 @@ static inline fdt_addr_t dev_read_addr(struct udevice *dev) return devfdt_get_addr(dev); } +static inline void *dev_read_addr_ptr(struct udevice *dev) +{ + return devfdt_get_addr_ptr(dev); +} + static inline fdt_addr_t dev_read_addr_size(struct udevice *dev, const char *propname, fdt_size_t *sizep) From 15050f1cb023052a5ab03d39e55119e9c6ce3eaf Mon Sep 17 00:00:00 2001 From: Philipp Tomsich Date: Mon, 11 Sep 2017 22:04:13 +0200 Subject: [PATCH 12/41] net: designware: Convert to livetree Update the Designware Ethernet MAC driver to support a live device tree. Signed-off-by: Philipp Tomsich Acked-by: Joe Hershberger Reviewed-by: Simon Glass --- drivers/net/designware.c | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/drivers/net/designware.c b/drivers/net/designware.c index 521e4dde41..036d231071 100644 --- a/drivers/net/designware.c +++ b/drivers/net/designware.c @@ -737,16 +737,14 @@ int designware_eth_ofdata_to_platdata(struct udevice *dev) #endif struct eth_pdata *pdata = &dw_pdata->eth_pdata; const char *phy_mode; - const fdt32_t *cell; #ifdef CONFIG_DM_GPIO int reset_flags = GPIOD_IS_OUT; #endif int ret = 0; - pdata->iobase = devfdt_get_addr(dev); + pdata->iobase = dev_read_addr(dev); pdata->phy_interface = -1; - phy_mode = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "phy-mode", - NULL); + phy_mode = dev_read_string(dev, "phy-mode"); if (phy_mode) pdata->phy_interface = phy_get_interface_by_name(phy_mode); if (pdata->phy_interface == -1) { @@ -754,10 +752,7 @@ int designware_eth_ofdata_to_platdata(struct udevice *dev) return -EINVAL; } - pdata->max_speed = 0; - cell = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "max-speed", NULL); - if (cell) - pdata->max_speed = fdt32_to_cpu(*cell); + pdata->max_speed = dev_read_u32_default(dev, "max-speed", 0); #ifdef CONFIG_DM_GPIO if (dev_read_bool(dev, "snps,reset-active-low")) From b343837e90bf7eb1b7b7b5117cd6e101b72bda10 Mon Sep 17 00:00:00 2001 From: Philipp Tomsich Date: Mon, 11 Sep 2017 22:04:14 +0200 Subject: [PATCH 13/41] net: phy: micrel: Convert to livetree Update the Micrel KSZ90x1 driver for a live tree. Signed-off-by: Philipp Tomsich Acked-by: Joe Hershberger Reviewed-by: Simon Glass --- drivers/net/phy/micrel_ksz90x1.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/net/phy/micrel_ksz90x1.c b/drivers/net/phy/micrel_ksz90x1.c index 0bb99e6bc6..b350a61aa6 100644 --- a/drivers/net/phy/micrel_ksz90x1.c +++ b/drivers/net/phy/micrel_ksz90x1.c @@ -9,11 +9,11 @@ * (C) Copyright 2017 Adaptrum, Inc. * Written by Alexandru Gagniuc for Adaptrum, Inc. */ + #include #include #include #include -#include #include #include @@ -120,8 +120,7 @@ static int ksz90x1_of_config_group(struct phy_device *phydev, return -EOPNOTSUPP; for (i = 0; i < ofcfg->grpsz; i++) { - val[i] = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), - ofcfg->grp[i].name, -1); + val[i] = dev_read_u32_default(dev, ofcfg->grp[i].name, ~0); offset = ofcfg->grp[i].off; if (val[i] == -1) { /* Default register value for KSZ9021 */ From be5f04e850e89639ffe7ec4d2dccd327eb354cde Mon Sep 17 00:00:00 2001 From: Philipp Tomsich Date: Mon, 11 Sep 2017 22:04:15 +0200 Subject: [PATCH 14/41] rockchip: mmc: convert to livetree Update the Rockchip-specific wrapper for the Designware driver to support a live device tree. Signed-off-by: Philipp Tomsich Reviewed-by: Simon Glass Acked-by: Philipp Tomsich Version-changes: 2 - use the dev_read_addr_ptr function in rockchip_dw_mmc.c --- drivers/mmc/rockchip_dw_mmc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c index e7fcf89f73..807dc9e72f 100644 --- a/drivers/mmc/rockchip_dw_mmc.c +++ b/drivers/mmc/rockchip_dw_mmc.c @@ -58,7 +58,7 @@ static int rockchip_dwmmc_ofdata_to_platdata(struct udevice *dev) struct dwmci_host *host = &priv->host; host->name = dev->name; - host->ioaddr = (void *)devfdt_get_addr(dev); + host->ioaddr = dev_read_addr_ptr(dev); host->buswidth = dev_read_u32_default(dev, "bus-width", 4); host->get_mmc_clk = rockchip_dwmmc_get_mmc_clk; host->priv = dev; From cc7ce94e02799c5caa6d9c89350152f00ba3eb90 Mon Sep 17 00:00:00 2001 From: Philipp Tomsich Date: Mon, 11 Sep 2017 22:04:16 +0200 Subject: [PATCH 15/41] rockchip: timer: implement timer_get_boot_us To make the Rockchip DM timer driver useful for the timing of bootstages, we need a few enhancements: - This implements timer_get_boot_us. - This avoids reinitialising the timer, if it has already been set up (e.g. by our TPL and SPL stages). Now, we have a single timebase ticking from TPL through the full U-Boot. - This adds support for reading the timer even before the device-model is ready: we find the timer via /chosen/tick-timer, then read its address and clock-frequency, and finally read the timeval directly). Signed-off-by: Philipp Tomsich Reviewed-by: Simon Glass Acked-by: Philipp Tomsich --- drivers/timer/rockchip_timer.c | 72 +++++++++++++++++++++++++++++++--- 1 file changed, 67 insertions(+), 5 deletions(-) diff --git a/drivers/timer/rockchip_timer.c b/drivers/timer/rockchip_timer.c index eb44965a19..3c0750697d 100644 --- a/drivers/timer/rockchip_timer.c +++ b/drivers/timer/rockchip_timer.c @@ -6,6 +6,7 @@ #include #include +#include #include #include #include @@ -25,17 +26,72 @@ struct rockchip_timer_priv { struct rk_timer *timer; }; -static int rockchip_timer_get_count(struct udevice *dev, u64 *count) +static inline int64_t rockchip_timer_get_curr_value(struct rk_timer *timer) { - struct rockchip_timer_priv *priv = dev_get_priv(dev); uint64_t timebase_h, timebase_l; uint64_t cntr; - timebase_l = readl(&priv->timer->timer_curr_value0); - timebase_h = readl(&priv->timer->timer_curr_value1); + timebase_l = readl(&timer->timer_curr_value0); + timebase_h = readl(&timer->timer_curr_value1); + + cntr = timebase_h << 32 | timebase_l; + return cntr; +} + +#if CONFIG_IS_ENABLED(BOOTSTAGE) +ulong timer_get_boot_us(void) +{ + uint64_t ticks = 0; + uint32_t rate; + uint64_t us; + int ret; + + ret = dm_timer_init(); + + if (!ret) { + /* The timer is available */ + rate = timer_get_rate(gd->timer); + timer_get_count(gd->timer, &ticks); +#if !CONFIG_IS_ENABLED(OF_PLATDATA) + } else if (ret == -EAGAIN) { + /* We have been called so early that the DM is not ready,... */ + ofnode node = offset_to_ofnode(-1); + struct rk_timer *timer = NULL; + + /* + * ... so we try to access the raw timer, if it is specified + * via the tick-timer property in /chosen. + */ + node = ofnode_get_chosen_node("tick-timer"); + if (!ofnode_valid(node)) { + debug("%s: no /chosen/tick-timer\n", __func__); + return 0; + } + + timer = (struct rk_timer *)ofnode_get_addr(node); + + /* This timer is down-counting */ + ticks = ~0uLL - rockchip_timer_get_curr_value(timer); + if (ofnode_read_u32(node, "clock-frequency", &rate)) { + debug("%s: could not read clock-frequency\n", __func__); + return 0; + } +#endif + } else { + return 0; + } + + us = (ticks * 1000) / rate; + return us; +} +#endif + +static int rockchip_timer_get_count(struct udevice *dev, u64 *count) +{ + struct rockchip_timer_priv *priv = dev_get_priv(dev); + uint64_t cntr = rockchip_timer_get_curr_value(priv->timer); /* timers are down-counting */ - cntr = timebase_h << 32 | timebase_l; *count = ~0ull - cntr; return 0; } @@ -58,6 +114,12 @@ static int rockchip_timer_start(struct udevice *dev) const uint32_t reload_val_l = reload_val & 0xffffffff; const uint32_t reload_val_h = reload_val >> 32; + /* don't reinit, if the timer is already running and set up */ + if ((readl(&priv->timer->timer_ctrl_reg) & 1) == 1 && + (readl(&priv->timer->timer_load_count0) == reload_val_l) && + (readl(&priv->timer->timer_load_count1) == reload_val_h)) + return 0; + /* disable timer and reset all control */ writel(0, &priv->timer->timer_ctrl_reg); /* write reload value */ From 6675c952f20b7b3cfedd57c9c49305289a89403c Mon Sep 17 00:00:00 2001 From: Philipp Tomsich Date: Mon, 11 Sep 2017 22:04:17 +0200 Subject: [PATCH 16/41] rockchip: timer: Convert to livetree Update the Rockchip timer driver to support a live device tree. Signed-off-by: Philipp Tomsich Reviewed-by: Simon Glass Acked-by: Philipp Tomsich --- drivers/timer/rockchip_timer.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/timer/rockchip_timer.c b/drivers/timer/rockchip_timer.c index 3c0750697d..460eb82f6c 100644 --- a/drivers/timer/rockchip_timer.c +++ b/drivers/timer/rockchip_timer.c @@ -101,7 +101,9 @@ static int rockchip_clk_ofdata_to_platdata(struct udevice *dev) #if !CONFIG_IS_ENABLED(OF_PLATDATA) struct rockchip_timer_priv *priv = dev_get_priv(dev); - priv->timer = (struct rk_timer *)devfdt_get_addr(dev); + priv->timer = dev_read_addr_ptr(dev); + if (!priv->timer) + return -ENOENT; #endif return 0; From 9a342f48a6c4debb1a43132c4b8ddc61c9f5d01d Mon Sep 17 00:00:00 2001 From: Philipp Tomsich Date: Mon, 11 Sep 2017 22:04:18 +0200 Subject: [PATCH 17/41] rockchip: clk: rk3368: Convert to livetree Update the clock driver for the RK3368 to support a live device tree. Signed-off-by: Philipp Tomsich Reviewed-by: Simon Glass Acked-by: Philipp Tomsich Version-changes: 2 - use the dev_read_addr_ptr function in clk_rk3368.c --- drivers/clk/rockchip/clk_rk3368.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c index 0160d50c03..e2747816b9 100644 --- a/drivers/clk/rockchip/clk_rk3368.c +++ b/drivers/clk/rockchip/clk_rk3368.c @@ -485,7 +485,7 @@ static int rk3368_clk_ofdata_to_platdata(struct udevice *dev) #if !CONFIG_IS_ENABLED(OF_PLATDATA) struct rk3368_clk_priv *priv = dev_get_priv(dev); - priv->cru = (struct rk3368_cru *)devfdt_get_addr(dev); + priv->cru = dev_read_addr_ptr(dev); #endif return 0; From d2edb968c4dbd116aaddf994ec540eb4ef4d9cee Mon Sep 17 00:00:00 2001 From: Philipp Tomsich Date: Mon, 11 Sep 2017 22:04:19 +0200 Subject: [PATCH 18/41] rockchip: pinctrl: rk3368: Convert to livetree Update the pinctrl driver for the RK3368 to support a live device tree. Signed-off-by: Philipp Tomsich Reviewed-by: Simon Glass Acked-by: Philipp Tomsich --- drivers/pinctrl/rockchip/pinctrl_rk3368.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3368.c b/drivers/pinctrl/rockchip/pinctrl_rk3368.c index 81ce2e31a7..b1f5704164 100644 --- a/drivers/pinctrl/rockchip/pinctrl_rk3368.c +++ b/drivers/pinctrl/rockchip/pinctrl_rk3368.c @@ -632,8 +632,7 @@ static int rk3368_pinctrl_get_periph_id(struct udevice *dev, u32 cell[3]; int ret; - ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph), - "interrupts", cell, ARRAY_SIZE(cell)); + ret = dev_read_u32_array(periph, "interrupts", cell, ARRAY_SIZE(cell)); if (ret < 0) return -EINVAL; From d27c273908c3ca534093e93d7730fc55973a02bc Mon Sep 17 00:00:00 2001 From: Philipp Tomsich Date: Mon, 11 Sep 2017 22:04:20 +0200 Subject: [PATCH 19/41] rockchip: spi: Convert to livetree Update the Rockchip SPI driver to support a live device tree. Signed-off-by: Philipp Tomsich Reviewed-by: Simon Glass Reviewed-by: Jagan Teki Acked-by: Philipp Tomsich --- drivers/spi/rk_spi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/rk_spi.c b/drivers/spi/rk_spi.c index c70d636277..b18db74e7e 100644 --- a/drivers/spi/rk_spi.c +++ b/drivers/spi/rk_spi.c @@ -184,7 +184,7 @@ static int rockchip_spi_ofdata_to_platdata(struct udevice *bus) struct rockchip_spi_priv *priv = dev_get_priv(bus); int ret; - plat->base = devfdt_get_addr(bus); + plat->base = dev_read_addr(bus); ret = clk_get_by_index(bus, 0, &priv->clk); if (ret < 0) { From 327b2b35c527d2ec6c8de4fdebb71322c0f085fb Mon Sep 17 00:00:00 2001 From: Philipp Tomsich Date: Mon, 11 Sep 2017 22:04:21 +0200 Subject: [PATCH 20/41] rockchip: sdhci: Convert to livetree Update the Rockchip SDHCI wrapper to support a live device tree. Signed-off-by: Philipp Tomsich Reviewed-by: Simon Glass Acked-by: Philipp Tomsich Version-changes: 2 - use the dev_read_addr_ptr function in rockchip_sdhci.c --- drivers/mmc/rockchip_sdhci.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c index f31d329c81..346a42c664 100644 --- a/drivers/mmc/rockchip_sdhci.c +++ b/drivers/mmc/rockchip_sdhci.c @@ -9,7 +9,6 @@ #include #include #include -#include #include #include #include @@ -82,7 +81,7 @@ static int arasan_sdhci_ofdata_to_platdata(struct udevice *dev) struct sdhci_host *host = dev_get_priv(dev); host->name = dev->name; - host->ioaddr = devfdt_get_addr_ptr(dev); + host->ioaddr = dev_read_addr_ptr(dev); #endif return 0; From a904a16bc172ee1d7bcbcae1afcec21efe305e47 Mon Sep 17 00:00:00 2001 From: Philipp Tomsich Date: Mon, 11 Sep 2017 22:04:22 +0200 Subject: [PATCH 21/41] rockchip: rk8xx: remove unused header includes Remove header file includes that have been left over after the conversion to livetree-support. Signed-off-by: Philipp Tomsich Reviewed-by: Simon Glass Acked-by: Philipp Tomsich --- drivers/power/pmic/rk8xx.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c index eb3ec0f601..735046dc43 100644 --- a/drivers/power/pmic/rk8xx.c +++ b/drivers/power/pmic/rk8xx.c @@ -8,8 +8,6 @@ #include #include #include -#include -#include #include #include From cc91bdf8d4da6e66703a1bc99577f49ec3c7bf4a Mon Sep 17 00:00:00 2001 From: Philipp Tomsich Date: Mon, 11 Sep 2017 22:04:23 +0200 Subject: [PATCH 22/41] rockchip: i2c: Convert to livetree Update the Rockchip I2C driver to support livetree. Signed-off-by: Philipp Tomsich Reviewed-by: Simon Glass Acked-by: Philipp Tomsich Acked-by: Heiko Schocher --- drivers/i2c/rk_i2c.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/i2c/rk_i2c.c b/drivers/i2c/rk_i2c.c index 68e66536e4..840b3f6046 100644 --- a/drivers/i2c/rk_i2c.c +++ b/drivers/i2c/rk_i2c.c @@ -382,7 +382,7 @@ static int rockchip_i2c_probe(struct udevice *bus) { struct rk_i2c *priv = dev_get_priv(bus); - priv->regs = (void *)devfdt_get_addr(bus); + priv->regs = dev_read_addr_ptr(bus); return 0; } From a1d3480bc63103f6215925b9447512e933cc4f1a Mon Sep 17 00:00:00 2001 From: Philipp Tomsich Date: Mon, 11 Sep 2017 22:04:24 +0200 Subject: [PATCH 23/41] rockchip: gpio: convert to livetree Update the Rockchip GPIO-bank driver to support a live tree. Signed-off-by: Philipp Tomsich Reviewed-by: Simon Glass Acked-by: Philipp Tomsich Version-changes: 2 - use the dev_read_addr_ptr function in rk_gpio.c --- drivers/gpio/rk_gpio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/rk_gpio.c b/drivers/gpio/rk_gpio.c index 6f7366acba..a6b83b26a8 100644 --- a/drivers/gpio/rk_gpio.c +++ b/drivers/gpio/rk_gpio.c @@ -104,7 +104,7 @@ static int rockchip_gpio_probe(struct udevice *dev) int ret; /* This only supports RK3288 at present */ - priv->regs = (struct rockchip_gpio_regs *)devfdt_get_addr(dev); + priv->regs = dev_read_addr_ptr(dev); ret = uclass_first_device_err(UCLASS_PINCTRL, &priv->pinctrl); if (ret) return ret; From c23ce9ab85604c4b6b627e522c1dbf2a618063e6 Mon Sep 17 00:00:00 2001 From: Philipp Tomsich Date: Mon, 11 Sep 2017 22:04:25 +0200 Subject: [PATCH 24/41] rockchip: gpio: remove outdated/misleading comment Remove a comment claiming that this driver only supports the RK3288, as we also use it on the RK3368, RK3399 and (most likely) on other variants. Signed-off-by: Philipp Tomsich Reviewed-by: Simon Glass Acked-by: Philipp Tomsich Version-changes: 2 - use the dev_read_addr_ptr function in rk_gpio.c --- drivers/gpio/rk_gpio.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpio/rk_gpio.c b/drivers/gpio/rk_gpio.c index a6b83b26a8..11fc3e26bd 100644 --- a/drivers/gpio/rk_gpio.c +++ b/drivers/gpio/rk_gpio.c @@ -103,7 +103,6 @@ static int rockchip_gpio_probe(struct udevice *dev) char *end; int ret; - /* This only supports RK3288 at present */ priv->regs = dev_read_addr_ptr(dev); ret = uclass_first_device_err(UCLASS_PINCTRL, &priv->pinctrl); if (ret) From f041176c4672f2885ff0843f5f7a27c892fcc42c Mon Sep 17 00:00:00 2001 From: Philipp Tomsich Date: Mon, 11 Sep 2017 22:04:26 +0200 Subject: [PATCH 25/41] rockchip: dts: rk3368-lion: add /chosen/tick-timer To support bootstage recording, we want to mark our DM timer as the tick-timer; this triggers the support for 'trying harder' to read the timer in the Rockchip DM timer driver, even if the device model isn't ready yet. Signed-off-by: Philipp Tomsich Reviewed-by: Simon Glass Acked-by: Philipp Tomsich --- arch/arm/dts/rk3368-lion-u-boot.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/dts/rk3368-lion-u-boot.dtsi b/arch/arm/dts/rk3368-lion-u-boot.dtsi index 6052e8a8d3..1ec7d254af 100644 --- a/arch/arm/dts/rk3368-lion-u-boot.dtsi +++ b/arch/arm/dts/rk3368-lion-u-boot.dtsi @@ -13,6 +13,7 @@ chosen { stdout-path = "serial0:115200n8"; u-boot,spl-boot-order = &emmc, &sdmmc; + tick-timer = "/timer@ff810000"; }; }; @@ -88,6 +89,7 @@ &timer0 { u-boot,dm-pre-reloc; clock-frequency = <24000000>; + status = "okay"; }; From c254b29fef79a92948136855db41436392e2d28b Mon Sep 17 00:00:00 2001 From: Philipp Tomsich Date: Mon, 11 Sep 2017 22:04:27 +0200 Subject: [PATCH 26/41] rockchip: lion-rk3368: defconfig: resync w/ OF_LIVE and BOOTSTAGE enabled This adds OF_LIVE and BOOTSTAGE support for the RK3368-uQ7 and regenerates the defconfig (picking up a few changes/reorderings) from upstream Kconfig changes. Signed-off-by: Philipp Tomsich Reviewed-by: Simon Glass Acked-by: Philipp Tomsich --- configs/lion-rk3368_defconfig | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig index 45a12a8b27..c7ee7b3f97 100644 --- a/configs/lion-rk3368_defconfig +++ b/configs/lion-rk3368_defconfig @@ -19,6 +19,11 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_FIT_SOURCE="board/theobroma-systems/lion_rk3368/fit_spl_atf.its" +CONFIG_BOOTSTAGE=y +CONFIG_SPL_BOOTSTAGE=y +CONFIG_BOOTSTAGE_REPORT=y +CONFIG_BOOTSTAGE_FDT=y +CONFIG_ENV_IS_IN_MMC=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_ARCH_EARLY_INIT_R=y CONFIG_SPL=y @@ -37,10 +42,12 @@ CONFIG_TPL_DRIVERS_MISC_SUPPORT=y CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y +CONFIG_CMD_BOOTSTAGE=y CONFIG_CMD_REGULATOR=y CONFIG_CMD_MTDPARTS=y CONFIG_SPL_OF_CONTROL=y CONFIG_TPL_OF_CONTROL=y +CONFIG_OF_LIVE=y CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent" CONFIG_TPL_OF_PLATDATA=y CONFIG_ENV_IS_IN_MMC=y From ba1657338b05337cea516dcfea6614c06f771613 Mon Sep 17 00:00:00 2001 From: Philipp Tomsich Date: Tue, 29 Aug 2017 18:24:05 +0200 Subject: [PATCH 27/41] rockchip: rk3399: spl: remove hard-coded addresses for GRF and SGRF On the RK3399, we will have either OF_PLATDATA or full OF_CONTROL enabled: this allows the use of syscon to retrieve the addresses of GRF and SGRF (except for the early debug UART setup, which runs so early that the device-model is not initialised). This removes the hard-coded addresses and goes through syscon to retrieve the base-addresses of GRF and SGRF. After that, we use the structure definitions to locate the respective registers. In addition to this, the inclusion of header files is also cleaned up: - all headers are included at the beginning (there was a spurious inclusion of the grf header from within a function) - all #include statements for unused headers are removed - the remaining #include statements are sorted (while keeping common.h included in front) Signed-off-by: Philipp Tomsich Reviewed-by: Simon Glass --- arch/arm/mach-rockchip/rk3399-board-spl.c | 34 +++++++++++------------ 1 file changed, 16 insertions(+), 18 deletions(-) diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c b/arch/arm/mach-rockchip/rk3399-board-spl.c index d6bf74f7ad..3406156447 100644 --- a/arch/arm/mach-rockchip/rk3399-board-spl.c +++ b/arch/arm/mach-rockchip/rk3399-board-spl.c @@ -5,19 +5,17 @@ */ #include -#include -#include -#include -#include -#include -#include #include +#include #include #include -#include -#include +#include +#include +#include #include -#include +#include +#include +#include DECLARE_GLOBAL_DATA_PTR; @@ -53,7 +51,6 @@ void secure_timer_init(void) void board_debug_uart_init(void) { -#include #define GRF_BASE 0xff770000 struct rk3399_grf_regs * const grf = (void *)GRF_BASE; @@ -80,13 +77,12 @@ void board_debug_uart_init(void) #endif } -#define GRF_EMMCCORE_CON11 0xff77f02c -#define SGRF_DDR_RGN_CON16 0xff330040 -#define SGRF_SLV_SECURE_CON4 0xff33e3d0 void board_init_f(ulong dummy) { struct udevice *pinctrl; struct udevice *dev; + struct rk3399_pmusgrf_regs *sgrf; + struct rk3399_grf_regs *grf; int ret; #define EARLY_UART @@ -103,9 +99,6 @@ void board_init_f(ulong dummy) printascii("U-Boot SPL board init"); #endif - /* Emmc clock generator: disable the clock multipilier */ - rk_clrreg(GRF_EMMCCORE_CON11, 0x0ff); - ret = spl_early_init(); if (ret) { debug("spl_early_init() failed: %d\n", ret); @@ -121,8 +114,13 @@ void board_init_f(ulong dummy) * driver, which tries to DMA from/to the stack (likely) * located in this range. */ - rk_clrsetreg(SGRF_DDR_RGN_CON16, 0x1FF, 0); - rk_clrreg(SGRF_SLV_SECURE_CON4, 0x2000); + sgrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUSGRF); + rk_clrsetreg(&sgrf->ddr_rgn_con[16], 0x1ff, 0); + rk_clrreg(&sgrf->slv_secure_con4, 0x2000); + + /* eMMC clock generator: disable the clock multipilier */ + grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); + rk_clrreg(&grf->emmccore_con[11], 0x0ff); secure_timer_init(); From d55af074e5a8dc85fc78f468d1f8bc96ae8b6855 Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Tue, 12 Sep 2017 17:15:47 +0530 Subject: [PATCH 28/41] rk3288: Add Vyasa initial board support This patch adds support for Vyasa RK3288 initial board from Amarula Solutions. Reviewed-by: Simon Glass Signed-off-by: Jagan Teki Reviewed-by: Philipp Tomsich Acked-by: Philipp Tomsich --- arch/arm/dts/Makefile | 1 + arch/arm/dts/rk3288-vyasa.dts | 327 ++++++++++++++++++++++ arch/arm/mach-rockchip/rk3288/Kconfig | 11 + board/amarula/vyasa-rk3288/Kconfig | 12 + board/amarula/vyasa-rk3288/MAINTAINERS | 6 + board/amarula/vyasa-rk3288/Makefile | 7 + board/amarula/vyasa-rk3288/vyasa-rk3288.c | 7 + configs/vyasa-rk3288_defconfig | 63 +++++ include/configs/vyasa-rk3288.h | 23 ++ 9 files changed, 457 insertions(+) create mode 100644 arch/arm/dts/rk3288-vyasa.dts create mode 100644 board/amarula/vyasa-rk3288/Kconfig create mode 100644 board/amarula/vyasa-rk3288/MAINTAINERS create mode 100644 board/amarula/vyasa-rk3288/Makefile create mode 100644 board/amarula/vyasa-rk3288/vyasa-rk3288.c create mode 100644 configs/vyasa-rk3288_defconfig create mode 100644 include/configs/vyasa-rk3288.h diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 85ce68789a..fee4680057 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -41,6 +41,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ rk3288-veyron-jerry.dtb \ rk3288-veyron-mickey.dtb \ rk3288-veyron-minnie.dtb \ + rk3288-vyasa.dtb \ rk3328-evb.dtb \ rk3368-lion.dtb \ rk3368-sheep.dtb \ diff --git a/arch/arm/dts/rk3288-vyasa.dts b/arch/arm/dts/rk3288-vyasa.dts new file mode 100644 index 0000000000..93a9c5ee09 --- /dev/null +++ b/arch/arm/dts/rk3288-vyasa.dts @@ -0,0 +1,327 @@ +/* + * Copyright (C) 2017 Jagan Teki + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "rk3288.dtsi" + +/ { + model = "Amarula Vyasa-RK3288"; + compatible = "amarula,vyasa-rk3288", "rockchip,rk3288"; + + chosen { + stdout-path = &uart2; + }; + + memory { + device_type = "memory"; + reg = <0 0x80000000>; + }; + + vcc_sd: sdmmc-regulator { + compatible = "regulator-fixed"; + gpio = <&gpio7 RK_PB3 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_pwr>; + regulator-name = "vcc_sd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + startup-delay-us = <100000>; + vin-supply = <&vcc_io>; + }; + + vcc_sys: vsys-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_sys"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; + }; +}; + +&dmc { + rockchip,pctl-timing = <0x29a 0xc8 0x1f8 0x42 0x4e 0x4 0xea 0xa + 0x5 0x0 0xa 0x7 0x19 0x24 0xa 0x7 + 0x5 0xa 0x5 0x200 0x5 0x10 0x40 0x0 + 0x1 0x7 0x7 0x4 0xc 0x43 0x100 0x0 + 0x5 0x0>; + rockchip,phy-timing = <0x48f9aab4 0xea0910 0x1002c200 + 0xa60 0x40 0x10 0x0>; + /* Add a dummy value to cause of-platdata think this is bytes */ + rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 9 1>; +}; + +&cpu0 { + cpu0-supply = <&vdd_cpu>; +}; + +&i2c0 { + clock-frequency = <400000>; + status = "okay"; + + rk808: pmic@1b { + compatible = "rockchip,rk808"; + reg = <0x1b>; + interrupt-parent = <&gpio0>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int &global_pwroff>; + wakeup-source; + rockchip,system-power-controller; + #clock-cells = <1>; + clock-output-names = "xin32k", "rk808-clkout2"; + + vcc1-supply = <&vcc_sys>; + vcc2-supply = <&vcc_sys>; + vcc3-supply = <&vcc_sys>; + vcc4-supply = <&vcc_sys>; + vcc6-supply = <&vcc_sys>; + vcc7-supply = <&vcc_sys>; + vcc8-supply = <&vcc_io>; + vcc9-supply = <&vcc_sys>; + vcc10-supply = <&vcc_sys>; + vcc11-supply = <&vcc_sys>; + vcc12-supply = <&vcc_io>; + + regulators { + vdd_cpu: vdd_log: DCDC_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1350000>; + regulator-name = "vdd_log"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: DCDC_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1250000>; + regulator-name = "vdd_gpu"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc_ddr"; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_io: DCDC_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_io"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcca_tp: LDO_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_tp"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc_codec: LDO_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_codec"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_10: LDO_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-name = "vdd_10"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vcc_gps: LDO_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_gps"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_sd"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc10_lcd: LDO_REG6 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-name = "vcc10_lcd"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc_18: LDO_REG7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_18"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc18_lcd: LDO_REG8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc18_lcd"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc33_sd: SWITCH_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc33_sd"; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_lan: SWITCH_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_lan"; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + }; + }; +}; + +&sdmmc { + u-boot,dm-pre-reloc; + status = "okay"; + + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + card-detect-delay = <200>; + disable-wp; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_cd>, <&sdmmc_bus4>; + vmmc-supply = <&vcc_sd>; + vqmmc-supply = <&vccio_sd>; +}; + +&uart2 { + u-boot,dm-pre-reloc; + status = "okay"; +}; + +&wdt { + status = "okay"; +}; + +&pinctrl { + u-boot,dm-pre-reloc; + pmic { + pmic_int: pmic-int { + rockchip,pins = ; + }; + }; + + sdmmc { + sdmmc_pwr: sdmmc-pwr { + rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig index 53cc9a0dcd..4ad2940069 100644 --- a/arch/arm/mach-rockchip/rk3288/Kconfig +++ b/arch/arm/mach-rockchip/rk3288/Kconfig @@ -84,6 +84,15 @@ config TARGET_POPMETAL_RK3288 2GB DDR3. Expansion connectors provide access to I2C, SPI, UART, GPIOs and display interface. +config TARGET_VYASA_RK3288 + bool "Vyasa-RK3288" + select BOARD_LATE_INIT + help + Vyasa is a RK3288-based development board with 2 USB ports, + HDMI, VGA, micro-SD card, audio, WiFi and Gigabit Ethernet, It + also includes on-board eMMC and 2GB of SDRAM. Expansion connectors + provide access to display pins, I2C, SPI, UART and GPIOs. + config TARGET_ROCK2 bool "Radxa Rock 2" select BOARD_LATE_INIT @@ -129,6 +138,8 @@ config SPL_LIBGENERIC_SUPPORT config SPL_SERIAL_SUPPORT default y +source "board/amarula/vyasa-rk3288/Kconfig" + source "board/chipspark/popmetal_rk3288/Kconfig" source "board/firefly/firefly-rk3288/Kconfig" diff --git a/board/amarula/vyasa-rk3288/Kconfig b/board/amarula/vyasa-rk3288/Kconfig new file mode 100644 index 0000000000..8b8c30835e --- /dev/null +++ b/board/amarula/vyasa-rk3288/Kconfig @@ -0,0 +1,12 @@ +if TARGET_VYASA_RK3288 + +config SYS_BOARD + default "vyasa-rk3288" + +config SYS_VENDOR + default "amarula" + +config SYS_CONFIG_NAME + default "vyasa-rk3288" + +endif diff --git a/board/amarula/vyasa-rk3288/MAINTAINERS b/board/amarula/vyasa-rk3288/MAINTAINERS new file mode 100644 index 0000000000..10397fcb4b --- /dev/null +++ b/board/amarula/vyasa-rk3288/MAINTAINERS @@ -0,0 +1,6 @@ +VYASA RK3288 +M: Jagan Teki +S: Maintained +F: board/amarula/vyasa-rk3288 +F: include/configs/vyasa-rk3288.h +F: configs/vyasa-rk3288_defconfig diff --git a/board/amarula/vyasa-rk3288/Makefile b/board/amarula/vyasa-rk3288/Makefile new file mode 100644 index 0000000000..7c0d5c0316 --- /dev/null +++ b/board/amarula/vyasa-rk3288/Makefile @@ -0,0 +1,7 @@ +# +# Copyright (C) 2017 Amarula Solutions +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += vyasa-rk3288.o diff --git a/board/amarula/vyasa-rk3288/vyasa-rk3288.c b/board/amarula/vyasa-rk3288/vyasa-rk3288.c new file mode 100644 index 0000000000..ceee42c16e --- /dev/null +++ b/board/amarula/vyasa-rk3288/vyasa-rk3288.c @@ -0,0 +1,7 @@ +/* + * Copyright (C) 2017 Amarula Solutions + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include diff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig new file mode 100644 index 0000000000..7db7b0b6f9 --- /dev/null +++ b/configs/vyasa-rk3288_defconfig @@ -0,0 +1,63 @@ +CONFIG_ARM=y +CONFIG_ARCH_ROCKCHIP=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_ROCKCHIP_RK3288=y +CONFIG_TARGET_VYASA_RK3288=y +CONFIG_SPL_STACK_R_ADDR=0x80000 +CONFIG_DEFAULT_DEVICE_TREE="rk3288-vyasa" +CONFIG_DEBUG_UART=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_SILENT_CONSOLE=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 +# CONFIG_CMD_IMLS is not set +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +CONFIG_CMD_I2C=y +CONFIG_CMD_GPIO=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIME=y +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_ISO_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_SPL_PARTITION_UUIDS=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_REGMAP=y +CONFIG_SPL_REGMAP=y +CONFIG_SYSCON=y +CONFIG_SPL_SYSCON=y +# CONFIG_SPL_SIMPLE_BUS is not set +CONFIG_CLK=y +CONFIG_SPL_CLK=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y +# CONFIG_SPL_PINCTRL_FULL is not set +CONFIG_PINCTRL_ROCKCHIP_RK3288=y +CONFIG_DM_PMIC=y +# CONFIG_SPL_PMIC_CHILDREN is not set +CONFIG_PMIC_RK8XX=y +CONFIG_REGULATOR_RK8XX=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_RAM=y +CONFIG_SPL_RAM=y +CONFIG_DEBUG_UART_BASE=0xff690000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550=y +CONFIG_SYSRESET=y +CONFIG_CONSOLE_SCROLL_LINES=10 +CONFIG_USE_TINY_PRINTF=y +CONFIG_CMD_DHRYSTONE=y +CONFIG_ERRNO_STR=y diff --git a/include/configs/vyasa-rk3288.h b/include/configs/vyasa-rk3288.h new file mode 100644 index 0000000000..9d6c80f549 --- /dev/null +++ b/include/configs/vyasa-rk3288.h @@ -0,0 +1,23 @@ +/* + * Copyright (C) 2017 Amarula Solutions + * + * Configuration settings for Amarula Vyasa RK3288. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define ROCKCHIP_DEVICE_SETTINGS +#include + +#undef BOOT_TARGET_DEVICES + +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 1) \ + +#define CONFIG_SYS_MMC_ENV_DEV 1 +#undef CONFIG_CMD_USB_MASS_STORAGE + +#endif From ffaefb885ee113d12c3ff78109beb43ba1884945 Mon Sep 17 00:00:00 2001 From: Andy Yan Date: Mon, 4 Sep 2017 20:32:23 +0800 Subject: [PATCH 29/41] rockchip: rk3368: add ENV_MEM_LAYOUT to extra env settings Add the ENV_MEM_LAYOUT_SETTINGS to CONFIG_EXTRA_ENV_SETTINGS Signed-off-by: Andy Yan Acked-by: Philipp Tomsich Reviewed-by: Philipp Tomsich --- include/configs/rk3368_common.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h index 8cba92c56d..8b4155f37c 100644 --- a/include/configs/rk3368_common.h +++ b/include/configs/rk3368_common.h @@ -51,6 +51,7 @@ #include #define CONFIG_EXTRA_ENV_SETTINGS \ + ENV_MEM_LAYOUT_SETTINGS \ BOOTENV #endif From 8ac884974a46ae2f206b4053ea32814303912b08 Mon Sep 17 00:00:00 2001 From: Andy Yan Date: Mon, 4 Sep 2017 20:32:58 +0800 Subject: [PATCH 30/41] rockchip: rk3368: add the missing target and pinctrl config for sheep board Add the missing target and pinctrl config for rk3368 sheep board Signed-off-by: Andy Yan Reviewed-by: Simon Glass Acked-by: Philipp Tomsich Reviewed-by: Philipp Tomsich --- configs/sheep-rk3368_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/sheep-rk3368_defconfig b/configs/sheep-rk3368_defconfig index b862a14751..a7991afae2 100644 --- a/configs/sheep-rk3368_defconfig +++ b/configs/sheep-rk3368_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_MALLOC_F_LEN=0x1000 CONFIG_ROCKCHIP_RK3368=y +CONFIG_TARGET_SHEEP=y CONFIG_DEFAULT_DEVICE_TREE="rk3368-sheep" CONFIG_DEBUG_UART=y CONFIG_ANDROID_BOOT_IMAGE=y @@ -14,6 +15,7 @@ CONFIG_CLK=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_PINCTRL=y +CONFIG_PINCTRL_ROCKCHIP_RK3368=y CONFIG_RAM=y CONFIG_DEBUG_UART_BASE=0xFF1b0000 CONFIG_DEBUG_UART_CLOCK=24000000 From 2f01a2b2149c4c38467eeeddde09ac48d379aed3 Mon Sep 17 00:00:00 2001 From: Philipp Tomsich Date: Tue, 12 Sep 2017 17:30:56 +0200 Subject: [PATCH 31/41] rockchip: clk: rk3399: add clk_enable function and support USB HOST0/1 The generic ehci-driver (ehci-generic.c) will try to enable the clocks listed in the DTSI. If this fails (e.g. due to clk_enable not being implemented in a driver and -ENOSYS being returned by the clk-uclass), the driver will bail our and print an error message. This implements a minimal clk_enable for the RK3399 and supports the clocks mandatory for the EHCI controllers; as these are enabled by default we simply return success. Signed-off-by: Philipp Tomsich Reviewed-by: Simon Glass --- drivers/clk/rockchip/clk_rk3399.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c index 7232806724..168c9ddba3 100644 --- a/drivers/clk/rockchip/clk_rk3399.c +++ b/drivers/clk/rockchip/clk_rk3399.c @@ -950,9 +950,24 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate) return ret; } +static int rk3399_clk_enable(struct clk *clk) +{ + switch (clk->id) { + case HCLK_HOST0: + case HCLK_HOST0_ARB: + case HCLK_HOST1: + case HCLK_HOST1_ARB: + return 0; + } + + debug("%s: unsupported clk %ld\n", __func__, clk->id); + return -ENOENT; +} + static struct clk_ops rk3399_clk_ops = { .get_rate = rk3399_clk_get_rate, .set_rate = rk3399_clk_set_rate, + .enable = rk3399_clk_enable, }; static int rk3399_clk_probe(struct udevice *dev) From 46c89c8efa3e56ad8919b3a36663bb12582ed4d0 Mon Sep 17 00:00:00 2001 From: Philipp Tomsich Date: Tue, 12 Sep 2017 17:30:57 +0200 Subject: [PATCH 32/41] rockchip: dts: rk3399-puma: replace 'rockchip, vbus-gpio' with fixed regulator On the RK3399-Q7, we need to turn on the on-module USB hub before using the USB host interfaces (only the OTG interface is directly connected to the edge connector). This drops the deprecated 'rockchip,vbus-gpio' property and uses a fixed regulator to turn on the USB hub. References: 26a8b80 "usb: host: xhci-rockchip: use fixed regulator to control vbus" Signed-off-by: Philipp Tomsich Reviewed-by: Simon Glass --- arch/arm/dts/rk3399-puma.dtsi | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi index dd1baea704..a04878e223 100644 --- a/arch/arm/dts/rk3399-puma.dtsi +++ b/arch/arm/dts/rk3399-puma.dtsi @@ -89,6 +89,17 @@ }; }; + usbhub_enable: usbhub_enable { + compatible = "regulator-fixed"; + regulator-name = "usbhub_enable"; + enable-active-low; + gpio = <&gpio4 3 GPIO_ACTIVE_HIGH>; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + vccadc_ref: vccadc-ref { compatible = "regulator-fixed"; regulator-name = "vcc1v8_sys"; @@ -514,7 +525,6 @@ }; &dwc3_typec1 { - rockchip,vbus-gpio = <&gpio4 3 GPIO_ACTIVE_LOW>; status = "okay"; }; From 75c7859803a334a41c8bdf0a31cd1cd61f579076 Mon Sep 17 00:00:00 2001 From: Philipp Tomsich Date: Tue, 12 Sep 2017 17:32:24 +0200 Subject: [PATCH 33/41] rockchip: clk: rk3399: Convert to livetree Update the clock driver for the RK3399 to support a live device tree. Signed-off-by: Philipp Tomsich Reviewed-by: Simon Glass --- drivers/clk/rockchip/clk_rk3399.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c index 168c9ddba3..9d963be552 100644 --- a/drivers/clk/rockchip/clk_rk3399.c +++ b/drivers/clk/rockchip/clk_rk3399.c @@ -990,7 +990,7 @@ static int rk3399_clk_ofdata_to_platdata(struct udevice *dev) #if !CONFIG_IS_ENABLED(OF_PLATDATA) struct rk3399_clk_priv *priv = dev_get_priv(dev); - priv->cru = (struct rk3399_cru *)devfdt_get_addr(dev); + priv->cru = dev_read_addr_ptr(dev); #endif return 0; } @@ -1174,7 +1174,7 @@ static int rk3399_pmuclk_ofdata_to_platdata(struct udevice *dev) #if !CONFIG_IS_ENABLED(OF_PLATDATA) struct rk3399_pmuclk_priv *priv = dev_get_priv(dev); - priv->pmucru = (struct rk3399_pmucru *)devfdt_get_addr(dev); + priv->pmucru = dev_read_addr_ptr(dev); #endif return 0; } From f6230a00579d5ca5ba01ca158f5c369cf64e87eb Mon Sep 17 00:00:00 2001 From: Philipp Tomsich Date: Tue, 12 Sep 2017 17:32:26 +0200 Subject: [PATCH 34/41] rockchip: efuse: change to use dev_read_addr_ptr With the dev_read_addr_ptr function available, we can change the efuse driver to use it (and eliminate the explicit type-cast). Signed-off-by: Philipp Tomsich Reviewed-by: Simon Glass --- drivers/misc/rockchip-efuse.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c index 2e3bc9137a..a2203bf37b 100644 --- a/drivers/misc/rockchip-efuse.c +++ b/drivers/misc/rockchip-efuse.c @@ -142,7 +142,7 @@ static int rockchip_efuse_ofdata_to_platdata(struct udevice *dev) { struct rockchip_efuse_platdata *plat = dev_get_platdata(dev); - plat->base = (void *)dev_read_addr(dev); + plat->base = dev_read_addr_ptr(dev); return 0; } From 7b87e3bfaf1ef1109da0f749040426c9e665c361 Mon Sep 17 00:00:00 2001 From: Philipp Tomsich Date: Tue, 12 Sep 2017 17:32:29 +0200 Subject: [PATCH 35/41] rockchip: defconfig: puma-rk3399: enable OF_LIVE (live tree) With the critical drivers ready for switching to a live tree, we can now enable it in the defconfig for the RK3399-Q7. Signed-off-by: Philipp Tomsich Reviewed-by: Simon Glass --- configs/puma-rk3399_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig index 1badf80beb..2ab2516c01 100644 --- a/configs/puma-rk3399_defconfig +++ b/configs/puma-rk3399_defconfig @@ -35,6 +35,7 @@ CONFIG_CMD_TIME=y CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_LIVE=y CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_ENV_IS_IN_MMC=y CONFIG_REGMAP=y From 8158a848fa4d506d46a5193daf13367f3839022a Mon Sep 17 00:00:00 2001 From: Philipp Tomsich Date: Mon, 14 Aug 2017 19:05:31 +0200 Subject: [PATCH 36/41] rockchip: timer: update for 32/64bit-aware OF_PLATDATA With dtoc emitting fdt64_t for addresses (and region sizes), the array indices for accessing the reg[] array needs to be adjusted. This adjusts the Rockchip DM timer driver to correctly handle OF_PLATDATA given this new structure layout. Signed-off-by: Philipp Tomsich Acked-by: Philipp Tomsich Reviewed-by: Simon Glass --- drivers/timer/rockchip_timer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/timer/rockchip_timer.c b/drivers/timer/rockchip_timer.c index 460eb82f6c..07d14482d6 100644 --- a/drivers/timer/rockchip_timer.c +++ b/drivers/timer/rockchip_timer.c @@ -140,7 +140,7 @@ static int rockchip_timer_probe(struct udevice *dev) struct rockchip_timer_priv *priv = dev_get_priv(dev); struct rockchip_timer_plat *plat = dev_get_platdata(dev); - priv->timer = map_sysmem(plat->dtd.reg[1], plat->dtd.reg[3]); + priv->timer = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]); uc_priv->clock_rate = plat->dtd.clock_frequency; #endif From 1d70f0ac88dcd0ed9c17ec4c5e97db69de961319 Mon Sep 17 00:00:00 2001 From: Philipp Tomsich Date: Mon, 14 Aug 2017 19:05:32 +0200 Subject: [PATCH 37/41] rockchip: rk3368: adjust DMC driver for 32/64bit-aware OF_PLATDATA With the new 32/64bit-aware dtoc, the type of reg is fdt64_t and the OF_PLATDATA structure layout changes. This adjusts the DMC driver for the RK3368 to track these changes. For the time being (i.e. until regmap_init_mem_platdata works for the 64bit case), we won't use regmap_init_mem_platdata here and simply access of_plat.reg[] directly. Signed-off-by: Philipp Tomsich Acked-by: Philipp Tomsich Reviewed-by: Simon Glass --- drivers/ram/rockchip/dmc-rk3368.c | 11 ++--------- 1 file changed, 2 insertions(+), 9 deletions(-) diff --git a/drivers/ram/rockchip/dmc-rk3368.c b/drivers/ram/rockchip/dmc-rk3368.c index ca7b1ff0c8..7577ff0363 100644 --- a/drivers/ram/rockchip/dmc-rk3368.c +++ b/drivers/ram/rockchip/dmc-rk3368.c @@ -893,18 +893,11 @@ static int conv_of_platdata(struct udevice *dev) { struct rk3368_sdram_params *plat = dev_get_platdata(dev); struct dtd_rockchip_rk3368_dmc *of_plat = &plat->of_plat; - int ret; plat->ddr_freq = of_plat->rockchip_ddr_frequency; plat->ddr_speed_bin = of_plat->rockchip_ddr_speed_bin; plat->memory_schedule = of_plat->rockchip_memory_schedule; - ret = regmap_init_mem_platdata(dev, of_plat->reg, - ARRAY_SIZE(of_plat->reg) / 2, - &plat->map); - if (ret) - return ret; - return 0; } #endif @@ -933,8 +926,8 @@ static int rk3368_dmc_probe(struct udevice *dev) debug("%s: pmugrf=%p\n", __func__, priv->pmugrf); #ifdef CONFIG_TPL_BUILD - pctl = regmap_get_range(plat->map, 0); - ddrphy = regmap_get_range(plat->map, 1); + pctl = (struct rk3368_ddr_pctl *)plat->of_plat.reg[0]; + ddrphy = (struct rk3368_ddrphy *)plat->of_plat.reg[2]; msch = syscon_get_first_range(ROCKCHIP_SYSCON_MSCH); grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); From 75ff0578515665a1b712275deb73be29e5ad8773 Mon Sep 17 00:00:00 2001 From: Philipp Tomsich Date: Mon, 14 Aug 2017 19:05:33 +0200 Subject: [PATCH 38/41] rockchip: dts: rk3368: reduce the number of nodes seen in TPL The RK3368 TPL stage always returns to the BootROM, so it has no need for the eMMC, SD and SPI nodes. This marks those nodes (that should be included in SPL, but not TPL) as 'u-boot,dm-spl'. Signed-off-by: Philipp Tomsich Acked-by: Philipp Tomsich Reviewed-by: Simon Glass --- arch/arm/dts/rk3368-lion-u-boot.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/dts/rk3368-lion-u-boot.dtsi b/arch/arm/dts/rk3368-lion-u-boot.dtsi index 1ec7d254af..a9b7f81c62 100644 --- a/arch/arm/dts/rk3368-lion-u-boot.dtsi +++ b/arch/arm/dts/rk3368-lion-u-boot.dtsi @@ -71,18 +71,18 @@ }; &emmc { - u-boot,dm-pre-reloc; + u-boot,dm-spl; }; &sdmmc { - u-boot,dm-pre-reloc; + u-boot,dm-spl; }; &spi1 { - u-boot,dm-pre-reloc; + u-boot,dm-spl; spiflash: w25q32dw@0 { - u-boot,dm-pre-reloc; + u-boot,dm-spl; }; }; From 5184daddaa9a398ac7f47b5a28e7264f7eb10bed Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Thu, 7 Sep 2017 11:20:50 +0800 Subject: [PATCH 39/41] rockchip: sdhci: update reg map for of-platdata After Simon's patch, the dtoc can work with 64bit address, so we need to fix reg number for it. Depend on Simon's patch set: https://patchwork.ozlabs.org/cover/807266/ Signed-off-by: Kever Yang Acked-by: Philipp Tomsich --- drivers/mmc/rockchip_sdhci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c index 346a42c664..0f31dfc3fd 100644 --- a/drivers/mmc/rockchip_sdhci.c +++ b/drivers/mmc/rockchip_sdhci.c @@ -45,7 +45,7 @@ static int arasan_sdhci_probe(struct udevice *dev) struct dtd_rockchip_rk3399_sdhci_5_1 *dtplat = &plat->dtplat; host->name = dev->name; - host->ioaddr = map_sysmem(dtplat->reg[1], dtplat->reg[3]); + host->ioaddr = map_sysmem(dtplat->reg[0], dtplat->reg[1]); max_frequency = dtplat->max_frequency; ret = clk_get_by_index_platdata(dev, 0, dtplat->clocks, &clk); #else From 6e5bd8d6f34445958eba1203999cd3e1475791ac Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Thu, 7 Sep 2017 11:20:51 +0800 Subject: [PATCH 40/41] rockchip: ram: rk3399: update reg map for of-platdata After Simon's patch, the dtoc can work with 64bit address, so we need to fix reg number for it. Depend on Simon's patch set: https://patchwork.ozlabs.org/cover/807266/ Signed-off-by: Kever Yang Reviewed-by: Philipp Tomsich Acked-by: Philipp Tomsich --- arch/arm/mach-rockchip/rk3399/sdram_rk3399.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-rockchip/rk3399/sdram_rk3399.c b/arch/arm/mach-rockchip/rk3399/sdram_rk3399.c index 63342ab5c9..5ed4b03837 100644 --- a/arch/arm/mach-rockchip/rk3399/sdram_rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/sdram_rk3399.c @@ -1115,7 +1115,7 @@ static int conv_of_platdata(struct udevice *dev) int ret; ret = regmap_init_mem_platdata(dev, dtplat->reg, - ARRAY_SIZE(dtplat->reg) / 4, + ARRAY_SIZE(dtplat->reg) / 2, &plat->map); if (ret) return ret; From 60d7c50945d65185a5c86c4f52d4671fb59292e3 Mon Sep 17 00:00:00 2001 From: Klaus Goger Date: Fri, 15 Sep 2017 14:46:04 +0200 Subject: [PATCH 41/41] rockchip: puma_rk3399: increase serialno_str size Increase serialno_str to 17 bytes so it can hold the 16 bytes long serial nummer and the terminating null byte added by snprintf. Signed-off-by: Klaus Goger --- board/theobroma-systems/puma_rk3399/puma-rk3399.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/theobroma-systems/puma_rk3399/puma-rk3399.c b/board/theobroma-systems/puma_rk3399/puma-rk3399.c index c6f8eed0c9..45d56cd99e 100644 --- a/board/theobroma-systems/puma_rk3399/puma-rk3399.c +++ b/board/theobroma-systems/puma_rk3399/puma-rk3399.c @@ -107,7 +107,7 @@ static void setup_serial(void) u8 low[cpuid_length/2], high[cpuid_length/2]; char cpuid_str[cpuid_length * 2 + 1]; u64 serialno; - char serialno_str[16]; + char serialno_str[17]; /* retrieve the device */ ret = uclass_get_device_by_driver(UCLASS_MISC,