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mips: bmips: add bcm6345-clk driver support for BCM63268

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This driver can control up to 32 clocks.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Álvaro Fernández Rojas 2017-05-07 20:13:04 +02:00 committed by Daniel Schwierzeck
parent 5b14e13c24
commit 969ebdb930
2 changed files with 65 additions and 0 deletions
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13
arch/mips/dts/brcm,bcm63268.dtsi
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@ -4,6 +4,7 @@
* SPDX-License-Identifier: GPL-2.0+
*/
#include <dt-bindings/clock/bcm63268-clock.h>
#include <dt-bindings/gpio/gpio.h>
#include "skeleton.dtsi"
@ -43,6 +44,18 @@
clock-frequency = <50000000>;
u-boot,dm-pre-reloc;
};
periph_clk: periph-clk {
compatible = "brcm,bcm6345-clk";
reg = <0x10000004 0x4>;
#clock-cells = <1>;
};
timer_clk: timer-clk {
compatible = "brcm,bcm6345-clk";
reg = <0x100000ac 0x4>;
#clock-cells = <1>;
};
};
ubus {

52
include/dt-bindings/clock/bcm63268-clock.h Normal file
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@ -0,0 +1,52 @@
/*
* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
*
* Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __DT_BINDINGS_CLOCK_BCM63268_H
#define __DT_BINDINGS_CLOCK_BCM63268_H
#define BCM63268_CLK_GLESS 0
#define BCM63268_CLK_VDSL_QPROC 1
#define BCM63268_CLK_VDSL_AFE 2
#define BCM63268_CLK_VDSL 3
#define BCM63268_CLK_MIPS 4
#define BCM63268_CLK_WLAN_OCP 5
#define BCM63268_CLK_DECT 6
#define BCM63268_CLK_FAP0 7
#define BCM63268_CLK_FAP1 8
#define BCM63268_CLK_SAR 9
#define BCM63268_CLK_ROBOSW 10
#define BCM63268_CLK_PCM 11
#define BCM63268_CLK_USBD 12
#define BCM63268_CLK_USBH 13
#define BCM63268_CLK_IPSEC 14
#define BCM63268_CLK_SPI 15
#define BCM63268_CLK_HSSPI 16
#define BCM63268_CLK_PCIE 17
#define BCM63268_CLK_PHYMIPS 18
#define BCM63268_CLK_GMAC 19
#define BCM63268_CLK_NAND 20
#define BCM63268_CLK_TBUS 27
#define BCM63268_CLK_ROBOSW250 31
#define BCM63268_TCLK_EPHY1 0
#define BCM63268_TCLK_EPHY2 1
#define BCM63268_TCLK_EPHY3 2
#define BCM63268_TCLK_GPHY 3
#define BCM63268_TCLK_DSL 4
#define BCM63268_TCLK_WO_EPHY 5
#define BCM63268_TCLK_WO_DSL 6
#define BCM63268_TCLK_FAP1 11
#define BCM63268_TCLK_FAP2 15
#define BCM63268_TCLK_UTO_50 16
#define BCM63268_TCLK_UTO_EXT 17
#define BCM63268_TCLK_USB_REF 18
#define BCM63268_TCLK_SW_RST 29
#define BCM63268_TCLK_HW_RST 30
#define BCM63268_TCLK_POR_RST 31
#endif /* __DT_BINDINGS_CLOCK_BCM63268_H */